1 /* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
2 Copyright 1999 Silicon Integrated System Corporation
3 Revision: 1.08.06 Sep. 24 2002
4
5 Modified from the driver which is originally written by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
11
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19 http://www.sis.com.tw/support/databook.htm
20
21 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <webvenza@libero.it> add suspend/resume support
22 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
23 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
24 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
25 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
26 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
27 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
28 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
29 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
30 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
31 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
32 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
33 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
34 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
35 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
36 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
37 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule
38 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
39 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
40 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
41 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
42 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
43 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
44 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
45 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
46 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
47 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
48 */
49
50 #include <linux/module.h>
51 #include <linux/kernel.h>
52 #include <linux/string.h>
53 #include <linux/timer.h>
54 #include <linux/errno.h>
55 #include <linux/ioport.h>
56 #include <linux/slab.h>
57 #include <linux/interrupt.h>
58 #include <linux/pci.h>
59 #include <linux/netdevice.h>
60 #include <linux/init.h>
61 #include <linux/mii.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/delay.h>
65 #include <linux/ethtool.h>
66 #include <linux/crc32.h>
67
68 #include <asm/processor.h> /* Processor type for cache alignment. */
69 #include <asm/bitops.h>
70 #include <asm/io.h>
71 #include <asm/uaccess.h> /* User space memory access functions */
72
73 #include "sis900.h"
74
75 #define SIS900_MODULE_NAME "sis900"
76 #define SIS900_DRV_VERSION "v1.08.07 11/02/2003"
77
78 static char version[] __devinitdata =
79 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
80
81 static int max_interrupt_work = 40;
82 static int multicast_filter_limit = 128;
83
84 #define sis900_debug debug
85 static int sis900_debug;
86
87 /* Time in jiffies before concluding the transmitter is hung. */
88 #define TX_TIMEOUT (4*HZ)
89 /* SiS 900 is capable of 32 bits BM DMA */
90 #define SIS900_DMA_MASK 0xffffffff
91
92 enum {
93 SIS_900 = 0,
94 SIS_7016
95 };
96 static char * card_names[] = {
97 "SiS 900 PCI Fast Ethernet",
98 "SiS 7016 PCI Fast Ethernet"
99 };
100 static struct pci_device_id sis900_pci_tbl [] = {
101 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
102 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
103 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
104 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
105 {0,}
106 };
107 MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
108
109 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
110
111 static struct mii_chip_info {
112 const char * name;
113 u16 phy_id0;
114 u16 phy_id1;
115 u8 phy_types;
116 #define HOME 0x0001
117 #define LAN 0x0002
118 #define MIX 0x0003
119 } mii_chip_table[] = {
120 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
121 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
122 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
123 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
124 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
125 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
126 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
127 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
128 {0,},
129 };
130
131 struct mii_phy {
132 struct mii_phy * next;
133 int phy_addr;
134 u16 phy_id0;
135 u16 phy_id1;
136 u16 status;
137 u8 phy_types;
138 };
139
140 typedef struct _BufferDesc {
141 u32 link;
142 u32 cmdsts;
143 u32 bufptr;
144 } BufferDesc;
145
146 struct sis900_private {
147 struct net_device_stats stats;
148 struct pci_dev * pci_dev;
149
150 spinlock_t lock;
151
152 struct mii_phy * mii;
153 struct mii_phy * first_mii; /* record the first mii structure */
154 unsigned int cur_phy;
155
156 struct timer_list timer; /* Link status detection timer. */
157 u8 autong_complete; /* 1: auto-negotiate complete */
158
159 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
160 unsigned int cur_tx, dirty_tx;
161
162 /* The saved address of a sent/receive-in-place packet buffer */
163 struct sk_buff *tx_skbuff[NUM_TX_DESC];
164 struct sk_buff *rx_skbuff[NUM_RX_DESC];
165 BufferDesc *tx_ring;
166 BufferDesc *rx_ring;
167
168 dma_addr_t tx_ring_dma;
169 dma_addr_t rx_ring_dma;
170
171 unsigned int tx_full; /* The Tx queue is full. */
172 u8 host_bridge_rev;
173 u32 pci_state[16];
174 };
175
176 MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
177 MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
178 MODULE_LICENSE("GPL");
179
180 MODULE_PARM(multicast_filter_limit, "i");
181 MODULE_PARM(max_interrupt_work, "i");
182 MODULE_PARM(debug, "i");
183 MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
184 MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
185 MODULE_PARM_DESC(debug, "SiS 900/7016 debug level (2-4)");
186
187 static int sis900_open(struct net_device *net_dev);
188 static int sis900_mii_probe (struct net_device * net_dev);
189 static void sis900_init_rxfilter (struct net_device * net_dev);
190 static u16 read_eeprom(long ioaddr, int location);
191 static u16 mdio_read(struct net_device *net_dev, int phy_id, int location);
192 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
193 static void sis900_timer(unsigned long data);
194 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
195 static void sis900_tx_timeout(struct net_device *net_dev);
196 static void sis900_init_tx_ring(struct net_device *net_dev);
197 static void sis900_init_rx_ring(struct net_device *net_dev);
198 static int sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
199 static int sis900_rx(struct net_device *net_dev);
200 static void sis900_finish_xmit (struct net_device *net_dev);
201 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
202 static int sis900_close(struct net_device *net_dev);
203 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
204 static struct net_device_stats *sis900_get_stats(struct net_device *net_dev);
205 static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
206 static void set_rx_mode(struct net_device *net_dev);
207 static void sis900_reset(struct net_device *net_dev);
208 static void sis630_set_eq(struct net_device *net_dev, u8 revision);
209 static int sis900_set_config(struct net_device *dev, struct ifmap *map);
210 static u16 sis900_default_phy(struct net_device * net_dev);
211 static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
212 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
213 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
214 static void sis900_set_mode (long ioaddr, int speed, int duplex);
215 static struct ethtool_ops sis900_ethtool_ops;
216
217 /**
218 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
219 * @pci_dev: the sis900 pci device
220 * @net_dev: the net device to get address for
221 *
222 * Older SiS900 and friends, use EEPROM to store MAC address.
223 * MAC address is read from read_eeprom() into @net_dev->dev_addr.
224 */
225
sis900_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)226 static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
227 {
228 long ioaddr = pci_resource_start(pci_dev, 0);
229 u16 signature;
230 int i;
231
232 /* check to see if we have sane EEPROM */
233 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
234 if (signature == 0xffff || signature == 0x0000) {
235 printk (KERN_INFO "%s: Error EERPOM read %x\n",
236 net_dev->name, signature);
237 return 0;
238 }
239
240 /* get MAC address from EEPROM */
241 for (i = 0; i < 3; i++)
242 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
243
244 return 1;
245 }
246
247 /**
248 * sis630e_get_mac_addr - Get MAC address for SiS630E model
249 * @pci_dev: the sis900 pci device
250 * @net_dev: the net device to get address for
251 *
252 * SiS630E model, use APC CMOS RAM to store MAC address.
253 * APC CMOS RAM is accessed through ISA bridge.
254 * MAC address is read into @net_dev->dev_addr.
255 */
256
sis630e_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)257 static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
258 {
259 struct pci_dev *isa_bridge = NULL;
260 u8 reg;
261 int i;
262
263 isa_bridge = pci_find_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
264 if (!isa_bridge) {
265 isa_bridge = pci_find_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
266 if (!isa_bridge) {
267 printk("%s: Can not find ISA bridge\n", net_dev->name);
268 return 0;
269 }
270 }
271 pci_read_config_byte(isa_bridge, 0x48, ®);
272 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
273
274 for (i = 0; i < 6; i++) {
275 outb(0x09 + i, 0x70);
276 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
277 }
278 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
279
280 return 1;
281 }
282
283
284 /**
285 * sis635_get_mac_addr - Get MAC address for SIS635 model
286 * @pci_dev: the sis900 pci device
287 * @net_dev: the net device to get address for
288 *
289 * SiS635 model, set MAC Reload Bit to load Mac address from APC
290 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
291 * @net_dev->dev_addr.
292 */
293
sis635_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)294 static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
295 {
296 long ioaddr = net_dev->base_addr;
297 u32 rfcrSave;
298 u32 i;
299
300 rfcrSave = inl(rfcr + ioaddr);
301
302 outl(rfcrSave | RELOAD, ioaddr + cr);
303 outl(0, ioaddr + cr);
304
305 /* disable packet filtering before setting filter */
306 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
307
308 /* load MAC addr to filter data register */
309 for (i = 0 ; i < 3 ; i++) {
310 outl((i << RFADDR_shift), ioaddr + rfcr);
311 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
312 }
313
314 /* enable packet filtering */
315 outl(rfcrSave | RFEN, rfcr + ioaddr);
316
317 return 1;
318 }
319
320 /**
321 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
322 * @pci_dev: the sis900 pci device
323 * @net_dev: the net device to get address for
324 *
325 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
326 * is shared by
327 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
328 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
329 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
330 * EEDONE signal to refuse EEPROM access by LAN.
331 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
332 * The signature field in SiS962 or SiS963 spec is meaningless.
333 * MAC address is read into @net_dev->dev_addr.
334 */
335
sis96x_get_mac_addr(struct pci_dev * pci_dev,struct net_device * net_dev)336 static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
337 {
338 long ioaddr = net_dev->base_addr;
339 long ee_addr = ioaddr + mear;
340 u32 waittime = 0;
341 int i;
342
343 outl(EEREQ, ee_addr);
344 while(waittime < 2000) {
345 if(inl(ee_addr) & EEGNT) {
346
347 /* get MAC address from EEPROM */
348 for (i = 0; i < 3; i++)
349 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
350
351 outl(EEDONE, ee_addr);
352 return 1;
353 } else {
354 udelay(1);
355 waittime ++;
356 }
357 }
358 outl(EEDONE, ee_addr);
359 return 0;
360 }
361
362 /**
363 * sis900_probe - Probe for sis900 device
364 * @pci_dev: the sis900 pci device
365 * @pci_id: the pci device ID
366 *
367 * Check and probe sis900 net device for @pci_dev.
368 * Get mac address according to the chip revision,
369 * and assign SiS900-specific entries in the device structure.
370 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
371 */
372
sis900_probe(struct pci_dev * pci_dev,const struct pci_device_id * pci_id)373 static int __devinit sis900_probe (struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
374 {
375 struct sis900_private *sis_priv;
376 struct net_device *net_dev;
377 struct pci_dev *dev;
378 dma_addr_t ring_dma;
379 void *ring_space;
380 long ioaddr;
381 int i, ret;
382 u8 revision;
383 char *card_name = card_names[pci_id->driver_data];
384
385 /* when built into the kernel, we only print version if device is found */
386 #ifndef MODULE
387 static int printed_version;
388 if (!printed_version++)
389 printk(version);
390 #endif
391
392 /* setup various bits in PCI command register */
393 ret = pci_enable_device(pci_dev);
394 if(ret) return ret;
395
396 i = pci_set_dma_mask(pci_dev, SIS900_DMA_MASK);
397 if(i){
398 printk(KERN_ERR "sis900.c: architecture does not support"
399 "32bit PCI busmaster DMA\n");
400 return i;
401 }
402
403 pci_set_master(pci_dev);
404
405 net_dev = alloc_etherdev(sizeof(struct sis900_private));
406 if (!net_dev)
407 return -ENOMEM;
408 SET_MODULE_OWNER(net_dev);
409 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
410
411 /* We do a request_region() to register /proc/ioports info. */
412 ioaddr = pci_resource_start(pci_dev, 0);
413 ret = pci_request_regions(pci_dev, "sis900");
414 if (ret)
415 goto err_out;
416
417 sis_priv = net_dev->priv;
418 net_dev->base_addr = ioaddr;
419 net_dev->irq = pci_dev->irq;
420 sis_priv->pci_dev = pci_dev;
421 spin_lock_init(&sis_priv->lock);
422
423 pci_set_drvdata(pci_dev, net_dev);
424
425 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
426 if (!ring_space) {
427 ret = -ENOMEM;
428 goto err_out_cleardev;
429 }
430 sis_priv->tx_ring = (BufferDesc *)ring_space;
431 sis_priv->tx_ring_dma = ring_dma;
432
433 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
434 if (!ring_space) {
435 ret = -ENOMEM;
436 goto err_unmap_tx;
437 }
438 sis_priv->rx_ring = (BufferDesc *)ring_space;
439 sis_priv->rx_ring_dma = ring_dma;
440
441 /* The SiS900-specific entries in the device structure. */
442 net_dev->open = &sis900_open;
443 net_dev->hard_start_xmit = &sis900_start_xmit;
444 net_dev->stop = &sis900_close;
445 net_dev->get_stats = &sis900_get_stats;
446 net_dev->set_config = &sis900_set_config;
447 net_dev->set_multicast_list = &set_rx_mode;
448 net_dev->do_ioctl = &mii_ioctl;
449 net_dev->tx_timeout = sis900_tx_timeout;
450 net_dev->watchdog_timeo = TX_TIMEOUT;
451 net_dev->ethtool_ops = &sis900_ethtool_ops;
452
453 ret = register_netdev(net_dev);
454 if (ret)
455 goto err_unmap_rx;
456
457 /* Get Mac address according to the chip revision */
458 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &revision);
459 ret = 0;
460
461 if (revision == SIS630E_900_REV)
462 ret = sis630e_get_mac_addr(pci_dev, net_dev);
463 else if ((revision > 0x81) && (revision <= 0x90) )
464 ret = sis635_get_mac_addr(pci_dev, net_dev);
465 else if (revision == SIS96x_900_REV)
466 ret = sis96x_get_mac_addr(pci_dev, net_dev);
467 else
468 ret = sis900_get_mac_addr(pci_dev, net_dev);
469
470 if (ret == 0) {
471 ret = -ENODEV;
472 goto err_out_unregister;
473 }
474
475 /* 630ET : set the mii access mode as software-mode */
476 if (revision == SIS630ET_900_REV)
477 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
478
479 /* probe for mii transceiver */
480 if (sis900_mii_probe(net_dev) == 0) {
481 ret = -ENODEV;
482 goto err_out_unregister;
483 }
484
485 /* save our host bridge revision */
486 dev = pci_find_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
487 if (dev)
488 pci_read_config_byte(dev, PCI_CLASS_REVISION, &sis_priv->host_bridge_rev);
489
490 /* print some information about our NIC */
491 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, ", net_dev->name,
492 card_name, ioaddr, net_dev->irq);
493 for (i = 0; i < 5; i++)
494 printk("%2.2x:", (u8)net_dev->dev_addr[i]);
495 printk("%2.2x.\n", net_dev->dev_addr[i]);
496
497 return 0;
498
499 err_out_unregister:
500 unregister_netdev(net_dev);
501 err_unmap_rx:
502 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
503 sis_priv->rx_ring_dma);
504 err_unmap_tx:
505 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
506 sis_priv->tx_ring_dma);
507 err_out_cleardev:
508 pci_set_drvdata(pci_dev, NULL);
509 pci_release_regions(pci_dev);
510 err_out:
511 free_netdev(net_dev);
512 return ret;
513 }
514
515 /**
516 * sis900_mii_probe - Probe MII PHY for sis900
517 * @net_dev: the net device to probe for
518 *
519 * Search for total of 32 possible mii phy addresses.
520 * Identify and set current phy if found one,
521 * return error if it failed to found.
522 */
523
sis900_mii_probe(struct net_device * net_dev)524 static int __init sis900_mii_probe (struct net_device * net_dev)
525 {
526 struct sis900_private * sis_priv = net_dev->priv;
527 u16 poll_bit = MII_STAT_LINK, status = 0;
528 unsigned long timeout = jiffies + 5 * HZ;
529 int phy_addr;
530 u8 revision;
531
532 sis_priv->mii = NULL;
533
534 /* search for total of 32 possible mii phy addresses */
535 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
536 struct mii_phy * mii_phy = NULL;
537 u16 mii_status;
538 int i;
539
540 mii_phy = NULL;
541 for(i = 0; i < 2; i++)
542 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
543
544 if (mii_status == 0xffff || mii_status == 0x0000)
545 /* the mii is not accessible, try next one */
546 continue;
547
548 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
549 printk(KERN_INFO "Cannot allocate mem for struct mii_phy\n");
550 mii_phy = sis_priv->first_mii;
551 while (mii_phy) {
552 struct mii_phy *phy;
553 phy = mii_phy;
554 mii_phy = mii_phy->next;
555 kfree(phy);
556 }
557 return 0;
558 }
559
560 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
561 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
562 mii_phy->phy_addr = phy_addr;
563 mii_phy->status = mii_status;
564 mii_phy->next = sis_priv->mii;
565 sis_priv->mii = mii_phy;
566 sis_priv->first_mii = mii_phy;
567
568 for (i = 0; mii_chip_table[i].phy_id1; i++)
569 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
570 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
571 mii_phy->phy_types = mii_chip_table[i].phy_types;
572 if (mii_chip_table[i].phy_types == MIX)
573 mii_phy->phy_types =
574 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
575 printk(KERN_INFO "%s: %s transceiver found at address %d.\n",
576 net_dev->name, mii_chip_table[i].name, phy_addr);
577 break;
578 }
579
580 if( !mii_chip_table[i].phy_id1 )
581 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
582 net_dev->name, phy_addr);
583 }
584
585 if (sis_priv->mii == NULL) {
586 printk(KERN_INFO "%s: No MII transceivers found!\n",
587 net_dev->name);
588 return 0;
589 }
590
591 /* select default PHY for mac */
592 sis_priv->mii = NULL;
593 sis900_default_phy( net_dev );
594
595 /* Reset phy if default phy is internal sis900 */
596 if ((sis_priv->mii->phy_id0 == 0x001D) &&
597 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
598 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
599
600 /* workaround for ICS1893 PHY */
601 if ((sis_priv->mii->phy_id0 == 0x0015) &&
602 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
603 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
604
605 if(status & MII_STAT_LINK){
606 while (poll_bit) {
607 current->state = TASK_INTERRUPTIBLE;
608 schedule_timeout(0);
609 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
610 if (time_after_eq(jiffies, timeout)) {
611 printk(KERN_WARNING "%s: reset phy and link down now\n", net_dev->name);
612 return -ETIME;
613 }
614 }
615 }
616
617 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
618 if (revision == SIS630E_900_REV) {
619 /* SiS 630E has some bugs on default value of PHY registers */
620 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
621 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
622 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
623 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
624 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
625 }
626
627 if (sis_priv->mii->status & MII_STAT_LINK)
628 netif_carrier_on(net_dev);
629 else
630 netif_carrier_off(net_dev);
631
632 return 1;
633 }
634
635 /**
636 * sis900_default_phy - Select default PHY for sis900 mac.
637 * @net_dev: the net device to probe for
638 *
639 * Select first detected PHY with link as default.
640 * If no one is link on, select PHY whose types is HOME as default.
641 * If HOME doesn't exist, select LAN.
642 */
643
sis900_default_phy(struct net_device * net_dev)644 static u16 sis900_default_phy(struct net_device * net_dev)
645 {
646 struct sis900_private * sis_priv = net_dev->priv;
647 struct mii_phy *phy = NULL, *phy_home = NULL, *default_phy = NULL;
648 u16 status;
649
650 for( phy=sis_priv->first_mii; phy; phy=phy->next ){
651 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
652 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
653
654 /* Link ON & Not select deafalut PHY */
655 if ( (status & MII_STAT_LINK) && !(default_phy) )
656 default_phy = phy;
657 else{
658 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
659 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
660 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
661 if( phy->phy_types == HOME )
662 phy_home = phy;
663 }
664 }
665
666 if( (!default_phy) && phy_home )
667 default_phy = phy_home;
668 else if(!default_phy)
669 default_phy = sis_priv->first_mii;
670
671 if( sis_priv->mii != default_phy ){
672 sis_priv->mii = default_phy;
673 sis_priv->cur_phy = default_phy->phy_addr;
674 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n", net_dev->name,sis_priv->cur_phy);
675 }
676
677 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
678 status &= (~MII_CNTL_ISOLATE);
679
680 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
681 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
682 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
683
684 return status;
685 }
686
687
688 /**
689 * sis900_set_capability - set the media capability of network adapter.
690 * @net_dev : the net device to probe for
691 * @phy : default PHY
692 *
693 * Set the media capability of network adapter according to
694 * mii status register. It's necessary before auto-negotiate.
695 */
696
sis900_set_capability(struct net_device * net_dev,struct mii_phy * phy)697 static void sis900_set_capability( struct net_device *net_dev , struct mii_phy *phy )
698 {
699 u16 cap;
700 u16 status;
701
702 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
703 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
704
705 cap = MII_NWAY_CSMA_CD |
706 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
707 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
708 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
709 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
710
711 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
712 }
713
714
715 /* Delay between EEPROM clock transitions. */
716 #define eeprom_delay() inl(ee_addr)
717
718 /**
719 * read_eeprom - Read Serial EEPROM
720 * @ioaddr: base i/o address
721 * @location: the EEPROM location to read
722 *
723 * Read Serial EEPROM through EEPROM Access Register.
724 * Note that location is in word (16 bits) unit
725 */
726
read_eeprom(long ioaddr,int location)727 static u16 __devinit read_eeprom(long ioaddr, int location)
728 {
729 int i;
730 u16 retval = 0;
731 long ee_addr = ioaddr + mear;
732 u32 read_cmd = location | EEread;
733
734 outl(0, ee_addr);
735 eeprom_delay();
736 outl(EECS, ee_addr);
737 eeprom_delay();
738
739 /* Shift the read command (9) bits out. */
740 for (i = 8; i >= 0; i--) {
741 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
742 outl(dataval, ee_addr);
743 eeprom_delay();
744 outl(dataval | EECLK, ee_addr);
745 eeprom_delay();
746 }
747 outl(EECS, ee_addr);
748 eeprom_delay();
749
750 /* read the 16-bits data in */
751 for (i = 16; i > 0; i--) {
752 outl(EECS, ee_addr);
753 eeprom_delay();
754 outl(EECS | EECLK, ee_addr);
755 eeprom_delay();
756 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
757 eeprom_delay();
758 }
759
760 /* Terminate the EEPROM access. */
761 outl(0, ee_addr);
762 eeprom_delay();
763
764 return (retval);
765 }
766
767 /* Read and write the MII management registers using software-generated
768 serial MDIO protocol. Note that the command bits and data bits are
769 send out separately */
770 #define mdio_delay() inl(mdio_addr)
771
mdio_idle(long mdio_addr)772 static void mdio_idle(long mdio_addr)
773 {
774 outl(MDIO | MDDIR, mdio_addr);
775 mdio_delay();
776 outl(MDIO | MDDIR | MDC, mdio_addr);
777 }
778
779 /* Syncronize the MII management interface by shifting 32 one bits out. */
mdio_reset(long mdio_addr)780 static void mdio_reset(long mdio_addr)
781 {
782 int i;
783
784 for (i = 31; i >= 0; i--) {
785 outl(MDDIR | MDIO, mdio_addr);
786 mdio_delay();
787 outl(MDDIR | MDIO | MDC, mdio_addr);
788 mdio_delay();
789 }
790 return;
791 }
792
793 /**
794 * mdio_read - read MII PHY register
795 * @net_dev: the net device to read
796 * @phy_id: the phy address to read
797 * @location: the phy regiester id to read
798 *
799 * Read MII registers through MDIO and MDC
800 * using MDIO management frame structure and protocol(defined by ISO/IEC).
801 * Please see SiS7014 or ICS spec
802 */
803
mdio_read(struct net_device * net_dev,int phy_id,int location)804 static u16 mdio_read(struct net_device *net_dev, int phy_id, int location)
805 {
806 long mdio_addr = net_dev->base_addr + mear;
807 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
808 u16 retval = 0;
809 int i;
810
811 mdio_reset(mdio_addr);
812 mdio_idle(mdio_addr);
813
814 for (i = 15; i >= 0; i--) {
815 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
816 outl(dataval, mdio_addr);
817 mdio_delay();
818 outl(dataval | MDC, mdio_addr);
819 mdio_delay();
820 }
821
822 /* Read the 16 data bits. */
823 for (i = 16; i > 0; i--) {
824 outl(0, mdio_addr);
825 mdio_delay();
826 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
827 outl(MDC, mdio_addr);
828 mdio_delay();
829 }
830 outl(0x00, mdio_addr);
831
832 return retval;
833 }
834
835 /**
836 * mdio_write - write MII PHY register
837 * @net_dev: the net device to write
838 * @phy_id: the phy address to write
839 * @location: the phy regiester id to write
840 * @value: the register value to write with
841 *
842 * Write MII registers with @value through MDIO and MDC
843 * using MDIO management frame structure and protocol(defined by ISO/IEC)
844 * please see SiS7014 or ICS spec
845 */
846
mdio_write(struct net_device * net_dev,int phy_id,int location,int value)847 static void mdio_write(struct net_device *net_dev, int phy_id, int location, int value)
848 {
849 long mdio_addr = net_dev->base_addr + mear;
850 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
851 int i;
852
853 mdio_reset(mdio_addr);
854 mdio_idle(mdio_addr);
855
856 /* Shift the command bits out. */
857 for (i = 15; i >= 0; i--) {
858 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
859 outb(dataval, mdio_addr);
860 mdio_delay();
861 outb(dataval | MDC, mdio_addr);
862 mdio_delay();
863 }
864 mdio_delay();
865
866 /* Shift the value bits out. */
867 for (i = 15; i >= 0; i--) {
868 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
869 outl(dataval, mdio_addr);
870 mdio_delay();
871 outl(dataval | MDC, mdio_addr);
872 mdio_delay();
873 }
874 mdio_delay();
875
876 /* Clear out extra bits. */
877 for (i = 2; i > 0; i--) {
878 outb(0, mdio_addr);
879 mdio_delay();
880 outb(MDC, mdio_addr);
881 mdio_delay();
882 }
883 outl(0x00, mdio_addr);
884
885 return;
886 }
887
888
889 /**
890 * sis900_reset_phy - reset sis900 mii phy.
891 * @net_dev: the net device to write
892 * @phy_addr: default phy address
893 *
894 * Some specific phy can't work properly without reset.
895 * This function will be called during initialization and
896 * link status change from ON to DOWN.
897 */
898
sis900_reset_phy(struct net_device * net_dev,int phy_addr)899 static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
900 {
901 int i = 0;
902 u16 status;
903
904 while (i++ < 2)
905 status = mdio_read(net_dev, phy_addr, MII_STATUS);
906
907 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
908
909 return status;
910 }
911
912 /**
913 * sis900_open - open sis900 device
914 * @net_dev: the net device to open
915 *
916 * Do some initialization and start net interface.
917 * enable interrupts and set sis900 timer.
918 */
919
920 static int
sis900_open(struct net_device * net_dev)921 sis900_open(struct net_device *net_dev)
922 {
923 struct sis900_private *sis_priv = net_dev->priv;
924 long ioaddr = net_dev->base_addr;
925 u8 revision;
926 int ret;
927
928 /* Soft reset the chip. */
929 sis900_reset(net_dev);
930
931 /* Equalizer workaround Rule */
932 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
933 sis630_set_eq(net_dev, revision);
934
935 ret = request_irq(net_dev->irq, &sis900_interrupt, SA_SHIRQ, net_dev->name, net_dev);
936 if (ret)
937 return ret;
938
939 sis900_init_rxfilter(net_dev);
940
941 sis900_init_tx_ring(net_dev);
942 sis900_init_rx_ring(net_dev);
943
944 set_rx_mode(net_dev);
945
946 netif_start_queue(net_dev);
947
948 /* Workaround for EDB */
949 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
950
951 /* Enable all known interrupts by setting the interrupt mask. */
952 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
953 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
954 outl(IE, ioaddr + ier);
955
956 sis900_check_mode(net_dev, sis_priv->mii);
957
958 /* Set the timer to switch to check for link beat and perhaps switch
959 to an alternate media type. */
960 init_timer(&sis_priv->timer);
961 sis_priv->timer.expires = jiffies + HZ;
962 sis_priv->timer.data = (unsigned long)net_dev;
963 sis_priv->timer.function = &sis900_timer;
964 add_timer(&sis_priv->timer);
965
966 return 0;
967 }
968
969 /**
970 * sis900_init_rxfilter - Initialize the Rx filter
971 * @net_dev: the net device to initialize for
972 *
973 * Set receive filter address to our MAC address
974 * and enable packet filtering.
975 */
976
977 static void
sis900_init_rxfilter(struct net_device * net_dev)978 sis900_init_rxfilter (struct net_device * net_dev)
979 {
980 long ioaddr = net_dev->base_addr;
981 u32 rfcrSave;
982 u32 i;
983
984 rfcrSave = inl(rfcr + ioaddr);
985
986 /* disable packet filtering before setting filter */
987 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
988
989 /* load MAC addr to filter data register */
990 for (i = 0 ; i < 3 ; i++) {
991 u32 w;
992
993 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
994 outl((i << RFADDR_shift), ioaddr + rfcr);
995 outl(w, ioaddr + rfdr);
996
997 if (sis900_debug > 2) {
998 printk(KERN_INFO "%s: Receive Filter Addrss[%d]=%x\n",
999 net_dev->name, i, inl(ioaddr + rfdr));
1000 }
1001 }
1002
1003 /* enable packet filtering */
1004 outl(rfcrSave | RFEN, rfcr + ioaddr);
1005 }
1006
1007 /**
1008 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1009 * @net_dev: the net device to initialize for
1010 *
1011 * Initialize the Tx descriptor ring,
1012 */
1013
1014 static void
sis900_init_tx_ring(struct net_device * net_dev)1015 sis900_init_tx_ring(struct net_device *net_dev)
1016 {
1017 struct sis900_private *sis_priv = net_dev->priv;
1018 long ioaddr = net_dev->base_addr;
1019 int i;
1020
1021 sis_priv->tx_full = 0;
1022 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1023
1024 for (i = 0; i < NUM_TX_DESC; i++) {
1025 sis_priv->tx_skbuff[i] = NULL;
1026
1027 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1028 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1029 sis_priv->tx_ring[i].cmdsts = 0;
1030 sis_priv->tx_ring[i].bufptr = 0;
1031 }
1032
1033 /* load Transmit Descriptor Register */
1034 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1035 if (sis900_debug > 2)
1036 printk(KERN_INFO "%s: TX descriptor register loaded with: %8.8x\n",
1037 net_dev->name, inl(ioaddr + txdp));
1038 }
1039
1040 /**
1041 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1042 * @net_dev: the net device to initialize for
1043 *
1044 * Initialize the Rx descriptor ring,
1045 * and pre-allocate recevie buffers (socket buffer)
1046 */
1047
1048 static void
sis900_init_rx_ring(struct net_device * net_dev)1049 sis900_init_rx_ring(struct net_device *net_dev)
1050 {
1051 struct sis900_private *sis_priv = net_dev->priv;
1052 long ioaddr = net_dev->base_addr;
1053 int i;
1054
1055 sis_priv->cur_rx = 0;
1056 sis_priv->dirty_rx = 0;
1057
1058 /* init RX descriptor */
1059 for (i = 0; i < NUM_RX_DESC; i++) {
1060 sis_priv->rx_skbuff[i] = NULL;
1061
1062 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1063 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1064 sis_priv->rx_ring[i].cmdsts = 0;
1065 sis_priv->rx_ring[i].bufptr = 0;
1066 }
1067
1068 /* allocate sock buffers */
1069 for (i = 0; i < NUM_RX_DESC; i++) {
1070 struct sk_buff *skb;
1071
1072 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1073 /* not enough memory for skbuff, this makes a "hole"
1074 on the buffer ring, it is not clear how the
1075 hardware will react to this kind of degenerated
1076 buffer */
1077 break;
1078 }
1079 skb->dev = net_dev;
1080 sis_priv->rx_skbuff[i] = skb;
1081 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1082 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
1083 skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1084 }
1085 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1086
1087 /* load Receive Descriptor Register */
1088 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1089 if (sis900_debug > 2)
1090 printk(KERN_INFO "%s: RX descriptor register loaded with: %8.8x\n",
1091 net_dev->name, inl(ioaddr + rxdp));
1092 }
1093
1094 /**
1095 * sis630_set_eq - set phy equalizer value for 630 LAN
1096 * @net_dev: the net device to set equalizer value
1097 * @revision: 630 LAN revision number
1098 *
1099 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1100 * PHY register 14h(Test)
1101 * Bit 14: 0 -- Automatically dectect (default)
1102 * 1 -- Manually set Equalizer filter
1103 * Bit 13: 0 -- (Default)
1104 * 1 -- Speed up convergence of equalizer setting
1105 * Bit 9 : 0 -- (Default)
1106 * 1 -- Disable Baseline Wander
1107 * Bit 3~7 -- Equalizer filter setting
1108 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1109 * Then calculate equalizer value
1110 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1111 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1112 * Calculate Equalizer value:
1113 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-dectect proper equalizer value.
1114 * When the equalizer is stable, this value is not a fixed value. It will be within
1115 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1116 * 0 <= max <= 4 --> set equalizer to max
1117 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1118 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1119 */
1120
sis630_set_eq(struct net_device * net_dev,u8 revision)1121 static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1122 {
1123 struct sis900_private *sis_priv = net_dev->priv;
1124 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1125 int i, maxcount=10;
1126
1127 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1128 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1129 return;
1130
1131 if (netif_carrier_ok(net_dev)) {
1132 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1133 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (0x2200 | reg14h) & 0xBFFF);
1134 for (i=0; i < maxcount; i++) {
1135 eq_value=(0x00F8 & mdio_read(net_dev, sis_priv->cur_phy, MII_RESV)) >> 3;
1136 if (i == 0)
1137 max_value=min_value=eq_value;
1138 max_value=(eq_value > max_value) ? eq_value : max_value;
1139 min_value=(eq_value < min_value) ? eq_value : min_value;
1140 }
1141 /* 630E rule to determine the equalizer value */
1142 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1143 revision == SIS630ET_900_REV) {
1144 if (max_value < 5)
1145 eq_value=max_value;
1146 else if (max_value >= 5 && max_value < 15)
1147 eq_value=(max_value == min_value) ? max_value+2 : max_value+1;
1148 else if (max_value >= 15)
1149 eq_value=(max_value == min_value) ? max_value+6 : max_value+5;
1150 }
1151 /* 630B0&B1 rule to determine the equalizer value */
1152 if (revision == SIS630A_900_REV &&
1153 (sis_priv->host_bridge_rev == SIS630B0 ||
1154 sis_priv->host_bridge_rev == SIS630B1)) {
1155 if (max_value == 0)
1156 eq_value=3;
1157 else
1158 eq_value=(max_value+min_value+1)/2;
1159 }
1160 /* write equalizer value and setting */
1161 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1162 reg14h=(reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1163 reg14h=(reg14h | 0x6000) & 0xFDFF;
1164 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1165 }
1166 else {
1167 reg14h=mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1168 if (revision == SIS630A_900_REV &&
1169 (sis_priv->host_bridge_rev == SIS630B0 ||
1170 sis_priv->host_bridge_rev == SIS630B1))
1171 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (reg14h | 0x2200) & 0xBFFF);
1172 else
1173 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, (reg14h | 0x2000) & 0xBFFF);
1174 }
1175 return;
1176 }
1177
1178 /**
1179 * sis900_timer - sis900 timer routine
1180 * @data: pointer to sis900 net device
1181 *
1182 * On each timer ticks we check two things,
1183 * link status (ON/OFF) and link mode (10/100/Full/Half)
1184 */
1185
sis900_timer(unsigned long data)1186 static void sis900_timer(unsigned long data)
1187 {
1188 struct net_device *net_dev = (struct net_device *)data;
1189 struct sis900_private *sis_priv = net_dev->priv;
1190 struct mii_phy *mii_phy = sis_priv->mii;
1191 static int next_tick = 5*HZ;
1192 u16 status;
1193 u8 revision;
1194
1195 if (!sis_priv->autong_complete){
1196 int speed, duplex = 0;
1197
1198 sis900_read_mode(net_dev, &speed, &duplex);
1199 if (duplex){
1200 sis900_set_mode(net_dev->base_addr, speed, duplex);
1201 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
1202 sis630_set_eq(net_dev, revision);
1203 netif_start_queue(net_dev);
1204 }
1205
1206 sis_priv->timer.expires = jiffies + HZ;
1207 add_timer(&sis_priv->timer);
1208 return;
1209 }
1210
1211 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1212 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1213
1214 /* Link OFF -> ON */
1215 if (!netif_carrier_ok(net_dev)) {
1216 LookForLink:
1217 /* Search for new PHY */
1218 status = sis900_default_phy(net_dev);
1219 mii_phy = sis_priv->mii;
1220
1221 if (status & MII_STAT_LINK){
1222 sis900_check_mode(net_dev, mii_phy);
1223 netif_carrier_on(net_dev);
1224 }
1225 }
1226 /* Link ON -> OFF */
1227 else {
1228 if (!(status & MII_STAT_LINK)){
1229 netif_carrier_off(net_dev);
1230 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1231
1232 /* Change mode issue */
1233 if ((mii_phy->phy_id0 == 0x001D) &&
1234 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1235 sis900_reset_phy(net_dev, sis_priv->cur_phy);
1236
1237 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
1238 sis630_set_eq(net_dev, revision);
1239
1240 goto LookForLink;
1241 }
1242 }
1243
1244 sis_priv->timer.expires = jiffies + next_tick;
1245 add_timer(&sis_priv->timer);
1246 }
1247
1248 /**
1249 * sis900_check_mode - check the media mode for sis900
1250 * @net_dev: the net device to be checked
1251 * @mii_phy: the mii phy
1252 *
1253 * Older driver gets the media mode from mii status output
1254 * register. Now we set our media capability and auto-negotiate
1255 * to get the upper bound of speed and duplex between two ends.
1256 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1257 * and autong_complete should be set to 1.
1258 */
1259
sis900_check_mode(struct net_device * net_dev,struct mii_phy * mii_phy)1260 static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy)
1261 {
1262 struct sis900_private *sis_priv = net_dev->priv;
1263 long ioaddr = net_dev->base_addr;
1264 int speed, duplex;
1265
1266 if( mii_phy->phy_types == LAN ){
1267 outl( ~EXD & inl( ioaddr + cfg ), ioaddr + cfg);
1268 sis900_set_capability(net_dev , mii_phy);
1269 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1270 }else{
1271 outl(EXD | inl( ioaddr + cfg ), ioaddr + cfg);
1272 speed = HW_SPEED_HOME;
1273 duplex = FDX_CAPABLE_HALF_SELECTED;
1274 sis900_set_mode(ioaddr, speed, duplex);
1275 sis_priv->autong_complete = 1;
1276 }
1277 }
1278
1279 /**
1280 * sis900_set_mode - Set the media mode of mac register.
1281 * @ioaddr: the address of the device
1282 * @speed : the transmit speed to be determined
1283 * @duplex: the duplex mode to be determined
1284 *
1285 * Set the media mode of mac register txcfg/rxcfg according to
1286 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1287 * bus is used instead of PCI bus. When this bit is set 1, the
1288 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1289 * double words.
1290 */
1291
sis900_set_mode(long ioaddr,int speed,int duplex)1292 static void sis900_set_mode (long ioaddr, int speed, int duplex)
1293 {
1294 u32 tx_flags = 0, rx_flags = 0;
1295
1296 if( inl(ioaddr + cfg) & EDB_MASTER_EN ){
1297 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) | (TX_FILL_THRESH << TxFILLT_shift);
1298 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1299 }
1300 else{
1301 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) | (TX_FILL_THRESH << TxFILLT_shift);
1302 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1303 }
1304
1305 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS ) {
1306 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1307 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1308 }
1309 else {
1310 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1311 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1312 }
1313
1314 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1315 tx_flags |= (TxCSI | TxHBI);
1316 rx_flags |= RxATX;
1317 }
1318
1319 outl (tx_flags, ioaddr + txcfg);
1320 outl (rx_flags, ioaddr + rxcfg);
1321 }
1322
1323 /**
1324 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1325 * @net_dev: the net device to read mode for
1326 * @phy_addr: mii phy address
1327 *
1328 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1329 * autong_complete should be set to 0 when starting auto-negotiation.
1330 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1331 * sis900_timer will wait for link on again if autong_complete = 0.
1332 */
1333
sis900_auto_negotiate(struct net_device * net_dev,int phy_addr)1334 static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1335 {
1336 struct sis900_private *sis_priv = net_dev->priv;
1337 int i = 0;
1338 u32 status;
1339
1340 while (i++ < 2)
1341 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1342
1343 if (!(status & MII_STAT_LINK)){
1344 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1345 sis_priv->autong_complete = 1;
1346 netif_carrier_off(net_dev);
1347 return;
1348 }
1349
1350 /* (Re)start AutoNegotiate */
1351 mdio_write(net_dev, phy_addr, MII_CONTROL,
1352 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1353 sis_priv->autong_complete = 0;
1354 }
1355
1356
1357 /**
1358 * sis900_read_mode - read media mode for sis900 internal phy
1359 * @net_dev: the net device to read mode for
1360 * @speed : the transmit speed to be determined
1361 * @duplex : the duplex mode to be determined
1362 *
1363 * The capability of remote end will be put in mii register autorec
1364 * after auto-negotiation. Use AND operation to get the upper bound
1365 * of speed and duplex between two ends.
1366 */
1367
sis900_read_mode(struct net_device * net_dev,int * speed,int * duplex)1368 static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1369 {
1370 struct sis900_private *sis_priv = net_dev->priv;
1371 struct mii_phy *phy = sis_priv->mii;
1372 int phy_addr = sis_priv->cur_phy;
1373 u32 status;
1374 u16 autoadv, autorec;
1375 int i = 0;
1376
1377 while (i++ < 2)
1378 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1379
1380 if (!(status & MII_STAT_LINK))
1381 return;
1382
1383 /* AutoNegotiate completed */
1384 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1385 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1386 status = autoadv & autorec;
1387
1388 *speed = HW_SPEED_10_MBPS;
1389 *duplex = FDX_CAPABLE_HALF_SELECTED;
1390
1391 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1392 *speed = HW_SPEED_100_MBPS;
1393 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1394 *duplex = FDX_CAPABLE_FULL_SELECTED;
1395
1396 sis_priv->autong_complete = 1;
1397
1398 /* Workaround for Realtek RTL8201 PHY issue */
1399 if((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)){
1400 if(mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1401 *duplex = FDX_CAPABLE_FULL_SELECTED;
1402 if(mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1403 *speed = HW_SPEED_100_MBPS;
1404 }
1405
1406 printk(KERN_INFO "%s: Media Link On %s %s-duplex \n",
1407 net_dev->name,
1408 *speed == HW_SPEED_100_MBPS ?
1409 "100mbps" : "10mbps",
1410 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1411 "full" : "half");
1412 }
1413
1414 /**
1415 * sis900_tx_timeout - sis900 transmit timeout routine
1416 * @net_dev: the net device to transmit
1417 *
1418 * print transmit timeout status
1419 * disable interrupts and do some tasks
1420 */
1421
sis900_tx_timeout(struct net_device * net_dev)1422 static void sis900_tx_timeout(struct net_device *net_dev)
1423 {
1424 struct sis900_private *sis_priv = net_dev->priv;
1425 long ioaddr = net_dev->base_addr;
1426 unsigned long flags;
1427 int i;
1428
1429 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x \n",
1430 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1431
1432 /* Disable interrupts by clearing the interrupt mask. */
1433 outl(0x0000, ioaddr + imr);
1434
1435 /* use spinlock to prevent interrupt handler accessing buffer ring */
1436 spin_lock_irqsave(&sis_priv->lock, flags);
1437
1438 /* discard unsent packets */
1439 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1440 for (i = 0; i < NUM_TX_DESC; i++) {
1441 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1442
1443 if (skb) {
1444 pci_unmap_single(sis_priv->pci_dev,
1445 sis_priv->tx_ring[i].bufptr, skb->len,
1446 PCI_DMA_TODEVICE);
1447 dev_kfree_skb_irq(skb);
1448 sis_priv->tx_skbuff[i] = 0;
1449 sis_priv->tx_ring[i].cmdsts = 0;
1450 sis_priv->tx_ring[i].bufptr = 0;
1451 sis_priv->stats.tx_dropped++;
1452 }
1453 }
1454 sis_priv->tx_full = 0;
1455 netif_wake_queue(net_dev);
1456
1457 spin_unlock_irqrestore(&sis_priv->lock, flags);
1458
1459 net_dev->trans_start = jiffies;
1460
1461 /* load Transmit Descriptor Register */
1462 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1463
1464 /* Enable all known interrupts by setting the interrupt mask. */
1465 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1466 return;
1467 }
1468
1469 /**
1470 * sis900_start_xmit - sis900 start transmit routine
1471 * @skb: socket buffer pointer to put the data being transmitted
1472 * @net_dev: the net device to transmit with
1473 *
1474 * Set the transmit buffer descriptor,
1475 * and write TxENA to enable transmit state machine.
1476 * tell upper layer if the buffer is full
1477 */
1478
1479 static int
sis900_start_xmit(struct sk_buff * skb,struct net_device * net_dev)1480 sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1481 {
1482 struct sis900_private *sis_priv = net_dev->priv;
1483 long ioaddr = net_dev->base_addr;
1484 unsigned int entry;
1485 unsigned long flags;
1486 unsigned int index_cur_tx, index_dirty_tx;
1487 unsigned int count_dirty_tx;
1488
1489 /* Don't transmit data before the complete of auto-negotiation */
1490 if(!sis_priv->autong_complete){
1491 netif_stop_queue(net_dev);
1492 return 1;
1493 }
1494
1495 spin_lock_irqsave(&sis_priv->lock, flags);
1496
1497 /* Calculate the next Tx descriptor entry. */
1498 entry = sis_priv->cur_tx % NUM_TX_DESC;
1499 sis_priv->tx_skbuff[entry] = skb;
1500
1501 /* set the transmit buffer descriptor and enable Transmit State Machine */
1502 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1503 skb->data, skb->len, PCI_DMA_TODEVICE);
1504 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1505 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1506
1507 sis_priv->cur_tx ++;
1508 index_cur_tx = sis_priv->cur_tx;
1509 index_dirty_tx = sis_priv->dirty_tx;
1510
1511 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1512 count_dirty_tx ++;
1513
1514 if (index_cur_tx == index_dirty_tx) {
1515 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1516 sis_priv->tx_full = 1;
1517 netif_stop_queue(net_dev);
1518 } else if (count_dirty_tx < NUM_TX_DESC) {
1519 /* Typical path, tell upper layer that more transmission is possible */
1520 netif_start_queue(net_dev);
1521 } else {
1522 /* buffer full, tell upper layer no more transmission */
1523 sis_priv->tx_full = 1;
1524 netif_stop_queue(net_dev);
1525 }
1526
1527 spin_unlock_irqrestore(&sis_priv->lock, flags);
1528
1529 net_dev->trans_start = jiffies;
1530
1531 if (sis900_debug > 3)
1532 printk(KERN_INFO "%s: Queued Tx packet at %p size %d "
1533 "to slot %d.\n",
1534 net_dev->name, skb->data, (int)skb->len, entry);
1535
1536 return 0;
1537 }
1538
1539 /**
1540 * sis900_interrupt - sis900 interrupt handler
1541 * @irq: the irq number
1542 * @dev_instance: the client data object
1543 * @regs: snapshot of processor context
1544 *
1545 * The interrupt handler does all of the Rx thread work,
1546 * and cleans up after the Tx thread
1547 */
1548
sis900_interrupt(int irq,void * dev_instance,struct pt_regs * regs)1549 static irqreturn_t sis900_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
1550 {
1551 struct net_device *net_dev = dev_instance;
1552 struct sis900_private *sis_priv = net_dev->priv;
1553 int boguscnt = max_interrupt_work;
1554 long ioaddr = net_dev->base_addr;
1555 u32 status;
1556 unsigned int handled = 0;
1557
1558 spin_lock (&sis_priv->lock);
1559
1560 do {
1561 status = inl(ioaddr + isr);
1562
1563 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1564 /* nothing intresting happened */
1565 break;
1566 handled = 1;
1567
1568 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1569 if (status & (RxORN | RxERR | RxOK))
1570 /* Rx interrupt */
1571 sis900_rx(net_dev);
1572
1573 if (status & (TxURN | TxERR | TxIDLE))
1574 /* Tx interrupt */
1575 sis900_finish_xmit(net_dev);
1576
1577 /* something strange happened !!! */
1578 if (status & HIBERR) {
1579 printk(KERN_INFO "%s: Abnormal interrupt,"
1580 "status %#8.8x.\n", net_dev->name, status);
1581 break;
1582 }
1583 if (--boguscnt < 0) {
1584 printk(KERN_INFO "%s: Too much work at interrupt, "
1585 "interrupt status = %#8.8x.\n",
1586 net_dev->name, status);
1587 break;
1588 }
1589 } while (1);
1590
1591 if (sis900_debug > 3)
1592 printk(KERN_INFO "%s: exiting interrupt, "
1593 "interrupt status = 0x%#8.8x.\n",
1594 net_dev->name, inl(ioaddr + isr));
1595
1596 spin_unlock (&sis_priv->lock);
1597 return IRQ_RETVAL(handled);
1598 }
1599
1600 /**
1601 * sis900_rx - sis900 receive routine
1602 * @net_dev: the net device which receives data
1603 *
1604 * Process receive interrupt events,
1605 * put buffer to higher layer and refill buffer pool
1606 * Note: This fucntion is called by interrupt handler,
1607 * don't do "too much" work here
1608 */
1609
sis900_rx(struct net_device * net_dev)1610 static int sis900_rx(struct net_device *net_dev)
1611 {
1612 struct sis900_private *sis_priv = net_dev->priv;
1613 long ioaddr = net_dev->base_addr;
1614 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1615 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
1616 int rx_work_limit;
1617
1618 if (sis900_debug > 3)
1619 printk(KERN_INFO "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1620 "status:0x%8.8x\n",
1621 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
1622 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1623
1624 while (rx_status & OWN) {
1625 unsigned int rx_size;
1626
1627 if (--rx_work_limit < 0)
1628 break;
1629
1630 rx_size = (rx_status & DSIZE) - CRC_SIZE;
1631
1632 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1633 /* corrupted packet received */
1634 if (sis900_debug > 3)
1635 printk(KERN_INFO "%s: Corrupted packet "
1636 "received, buffer status = 0x%8.8x.\n",
1637 net_dev->name, rx_status);
1638 sis_priv->stats.rx_errors++;
1639 if (rx_status & OVERRUN)
1640 sis_priv->stats.rx_over_errors++;
1641 if (rx_status & (TOOLONG|RUNT))
1642 sis_priv->stats.rx_length_errors++;
1643 if (rx_status & (RXISERR | FAERR))
1644 sis_priv->stats.rx_frame_errors++;
1645 if (rx_status & CRCERR)
1646 sis_priv->stats.rx_crc_errors++;
1647 /* reset buffer descriptor state */
1648 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1649 } else {
1650 struct sk_buff * skb;
1651
1652 /* This situation should never happen, but due to
1653 some unknow bugs, it is possible that
1654 we are working on NULL sk_buff :-( */
1655 if (sis_priv->rx_skbuff[entry] == NULL) {
1656 printk(KERN_WARNING "%s: NULL pointer "
1657 "encountered in Rx ring\n"
1658 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1659 net_dev->name, sis_priv->cur_rx,
1660 sis_priv->dirty_rx);
1661 break;
1662 }
1663
1664 pci_dma_sync_single(sis_priv->pci_dev,
1665 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1666 PCI_DMA_FROMDEVICE);
1667 pci_unmap_single(sis_priv->pci_dev,
1668 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1669 PCI_DMA_FROMDEVICE);
1670 /* give the socket buffer to upper layers */
1671 skb = sis_priv->rx_skbuff[entry];
1672 skb_put(skb, rx_size);
1673 skb->protocol = eth_type_trans(skb, net_dev);
1674 netif_rx(skb);
1675
1676 /* some network statistics */
1677 if ((rx_status & BCAST) == MCAST)
1678 sis_priv->stats.multicast++;
1679 net_dev->last_rx = jiffies;
1680 sis_priv->stats.rx_bytes += rx_size;
1681 sis_priv->stats.rx_packets++;
1682
1683 /* refill the Rx buffer, what if there is not enought memory for
1684 new socket buffer ?? */
1685 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1686 /* not enough memory for skbuff, this makes a "hole"
1687 on the buffer ring, it is not clear how the
1688 hardware will react to this kind of degenerated
1689 buffer */
1690 printk(KERN_INFO "%s: Memory squeeze,"
1691 "deferring packet.\n",
1692 net_dev->name);
1693 sis_priv->rx_skbuff[entry] = NULL;
1694 /* reset buffer descriptor state */
1695 sis_priv->rx_ring[entry].cmdsts = 0;
1696 sis_priv->rx_ring[entry].bufptr = 0;
1697 sis_priv->stats.rx_dropped++;
1698 sis_priv->cur_rx++;
1699 break;
1700 }
1701 skb->dev = net_dev;
1702 sis_priv->rx_skbuff[entry] = skb;
1703 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1704 sis_priv->rx_ring[entry].bufptr =
1705 pci_map_single(sis_priv->pci_dev, skb->tail,
1706 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1707 sis_priv->dirty_rx++;
1708 }
1709 sis_priv->cur_rx++;
1710 entry = sis_priv->cur_rx % NUM_RX_DESC;
1711 rx_status = sis_priv->rx_ring[entry].cmdsts;
1712 } // while
1713
1714 /* refill the Rx buffer, what if the rate of refilling is slower than
1715 consuming ?? */
1716 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1717 struct sk_buff *skb;
1718
1719 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1720
1721 if (sis_priv->rx_skbuff[entry] == NULL) {
1722 if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) {
1723 /* not enough memory for skbuff, this makes a "hole"
1724 on the buffer ring, it is not clear how the
1725 hardware will react to this kind of degenerated
1726 buffer */
1727 printk(KERN_INFO "%s: Memory squeeze,"
1728 "deferring packet.\n",
1729 net_dev->name);
1730 sis_priv->stats.rx_dropped++;
1731 break;
1732 }
1733 skb->dev = net_dev;
1734 sis_priv->rx_skbuff[entry] = skb;
1735 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1736 sis_priv->rx_ring[entry].bufptr =
1737 pci_map_single(sis_priv->pci_dev, skb->tail,
1738 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1739 }
1740 }
1741 /* re-enable the potentially idle receive state matchine */
1742 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1743
1744 return 0;
1745 }
1746
1747 /**
1748 * sis900_finish_xmit - finish up transmission of packets
1749 * @net_dev: the net device to be transmitted on
1750 *
1751 * Check for error condition and free socket buffer etc
1752 * schedule for more transmission as needed
1753 * Note: This fucntion is called by interrupt handler,
1754 * don't do "too much" work here
1755 */
1756
sis900_finish_xmit(struct net_device * net_dev)1757 static void sis900_finish_xmit (struct net_device *net_dev)
1758 {
1759 struct sis900_private *sis_priv = net_dev->priv;
1760
1761 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1762 struct sk_buff *skb;
1763 unsigned int entry;
1764 u32 tx_status;
1765
1766 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1767 tx_status = sis_priv->tx_ring[entry].cmdsts;
1768
1769 if (tx_status & OWN) {
1770 /* The packet is not transmitted yet (owned by hardware) !
1771 Note: the interrupt is generated only when Tx Machine
1772 is idle, so this is an almost impossible case */
1773 break;
1774 }
1775
1776 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1777 /* packet unsuccessfully transmitted */
1778 if (sis900_debug > 3)
1779 printk(KERN_INFO "%s: Transmit "
1780 "error, Tx status %8.8x.\n",
1781 net_dev->name, tx_status);
1782 sis_priv->stats.tx_errors++;
1783 if (tx_status & UNDERRUN)
1784 sis_priv->stats.tx_fifo_errors++;
1785 if (tx_status & ABORT)
1786 sis_priv->stats.tx_aborted_errors++;
1787 if (tx_status & NOCARRIER)
1788 sis_priv->stats.tx_carrier_errors++;
1789 if (tx_status & OWCOLL)
1790 sis_priv->stats.tx_window_errors++;
1791 } else {
1792 /* packet successfully transmitted */
1793 sis_priv->stats.collisions += (tx_status & COLCNT) >> 16;
1794 sis_priv->stats.tx_bytes += tx_status & DSIZE;
1795 sis_priv->stats.tx_packets++;
1796 }
1797 /* Free the original skb. */
1798 skb = sis_priv->tx_skbuff[entry];
1799 pci_unmap_single(sis_priv->pci_dev,
1800 sis_priv->tx_ring[entry].bufptr, skb->len,
1801 PCI_DMA_TODEVICE);
1802 dev_kfree_skb_irq(skb);
1803 sis_priv->tx_skbuff[entry] = NULL;
1804 sis_priv->tx_ring[entry].bufptr = 0;
1805 sis_priv->tx_ring[entry].cmdsts = 0;
1806 }
1807
1808 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1809 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1810 /* The ring is no longer full, clear tx_full and schedule more transmission
1811 by netif_wake_queue(net_dev) */
1812 sis_priv->tx_full = 0;
1813 netif_wake_queue (net_dev);
1814 }
1815 }
1816
1817 /**
1818 * sis900_close - close sis900 device
1819 * @net_dev: the net device to be closed
1820 *
1821 * Disable interrupts, stop the Tx and Rx Status Machine
1822 * free Tx and RX socket buffer
1823 */
1824
1825 static int
sis900_close(struct net_device * net_dev)1826 sis900_close(struct net_device *net_dev)
1827 {
1828 long ioaddr = net_dev->base_addr;
1829 struct sis900_private *sis_priv = net_dev->priv;
1830 struct sk_buff *skb;
1831 int i;
1832
1833 netif_stop_queue(net_dev);
1834
1835 /* Disable interrupts by clearing the interrupt mask. */
1836 outl(0x0000, ioaddr + imr);
1837 outl(0x0000, ioaddr + ier);
1838
1839 /* Stop the chip's Tx and Rx Status Machine */
1840 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1841
1842 del_timer(&sis_priv->timer);
1843
1844 free_irq(net_dev->irq, net_dev);
1845
1846 /* Free Tx and RX skbuff */
1847 for (i = 0; i < NUM_RX_DESC; i++) {
1848 skb = sis_priv->rx_skbuff[i];
1849 if (skb) {
1850 pci_unmap_single(sis_priv->pci_dev,
1851 sis_priv->rx_ring[i].bufptr,
1852 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1853 dev_kfree_skb(skb);
1854 sis_priv->rx_skbuff[i] = 0;
1855 }
1856 }
1857 for (i = 0; i < NUM_TX_DESC; i++) {
1858 skb = sis_priv->tx_skbuff[i];
1859 if (skb) {
1860 pci_unmap_single(sis_priv->pci_dev,
1861 sis_priv->tx_ring[i].bufptr, skb->len,
1862 PCI_DMA_TODEVICE);
1863 dev_kfree_skb(skb);
1864 sis_priv->tx_skbuff[i] = 0;
1865 }
1866 }
1867
1868 /* Green! Put the chip in low-power mode. */
1869
1870 return 0;
1871 }
1872
1873 /**
1874 * sis900_get_drvinfo - Return information about driver
1875 * @net_dev: the net device to probe
1876 * @info: container for info returned
1877 *
1878 * Process ethtool command such as "ehtool -i" to show information
1879 */
1880
sis900_get_drvinfo(struct net_device * net_dev,struct ethtool_drvinfo * info)1881 static void sis900_get_drvinfo(struct net_device *net_dev,
1882 struct ethtool_drvinfo *info)
1883 {
1884 struct sis900_private *sis_priv = net_dev->priv;
1885
1886 strcpy (info->driver, SIS900_MODULE_NAME);
1887 strcpy (info->version, SIS900_DRV_VERSION);
1888 strcpy (info->bus_info, pci_name(sis_priv->pci_dev));
1889 }
1890
1891 static struct ethtool_ops sis900_ethtool_ops = {
1892 .get_drvinfo = sis900_get_drvinfo,
1893 };
1894
1895 /**
1896 * mii_ioctl - process MII i/o control command
1897 * @net_dev: the net device to command for
1898 * @rq: parameter for command
1899 * @cmd: the i/o command
1900 *
1901 * Process MII command like read/write MII register
1902 */
1903
mii_ioctl(struct net_device * net_dev,struct ifreq * rq,int cmd)1904 static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
1905 {
1906 struct sis900_private *sis_priv = net_dev->priv;
1907 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
1908
1909 switch(cmd) {
1910 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1911 case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */
1912 data->phy_id = sis_priv->mii->phy_addr;
1913 /* Fall Through */
1914
1915 case SIOCGMIIREG: /* Read MII PHY register. */
1916 case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */
1917 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
1918 return 0;
1919
1920 case SIOCSMIIREG: /* Write MII PHY register. */
1921 case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */
1922 if (!capable(CAP_NET_ADMIN))
1923 return -EPERM;
1924 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1925 return 0;
1926 default:
1927 return -EOPNOTSUPP;
1928 }
1929 }
1930
1931 /**
1932 * sis900_get_stats - Get sis900 read/write statistics
1933 * @net_dev: the net device to get statistics for
1934 *
1935 * get tx/rx statistics for sis900
1936 */
1937
1938 static struct net_device_stats *
sis900_get_stats(struct net_device * net_dev)1939 sis900_get_stats(struct net_device *net_dev)
1940 {
1941 struct sis900_private *sis_priv = net_dev->priv;
1942
1943 return &sis_priv->stats;
1944 }
1945
1946 /**
1947 * sis900_set_config - Set media type by net_device.set_config
1948 * @dev: the net device for media type change
1949 * @map: ifmap passed by ifconfig
1950 *
1951 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
1952 * we support only port changes. All other runtime configuration
1953 * changes will be ignored
1954 */
1955
sis900_set_config(struct net_device * dev,struct ifmap * map)1956 static int sis900_set_config(struct net_device *dev, struct ifmap *map)
1957 {
1958 struct sis900_private *sis_priv = dev->priv;
1959 struct mii_phy *mii_phy = sis_priv->mii;
1960
1961 u16 status;
1962
1963 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1964 /* we switch on the ifmap->port field. I couldn't find anything
1965 like a definition or standard for the values of that field.
1966 I think the meaning of those values is device specific. But
1967 since I would like to change the media type via the ifconfig
1968 command I use the definition from linux/netdevice.h
1969 (which seems to be different from the ifport(pcmcia) definition)
1970 */
1971 switch(map->port){
1972 case IF_PORT_UNKNOWN: /* use auto here */
1973 dev->if_port = map->port;
1974 /* we are going to change the media type, so the Link will
1975 be temporary down and we need to reflect that here. When
1976 the Link comes up again, it will be sensed by the sis_timer
1977 procedure, which also does all the rest for us */
1978 netif_carrier_off(dev);
1979
1980 /* read current state */
1981 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
1982
1983 /* enable auto negotiation and reset the negotioation
1984 (I don't really know what the auto negatiotiation reset
1985 really means, but it sounds for me right to do one here)*/
1986 mdio_write(dev, mii_phy->phy_addr,
1987 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1988
1989 break;
1990
1991 case IF_PORT_10BASET: /* 10BaseT */
1992 dev->if_port = map->port;
1993
1994 /* we are going to change the media type, so the Link will
1995 be temporary down and we need to reflect that here. When
1996 the Link comes up again, it will be sensed by the sis_timer
1997 procedure, which also does all the rest for us */
1998 netif_carrier_off(dev);
1999
2000 /* set Speed to 10Mbps */
2001 /* read current state */
2002 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2003
2004 /* disable auto negotiation and force 10MBit mode*/
2005 mdio_write(dev, mii_phy->phy_addr,
2006 MII_CONTROL, status & ~(MII_CNTL_SPEED | MII_CNTL_AUTO));
2007 break;
2008
2009 case IF_PORT_100BASET: /* 100BaseT */
2010 case IF_PORT_100BASETX: /* 100BaseTx */
2011 dev->if_port = map->port;
2012
2013 /* we are going to change the media type, so the Link will
2014 be temporary down and we need to reflect that here. When
2015 the Link comes up again, it will be sensed by the sis_timer
2016 procedure, which also does all the rest for us */
2017 netif_carrier_off(dev);
2018
2019 /* set Speed to 100Mbps */
2020 /* disable auto negotiation and enable 100MBit Mode */
2021 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2022 mdio_write(dev, mii_phy->phy_addr,
2023 MII_CONTROL, (status & ~MII_CNTL_SPEED) | MII_CNTL_SPEED);
2024
2025 break;
2026
2027 case IF_PORT_10BASE2: /* 10Base2 */
2028 case IF_PORT_AUI: /* AUI */
2029 case IF_PORT_100BASEFX: /* 100BaseFx */
2030 /* These Modes are not supported (are they?)*/
2031 printk(KERN_INFO "Not supported");
2032 return -EOPNOTSUPP;
2033 break;
2034
2035 default:
2036 printk(KERN_INFO "Invalid");
2037 return -EINVAL;
2038 }
2039 }
2040 return 0;
2041 }
2042
2043 /**
2044 * sis900_mcast_bitnr - compute hashtable index
2045 * @addr: multicast address
2046 * @revision: revision id of chip
2047 *
2048 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2049 * hash table, which makes this function a little bit different from other drivers
2050 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
2051 * multicast hash table.
2052 */
2053
sis900_mcast_bitnr(u8 * addr,u8 revision)2054 static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2055 {
2056
2057 u32 crc = ether_crc(6, addr);
2058
2059 /* leave 8 or 7 most siginifant bits */
2060 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2061 return ((int)(crc >> 24));
2062 else
2063 return ((int)(crc >> 25));
2064 }
2065
2066 /**
2067 * set_rx_mode - Set SiS900 receive mode
2068 * @net_dev: the net device to be set
2069 *
2070 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2071 * And set the appropriate multicast filter.
2072 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2073 */
2074
set_rx_mode(struct net_device * net_dev)2075 static void set_rx_mode(struct net_device *net_dev)
2076 {
2077 long ioaddr = net_dev->base_addr;
2078 struct sis900_private * sis_priv = net_dev->priv;
2079 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2080 int i, table_entries;
2081 u32 rx_mode;
2082 u8 revision;
2083
2084 /* 635 Hash Table entires = 256(2^16) */
2085 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2086 if((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
2087 table_entries = 16;
2088 else
2089 table_entries = 8;
2090
2091 if (net_dev->flags & IFF_PROMISC) {
2092 /* Accept any kinds of packets */
2093 rx_mode = RFPromiscuous;
2094 for (i = 0; i < table_entries; i++)
2095 mc_filter[i] = 0xffff;
2096 } else if ((net_dev->mc_count > multicast_filter_limit) ||
2097 (net_dev->flags & IFF_ALLMULTI)) {
2098 /* too many multicast addresses or accept all multicast packet */
2099 rx_mode = RFAAB | RFAAM;
2100 for (i = 0; i < table_entries; i++)
2101 mc_filter[i] = 0xffff;
2102 } else {
2103 /* Accept Broadcast packet, destination address matchs our MAC address,
2104 use Receive Filter to reject unwanted MCAST packet */
2105 struct dev_mc_list *mclist;
2106 rx_mode = RFAAB;
2107 for (i = 0, mclist = net_dev->mc_list; mclist && i < net_dev->mc_count;
2108 i++, mclist = mclist->next) {
2109 unsigned int bit_nr =
2110 sis900_mcast_bitnr(mclist->dmi_addr, revision);
2111 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2112 }
2113 }
2114
2115 /* update Multicast Hash Table in Receive Filter */
2116 for (i = 0; i < table_entries; i++) {
2117 /* why plus 0x04 ??, That makes the correct value for hash table. */
2118 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2119 outl(mc_filter[i], ioaddr + rfdr);
2120 }
2121
2122 outl(RFEN | rx_mode, ioaddr + rfcr);
2123
2124 /* sis900 is capatable of looping back packet at MAC level for debugging purpose */
2125 if (net_dev->flags & IFF_LOOPBACK) {
2126 u32 cr_saved;
2127 /* We must disable Tx/Rx before setting loopback mode */
2128 cr_saved = inl(ioaddr + cr);
2129 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2130 /* enable loopback */
2131 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2132 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2133 /* restore cr */
2134 outl(cr_saved, ioaddr + cr);
2135 }
2136
2137 return;
2138 }
2139
2140 /**
2141 * sis900_reset - Reset sis900 MAC
2142 * @net_dev: the net device to reset
2143 *
2144 * reset sis900 MAC and wait until finished
2145 * reset through command register
2146 * change backoff algorithm for 900B0 & 635 M/B
2147 */
2148
sis900_reset(struct net_device * net_dev)2149 static void sis900_reset(struct net_device *net_dev)
2150 {
2151 struct sis900_private * sis_priv = net_dev->priv;
2152 long ioaddr = net_dev->base_addr;
2153 int i = 0;
2154 u32 status = TxRCMP | RxRCMP;
2155 u8 revision;
2156
2157 outl(0, ioaddr + ier);
2158 outl(0, ioaddr + imr);
2159 outl(0, ioaddr + rfcr);
2160
2161 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
2162
2163 /* Check that the chip has finished the reset. */
2164 while (status && (i++ < 1000)) {
2165 status ^= (inl(isr + ioaddr) & status);
2166 }
2167
2168 pci_read_config_byte(sis_priv->pci_dev, PCI_CLASS_REVISION, &revision);
2169 if( (revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV) )
2170 outl(PESEL | RND_CNT, ioaddr + cfg);
2171 else
2172 outl(PESEL, ioaddr + cfg);
2173 }
2174
2175 /**
2176 * sis900_remove - Remove sis900 device
2177 * @pci_dev: the pci device to be removed
2178 *
2179 * remove and release SiS900 net device
2180 */
2181
sis900_remove(struct pci_dev * pci_dev)2182 static void __devexit sis900_remove(struct pci_dev *pci_dev)
2183 {
2184 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2185 struct sis900_private * sis_priv = net_dev->priv;
2186 struct mii_phy *phy = NULL;
2187
2188 while (sis_priv->first_mii) {
2189 phy = sis_priv->first_mii;
2190 sis_priv->first_mii = phy->next;
2191 kfree(phy);
2192 }
2193
2194 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2195 sis_priv->rx_ring_dma);
2196 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2197 sis_priv->tx_ring_dma);
2198 unregister_netdev(net_dev);
2199 free_netdev(net_dev);
2200 pci_release_regions(pci_dev);
2201 pci_set_drvdata(pci_dev, NULL);
2202 }
2203
2204 #ifdef CONFIG_PM
2205
sis900_suspend(struct pci_dev * pci_dev,u32 state)2206 static int sis900_suspend(struct pci_dev *pci_dev, u32 state)
2207 {
2208 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2209 struct sis900_private *sis_priv = net_dev->priv;
2210 long ioaddr = net_dev->base_addr;
2211
2212 if(!netif_running(net_dev))
2213 return 0;
2214
2215 netif_stop_queue(net_dev);
2216 netif_device_detach(net_dev);
2217
2218 /* Stop the chip's Tx and Rx Status Machine */
2219 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2220
2221 pci_set_power_state(pci_dev, 3);
2222 pci_save_state(pci_dev, sis_priv->pci_state);
2223
2224 return 0;
2225 }
2226
sis900_resume(struct pci_dev * pci_dev)2227 static int sis900_resume(struct pci_dev *pci_dev)
2228 {
2229 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2230 struct sis900_private *sis_priv = net_dev->priv;
2231 long ioaddr = net_dev->base_addr;
2232
2233 if(!netif_running(net_dev))
2234 return 0;
2235 pci_restore_state(pci_dev, sis_priv->pci_state);
2236 pci_set_power_state(pci_dev, 0);
2237
2238 sis900_init_rxfilter(net_dev);
2239
2240 sis900_init_tx_ring(net_dev);
2241 sis900_init_rx_ring(net_dev);
2242
2243 set_rx_mode(net_dev);
2244
2245 netif_device_attach(net_dev);
2246 netif_start_queue(net_dev);
2247
2248 /* Workaround for EDB */
2249 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2250
2251 /* Enable all known interrupts by setting the interrupt mask. */
2252 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2253 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2254 outl(IE, ioaddr + ier);
2255
2256 sis900_check_mode(net_dev, sis_priv->mii);
2257
2258 return 0;
2259 }
2260 #endif /* CONFIG_PM */
2261
2262 static struct pci_driver sis900_pci_driver = {
2263 .name = SIS900_MODULE_NAME,
2264 .id_table = sis900_pci_tbl,
2265 .probe = sis900_probe,
2266 .remove = __devexit_p(sis900_remove),
2267 #ifdef CONFIG_PM
2268 .suspend = sis900_suspend,
2269 .resume = sis900_resume,
2270 #endif /* CONFIG_PM */
2271 };
2272
sis900_init_module(void)2273 static int __init sis900_init_module(void)
2274 {
2275 /* when a module, this is printed whether or not devices are found in probe */
2276 #ifdef MODULE
2277 printk(version);
2278 #endif
2279
2280 return pci_module_init(&sis900_pci_driver);
2281 }
2282
sis900_cleanup_module(void)2283 static void __exit sis900_cleanup_module(void)
2284 {
2285 pci_unregister_driver(&sis900_pci_driver);
2286 }
2287
2288 module_init(sis900_init_module);
2289 module_exit(sis900_cleanup_module);
2290
2291