1 #ifndef B43_PHY_HT_H_
2 #define B43_PHY_HT_H_
3 
4 #include "phy_common.h"
5 
6 
7 #define B43_PHY_HT_BBCFG			0x001 /* BB config */
8 #define  B43_PHY_HT_BBCFG_RSTCCA		0x4000 /* Reset CCA */
9 #define  B43_PHY_HT_BBCFG_RSTRX			0x8000 /* Reset RX */
10 #define B43_PHY_HT_BANDCTL			0x009 /* Band control */
11 #define  B43_PHY_HT_BANDCTL_5GHZ		0x0001 /* Use the 5GHz band */
12 #define B43_PHY_HT_TABLE_ADDR			0x072 /* Table address */
13 #define B43_PHY_HT_TABLE_DATALO			0x073 /* Table data low */
14 #define B43_PHY_HT_TABLE_DATAHI			0x074 /* Table data high */
15 #define B43_PHY_HT_BW1				0x1CE
16 #define B43_PHY_HT_BW2				0x1CF
17 #define B43_PHY_HT_BW3				0x1D0
18 #define B43_PHY_HT_BW4				0x1D1
19 #define B43_PHY_HT_BW5				0x1D2
20 #define B43_PHY_HT_BW6				0x1D3
21 
22 #define B43_PHY_HT_C1_CLIP1THRES		B43_PHY_OFDM(0x00E)
23 #define B43_PHY_HT_C2_CLIP1THRES		B43_PHY_OFDM(0x04E)
24 #define B43_PHY_HT_C3_CLIP1THRES		B43_PHY_OFDM(0x08E)
25 
26 #define B43_PHY_HT_RF_SEQ_MODE			B43_PHY_EXTG(0x000)
27 #define B43_PHY_HT_RF_SEQ_TRIG			B43_PHY_EXTG(0x003)
28 #define  B43_PHY_HT_RF_SEQ_TRIG_RX2TX		0x0001 /* RX2TX */
29 #define  B43_PHY_HT_RF_SEQ_TRIG_TX2RX		0x0002 /* TX2RX */
30 #define  B43_PHY_HT_RF_SEQ_TRIG_UPGH		0x0004 /* Update gain H */
31 #define  B43_PHY_HT_RF_SEQ_TRIG_UPGL		0x0008 /* Update gain L */
32 #define  B43_PHY_HT_RF_SEQ_TRIG_UPGU		0x0010 /* Update gain U */
33 #define  B43_PHY_HT_RF_SEQ_TRIG_RST2RX		0x0020 /* Reset to RX */
34 #define B43_PHY_HT_RF_SEQ_STATUS		B43_PHY_EXTG(0x004)
35 /* Values for the status are the same as for the trigger */
36 
37 #define B43_PHY_HT_RF_CTL1			B43_PHY_EXTG(0x010)
38 
39 #define B43_PHY_HT_AFE_CTL1			B43_PHY_EXTG(0x110)
40 #define B43_PHY_HT_AFE_CTL2			B43_PHY_EXTG(0x111)
41 #define B43_PHY_HT_AFE_CTL3			B43_PHY_EXTG(0x114)
42 #define B43_PHY_HT_AFE_CTL4			B43_PHY_EXTG(0x115)
43 #define B43_PHY_HT_AFE_CTL5			B43_PHY_EXTG(0x118)
44 #define B43_PHY_HT_AFE_CTL6			B43_PHY_EXTG(0x119)
45 
46 
47 /* Values for PHY registers used on channel switching */
48 struct b43_phy_ht_channeltab_e_phy {
49 	u16 bw1;
50 	u16 bw2;
51 	u16 bw3;
52 	u16 bw4;
53 	u16 bw5;
54 	u16 bw6;
55 };
56 
57 
58 struct b43_phy_ht {
59 };
60 
61 
62 struct b43_phy_operations;
63 extern const struct b43_phy_operations b43_phyops_ht;
64 
65 #endif /* B43_PHY_HT_H_ */
66