1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved. 4 * 5 * Based on the r8180 driver, which is: 6 * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al. 7 * 8 * Contact Information: wlanfae <wlanfae@realtek.com> 9 */ 10 #ifndef _RTL_CORE_H 11 #define _RTL_CORE_H 12 13 #include <linux/module.h> 14 #include <linux/kernel.h> 15 #include <linux/ioport.h> 16 #include <linux/sched.h> 17 #include <linux/types.h> 18 #include <linux/interrupt.h> 19 #include <linux/slab.h> 20 #include <linux/netdevice.h> 21 #include <linux/pci.h> 22 #include <linux/etherdevice.h> 23 #include <linux/delay.h> 24 #include <linux/rtnetlink.h> 25 #include <linux/wireless.h> 26 #include <linux/timer.h> 27 #include <linux/proc_fs.h> 28 #include <linux/if_arp.h> 29 #include <linux/random.h> 30 #include <linux/io.h> 31 32 /* Need this defined before including local include files */ 33 #define DRV_NAME "rtl819xE" 34 35 #include "../rtllib.h" 36 37 #include "../dot11d.h" 38 39 #include "r8192E_firmware.h" 40 #include "r8192E_hw.h" 41 42 #include "r8190P_def.h" 43 #include "r8192E_dev.h" 44 45 #include "rtl_eeprom.h" 46 #include "rtl_ps.h" 47 #include "rtl_pci.h" 48 #include "rtl_cam.h" 49 50 #define DRV_COPYRIGHT \ 51 "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation" 52 #define DRV_AUTHOR "<wlanfae@realtek.com>" 53 #define DRV_VERSION "0014.0401.2010" 54 55 #define IS_HARDWARE_TYPE_8192SE(_priv) \ 56 (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE) 57 58 #define RTL_PCI_DEVICE(vend, dev, cfg) \ 59 .vendor = (vend), .device = (dev), \ 60 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \ 61 .driver_data = (kernel_ulong_t)&(cfg) 62 63 #define TOTAL_CAM_ENTRY 32 64 #define CAM_CONTENT_COUNT 8 65 66 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 67 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10 68 69 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R 70 71 #define RTLLIB_WATCH_DOG_TIME 2000 72 73 #define MAX_DEV_ADDR_SIZE 8 /*support till 64 bit bus width OS*/ 74 #define MAX_FIRMWARE_INFORMATION_SIZE 32 75 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE) 76 #define ENCRYPTION_MAX_OVERHEAD 128 77 #define MAX_FRAGMENT_COUNT 8 78 #define MAX_TRANSMIT_BUFFER_SIZE \ 79 (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) * \ 80 MAX_FRAGMENT_COUNT) 81 82 #define CMDPACKET_FRAG_SIZE (4 * (MAX_TRANSMIT_BUFFER_SIZE / 4) - 8) 83 84 #define DEFAULT_FRAG_THRESHOLD 2342U 85 #define MIN_FRAG_THRESHOLD 256U 86 #define DEFAULT_BEACONINTERVAL 0x64U 87 88 #define DEFAULT_RETRY_RTS 7 89 #define DEFAULT_RETRY_DATA 7 90 91 #define PHY_RSSI_SLID_WIN_MAX 100 92 93 #define TxBBGainTableLength 37 94 #define CCKTxBBGainTableLength 23 95 96 #define CHANNEL_PLAN_LEN 10 97 #define sCrcLng 4 98 99 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4 100 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8 101 102 #define MAX_TX_QUEUE 9 103 104 #define MAX_RX_QUEUE 1 105 106 #define MAX_RX_COUNT 64 107 #define MAX_TX_QUEUE_COUNT 9 108 109 extern int hwwep; 110 111 enum nic_t { 112 NIC_UNKNOWN = 0, 113 NIC_8192E = 1, 114 NIC_8190P = 2, 115 NIC_8192SE = 4, 116 NIC_8192CE = 5, 117 NIC_8192CU = 6, 118 NIC_8192DE = 7, 119 NIC_8192DU = 8, 120 }; 121 122 enum rt_eeprom_type { 123 EEPROM_93C46, 124 EEPROM_93C56, 125 }; 126 127 enum dcmg_txcmd_op { 128 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000, 129 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001, 130 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002, 131 TXCMD_SET_TX_DURATION = 0xFF900003, 132 TXCMD_SET_RX_RSSI = 0xFF900004, 133 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005, 134 TXCMD_XXXX_CTRL, 135 }; 136 137 enum rt_rf_type_819xu { 138 RF_TYPE_MIN = 0, 139 RF_8225, 140 RF_8256, 141 RF_8258, 142 RF_6052 = 4, 143 RF_PSEUDO_11N = 5, 144 }; 145 146 enum rt_customer_id { 147 RT_CID_DEFAULT = 0, 148 RT_CID_8187_ALPHA0 = 1, 149 RT_CID_8187_SERCOMM_PS = 2, 150 RT_CID_8187_HW_LED = 3, 151 RT_CID_8187_NETGEAR = 4, 152 RT_CID_WHQL = 5, 153 RT_CID_819x_CAMEO = 6, 154 RT_CID_819x_RUNTOP = 7, 155 RT_CID_819x_Senao = 8, 156 RT_CID_TOSHIBA = 9, 157 RT_CID_819x_Netcore = 10, 158 RT_CID_Nettronix = 11, 159 RT_CID_DLINK = 12, 160 RT_CID_PRONET = 13, 161 RT_CID_COREGA = 14, 162 RT_CID_819x_ALPHA = 15, 163 RT_CID_819x_Sitecom = 16, 164 RT_CID_CCX = 17, 165 RT_CID_819x_Lenovo = 18, 166 RT_CID_819x_QMI = 19, 167 RT_CID_819x_Edimax_Belkin = 20, 168 RT_CID_819x_Sercomm_Belkin = 21, 169 RT_CID_819x_CAMEO1 = 22, 170 RT_CID_819x_MSI = 23, 171 RT_CID_819x_Acer = 24, 172 RT_CID_819x_HP = 27, 173 RT_CID_819x_CLEVO = 28, 174 RT_CID_819x_Arcadyan_Belkin = 29, 175 RT_CID_819x_SAMSUNG = 30, 176 RT_CID_819x_WNC_COREGA = 31, 177 }; 178 179 enum reset_type { 180 RESET_TYPE_NORESET = 0x00, 181 RESET_TYPE_NORMAL = 0x01, 182 RESET_TYPE_SILENT = 0x02 183 }; 184 185 struct rt_stats { 186 unsigned long rxrdu; 187 unsigned long rxok; 188 unsigned long rxdatacrcerr; 189 unsigned long rxmgmtcrcerr; 190 unsigned long rxcrcerrmin; 191 unsigned long rxcrcerrmid; 192 unsigned long rxcrcerrmax; 193 unsigned long received_rate_histogram[4][32]; 194 unsigned long received_preamble_GI[2][32]; 195 unsigned long numpacket_matchbssid; 196 unsigned long numpacket_toself; 197 unsigned long num_process_phyinfo; 198 unsigned long numqry_phystatus; 199 unsigned long numqry_phystatusCCK; 200 unsigned long numqry_phystatusHT; 201 unsigned long received_bwtype[5]; 202 unsigned long rxoverflow; 203 unsigned long rxint; 204 unsigned long ints; 205 unsigned long shints; 206 unsigned long txoverflow; 207 unsigned long txbeokint; 208 unsigned long txbkokint; 209 unsigned long txviokint; 210 unsigned long txvookint; 211 unsigned long txbeaconokint; 212 unsigned long txbeaconerr; 213 unsigned long txmanageokint; 214 unsigned long txcmdpktokint; 215 unsigned long txbytesmulticast; 216 unsigned long txbytesbroadcast; 217 unsigned long txbytesunicast; 218 unsigned long rxbytesunicast; 219 unsigned long txretrycount; 220 u8 last_packet_rate; 221 unsigned long slide_signal_strength[100]; 222 unsigned long slide_evm[100]; 223 unsigned long slide_rssi_total; 224 unsigned long slide_evm_total; 225 long signal_strength; 226 long signal_quality; 227 long last_signal_strength_inpercent; 228 long recv_signal_power; 229 u8 rx_rssi_percentage[4]; 230 u8 rx_evm_percentage[2]; 231 long rxSNRdB[4]; 232 u32 Slide_Beacon_pwdb[100]; 233 u32 Slide_Beacon_Total; 234 u32 CurrentShowTxate; 235 }; 236 237 struct channel_access_setting { 238 u16 SIFS_Timer; 239 u16 DIFS_Timer; 240 u16 SlotTimeTimer; 241 u16 EIFS_Timer; 242 u16 CWminIndex; 243 u16 CWmaxIndex; 244 }; 245 246 struct init_gain { 247 u8 xaagccore1; 248 u8 xbagccore1; 249 u8 xcagccore1; 250 u8 xdagccore1; 251 u8 cca; 252 253 }; 254 255 struct tx_ring { 256 u32 *desc; 257 u8 nStuckCount; 258 struct tx_ring *next; 259 } __packed; 260 261 struct rtl8192_tx_ring { 262 struct tx_desc *desc; 263 dma_addr_t dma; 264 unsigned int idx; 265 unsigned int entries; 266 struct sk_buff_head queue; 267 }; 268 269 270 271 struct rtl819x_ops { 272 enum nic_t nic_type; 273 void (*get_eeprom_size)(struct net_device *dev); 274 void (*init_adapter_variable)(struct net_device *dev); 275 void (*init_before_adapter_start)(struct net_device *dev); 276 bool (*initialize_adapter)(struct net_device *dev); 277 void (*link_change)(struct net_device *dev); 278 void (*tx_fill_descriptor)(struct net_device *dev, 279 struct tx_desc *tx_desc, 280 struct cb_desc *cb_desc, 281 struct sk_buff *skb); 282 void (*tx_fill_cmd_descriptor)(struct net_device *dev, 283 struct tx_desc_cmd *entry, 284 struct cb_desc *cb_desc, 285 struct sk_buff *skb); 286 bool (*rx_query_status_descriptor)(struct net_device *dev, 287 struct rtllib_rx_stats *stats, 288 struct rx_desc *pdesc, 289 struct sk_buff *skb); 290 bool (*rx_command_packet_handler)(struct net_device *dev, 291 struct sk_buff *skb, 292 struct rx_desc *pdesc); 293 void (*stop_adapter)(struct net_device *dev, bool reset); 294 void (*update_ratr_table)(struct net_device *dev); 295 void (*irq_enable)(struct net_device *dev); 296 void (*irq_disable)(struct net_device *dev); 297 void (*irq_clear)(struct net_device *dev); 298 void (*rx_enable)(struct net_device *dev); 299 void (*tx_enable)(struct net_device *dev); 300 void (*interrupt_recognized)(struct net_device *dev, 301 u32 *p_inta, u32 *p_intb); 302 bool (*TxCheckStuckHandler)(struct net_device *dev); 303 bool (*RxCheckStuckHandler)(struct net_device *dev); 304 }; 305 306 struct r8192_priv { 307 struct pci_dev *pdev; 308 struct pci_dev *bridge_pdev; 309 310 bool bfirst_init; 311 bool bfirst_after_down; 312 bool initialized_at_probe; 313 bool being_init_adapter; 314 bool bDriverIsGoingToUnload; 315 316 int irq; 317 short irq_enabled; 318 319 short up; 320 short up_first_time; 321 struct delayed_work update_beacon_wq; 322 struct delayed_work watch_dog_wq; 323 struct delayed_work txpower_tracking_wq; 324 struct delayed_work rfpath_check_wq; 325 struct delayed_work gpio_change_rf_wq; 326 327 struct channel_access_setting ChannelAccessSetting; 328 329 struct rtl819x_ops *ops; 330 struct rtllib_device *rtllib; 331 332 struct work_struct reset_wq; 333 334 struct log_int_8190 InterruptLog; 335 336 enum rt_customer_id CustomerID; 337 338 339 enum rt_rf_type_819xu rf_chip; 340 enum ht_channel_width CurrentChannelBW; 341 struct bb_reg_definition PHYRegDef[4]; 342 struct rate_adaptive rate_adaptive; 343 344 enum acm_method AcmMethod; 345 346 struct rt_firmware *pFirmware; 347 enum rtl819x_loopback LoopbackMode; 348 349 struct timer_list watch_dog_timer; 350 struct timer_list fsync_timer; 351 struct timer_list gpio_polling_timer; 352 353 spinlock_t irq_th_lock; 354 spinlock_t tx_lock; 355 spinlock_t rf_ps_lock; 356 spinlock_t ps_lock; 357 358 struct sk_buff_head skb_queue; 359 360 struct tasklet_struct irq_rx_tasklet; 361 struct tasklet_struct irq_tx_tasklet; 362 struct tasklet_struct irq_prepare_beacon_tasklet; 363 364 struct mutex wx_mutex; 365 struct mutex rf_mutex; 366 struct mutex mutex; 367 368 struct rt_stats stats; 369 struct iw_statistics wstats; 370 371 short (*rf_set_sens)(struct net_device *dev, short sens); 372 u8 (*rf_set_chan)(struct net_device *dev, u8 ch); 373 374 struct rx_desc *rx_ring[MAX_RX_QUEUE]; 375 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT]; 376 dma_addr_t rx_ring_dma[MAX_RX_QUEUE]; 377 unsigned int rx_idx[MAX_RX_QUEUE]; 378 int rxringcount; 379 u16 rxbuffersize; 380 381 u64 LastRxDescTSF; 382 383 u32 ReceiveConfig; 384 u8 retry_data; 385 u8 retry_rts; 386 u16 rts; 387 388 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT]; 389 int txringcount; 390 atomic_t tx_pending[0x10]; 391 392 u16 ShortRetryLimit; 393 u16 LongRetryLimit; 394 395 bool bHwRadioOff; 396 bool blinked_ingpio; 397 u8 polling_timer_on; 398 399 /**********************************************************/ 400 401 enum card_type { 402 PCI, MINIPCI, 403 CARDBUS, USB 404 } card_type; 405 406 struct work_struct qos_activate; 407 408 short promisc; 409 410 short chan; 411 short sens; 412 short max_sens; 413 414 u8 ScanDelay; 415 bool ps_force; 416 417 u32 irq_mask[2]; 418 419 u8 Rf_Mode; 420 enum nic_t card_8192; 421 u8 card_8192_version; 422 423 u8 rf_type; 424 u8 IC_Cut; 425 char nick[IW_ESSID_MAX_SIZE + 1]; 426 u8 check_roaming_cnt; 427 428 u32 SilentResetRxSlotIndex; 429 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM]; 430 431 u16 basic_rate; 432 u8 short_preamble; 433 u8 dot11CurrentPreambleMode; 434 u8 slot_time; 435 u16 SifsTime; 436 437 bool AutoloadFailFlag; 438 439 short epromtype; 440 u16 eeprom_vid; 441 u16 eeprom_did; 442 u8 eeprom_CustomerID; 443 u16 eeprom_ChannelPlan; 444 445 u8 EEPROMTxPowerLevelCCK[14]; 446 u8 EEPROMTxPowerLevelOFDM24G[14]; 447 u8 EEPROMRfACCKChnl1TxPwLevel[3]; 448 u8 EEPROMRfAOfdmChnlTxPwLevel[3]; 449 u8 EEPROMRfCCCKChnl1TxPwLevel[3]; 450 u8 EEPROMRfCOfdmChnlTxPwLevel[3]; 451 u16 EEPROMAntPwDiff; 452 u8 EEPROMThermalMeter; 453 u8 EEPROMCrystalCap; 454 455 u8 EEPROMLegacyHTTxPowerDiff; 456 457 u8 CrystalCap; 458 u8 ThermalMeter[2]; 459 460 u8 SwChnlInProgress; 461 u8 SwChnlStage; 462 u8 SwChnlStep; 463 u8 SetBWModeInProgress; 464 465 u8 nCur40MhzPrimeSC; 466 467 u32 RfReg0Value[4]; 468 u8 NumTotalRFPath; 469 bool brfpath_rxenable[4]; 470 471 bool bTXPowerDataReadFromEEPORM; 472 473 u16 RegChannelPlan; 474 u16 ChannelPlan; 475 476 bool RegRfOff; 477 bool isRFOff; 478 bool bInPowerSaveMode; 479 u8 bHwRfOffAction; 480 481 bool RFChangeInProgress; 482 bool SetRFPowerStateInProgress; 483 bool bdisable_nic; 484 485 u8 DM_Type; 486 487 u8 CckPwEnl; 488 u16 TSSI_13dBm; 489 u32 Pwr_Track; 490 u8 CCKPresentAttentuation_20Mdefault; 491 u8 CCKPresentAttentuation_40Mdefault; 492 s8 CCKPresentAttentuation_difference; 493 s8 CCKPresentAttentuation; 494 long undecorated_smoothed_pwdb; 495 496 u32 MCSTxPowerLevelOriginalOffset[6]; 497 u8 TxPowerLevelCCK[14]; 498 u8 TxPowerLevelCCK_A[14]; 499 u8 TxPowerLevelCCK_C[14]; 500 u8 TxPowerLevelOFDM24G[14]; 501 u8 TxPowerLevelOFDM24G_A[14]; 502 u8 TxPowerLevelOFDM24G_C[14]; 503 u8 LegacyHTTxPowerDiff; 504 s8 RF_C_TxPwDiff; 505 u8 AntennaTxPwDiff[3]; 506 507 bool bDynamicTxHighPower; 508 bool bDynamicTxLowPower; 509 bool bLastDTPFlag_High; 510 bool bLastDTPFlag_Low; 511 512 u8 rfa_txpowertrackingindex; 513 u8 rfa_txpowertrackingindex_real; 514 u8 rfa_txpowertracking_default; 515 u8 rfc_txpowertrackingindex; 516 u8 rfc_txpowertrackingindex_real; 517 bool btxpower_tracking; 518 bool bcck_in_ch14; 519 520 u8 txpower_count; 521 bool btxpower_trackingInit; 522 523 u8 OFDM_index[2]; 524 u8 CCK_index; 525 526 u8 Record_CCK_20Mindex; 527 u8 Record_CCK_40Mindex; 528 529 struct init_gain initgain_backup; 530 u8 DefaultInitialGain[4]; 531 bool bis_any_nonbepkts; 532 bool bcurrent_turbo_EDCA; 533 bool bis_cur_rdlstate; 534 535 bool bfsync_processing; 536 u32 rate_record; 537 u32 rateCountDiffRecord; 538 u32 ContinueDiffCount; 539 bool bswitch_fsync; 540 u8 framesync; 541 u32 framesyncC34; 542 u8 framesyncMonitor; 543 544 u32 reset_count; 545 546 enum reset_type ResetProgress; 547 bool bForcedSilentReset; 548 bool bDisableNormalResetCheck; 549 u16 TxCounter; 550 u16 RxCounter; 551 bool bResetInProgress; 552 bool force_reset; 553 bool force_lps; 554 555 bool chan_forced; 556 557 u8 PwrDomainProtect; 558 u8 H2CTxCmdSeq; 559 }; 560 561 extern const struct ethtool_ops rtl819x_ethtool_ops; 562 563 u8 rtl92e_readb(struct net_device *dev, int x); 564 u32 rtl92e_readl(struct net_device *dev, int x); 565 u16 rtl92e_readw(struct net_device *dev, int x); 566 void rtl92e_writeb(struct net_device *dev, int x, u8 y); 567 void rtl92e_writew(struct net_device *dev, int x, u16 y); 568 void rtl92e_writel(struct net_device *dev, int x, u32 y); 569 570 void force_pci_posting(struct net_device *dev); 571 572 void rtl92e_rx_enable(struct net_device *dev); 573 void rtl92e_tx_enable(struct net_device *dev); 574 575 void rtl92e_hw_sleep_wq(void *data); 576 void rtl92e_commit(struct net_device *dev); 577 578 void rtl92e_check_rfctrl_gpio_timer(struct timer_list *t); 579 580 void rtl92e_hw_wakeup_wq(void *data); 581 582 void rtl92e_reset_desc_ring(struct net_device *dev); 583 void rtl92e_set_wireless_mode(struct net_device *dev, u8 wireless_mode); 584 void rtl92e_irq_enable(struct net_device *dev); 585 void rtl92e_config_rate(struct net_device *dev, u16 *rate_config); 586 void rtl92e_irq_disable(struct net_device *dev); 587 588 void rtl92e_update_rx_pkt_timestamp(struct net_device *dev, 589 struct rtllib_rx_stats *stats); 590 long rtl92e_translate_to_dbm(struct r8192_priv *priv, u8 signal_strength_index); 591 void rtl92e_update_rx_statistics(struct r8192_priv *priv, 592 struct rtllib_rx_stats *pprevious_stats); 593 u8 rtl92e_evm_db_to_percent(s8 value); 594 u8 rtl92e_rx_db_to_percent(s8 antpower); 595 void rtl92e_copy_mpdu_stats(struct rtllib_rx_stats *psrc_stats, 596 struct rtllib_rx_stats *ptarget_stats); 597 bool rtl92e_enable_nic(struct net_device *dev); 598 bool rtl92e_disable_nic(struct net_device *dev); 599 600 bool rtl92e_set_rf_state(struct net_device *dev, 601 enum rt_rf_power_state StateToSet, 602 RT_RF_CHANGE_SOURCE ChangeSource); 603 #endif 604