1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Functions and registers to access AXP20X power management chip.
4  *
5  * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
6  */
7 
8 #ifndef __LINUX_MFD_AXP20X_H
9 #define __LINUX_MFD_AXP20X_H
10 
11 #include <linux/regmap.h>
12 
13 enum axp20x_variants {
14 	AXP152_ID = 0,
15 	AXP192_ID,
16 	AXP202_ID,
17 	AXP209_ID,
18 	AXP221_ID,
19 	AXP223_ID,
20 	AXP288_ID,
21 	AXP313A_ID,
22 	AXP803_ID,
23 	AXP806_ID,
24 	AXP809_ID,
25 	AXP813_ID,
26 	AXP15060_ID,
27 	NR_AXP20X_VARIANTS,
28 };
29 
30 #define AXP192_DATACACHE(m)		(0x06 + (m))
31 #define AXP20X_DATACACHE(m)		(0x04 + (m))
32 
33 /* Power supply */
34 #define AXP152_PWR_OP_MODE		0x01
35 #define AXP152_LDO3456_DC1234_CTRL	0x12
36 #define AXP152_ALDO_OP_MODE		0x13
37 #define AXP152_LDO0_CTRL		0x15
38 #define AXP152_DCDC2_V_OUT		0x23
39 #define AXP152_DCDC2_V_RAMP		0x25
40 #define AXP152_DCDC1_V_OUT		0x26
41 #define AXP152_DCDC3_V_OUT		0x27
42 #define AXP152_ALDO12_V_OUT		0x28
43 #define AXP152_DLDO1_V_OUT		0x29
44 #define AXP152_DLDO2_V_OUT		0x2a
45 #define AXP152_DCDC4_V_OUT		0x2b
46 #define AXP152_V_OFF			0x31
47 #define AXP152_OFF_CTRL			0x32
48 #define AXP152_PEK_KEY			0x36
49 #define AXP152_DCDC_FREQ		0x37
50 #define AXP152_DCDC_MODE		0x80
51 
52 #define AXP192_USB_OTG_STATUS		0x04
53 #define AXP192_PWR_OUT_CTRL		0x12
54 #define AXP192_DCDC2_V_OUT		0x23
55 #define AXP192_DCDC1_V_OUT		0x26
56 #define AXP192_DCDC3_V_OUT		0x27
57 #define AXP192_LDO2_3_V_OUT		0x28
58 
59 #define AXP20X_PWR_INPUT_STATUS		0x00
60 #define AXP20X_PWR_OP_MODE		0x01
61 #define AXP20X_USB_OTG_STATUS		0x02
62 #define AXP20X_PWR_OUT_CTRL		0x12
63 #define AXP20X_DCDC2_V_OUT		0x23
64 #define AXP20X_DCDC2_LDO3_V_RAMP	0x25
65 #define AXP20X_DCDC3_V_OUT		0x27
66 #define AXP20X_LDO24_V_OUT		0x28
67 #define AXP20X_LDO3_V_OUT		0x29
68 #define AXP20X_VBUS_IPSOUT_MGMT		0x30
69 #define AXP20X_V_OFF			0x31
70 #define AXP20X_OFF_CTRL			0x32
71 #define AXP20X_CHRG_CTRL1		0x33
72 #define AXP20X_CHRG_CTRL2		0x34
73 #define AXP20X_CHRG_BAK_CTRL		0x35
74 #define AXP20X_PEK_KEY			0x36
75 #define AXP20X_DCDC_FREQ		0x37
76 #define AXP20X_V_LTF_CHRG		0x38
77 #define AXP20X_V_HTF_CHRG		0x39
78 #define AXP20X_APS_WARN_L1		0x3a
79 #define AXP20X_APS_WARN_L2		0x3b
80 #define AXP20X_V_LTF_DISCHRG		0x3c
81 #define AXP20X_V_HTF_DISCHRG		0x3d
82 
83 #define AXP22X_PWR_OUT_CTRL1		0x10
84 #define AXP22X_PWR_OUT_CTRL2		0x12
85 #define AXP22X_PWR_OUT_CTRL3		0x13
86 #define AXP22X_DLDO1_V_OUT		0x15
87 #define AXP22X_DLDO2_V_OUT		0x16
88 #define AXP22X_DLDO3_V_OUT		0x17
89 #define AXP22X_DLDO4_V_OUT		0x18
90 #define AXP22X_ELDO1_V_OUT		0x19
91 #define AXP22X_ELDO2_V_OUT		0x1a
92 #define AXP22X_ELDO3_V_OUT		0x1b
93 #define AXP22X_DC5LDO_V_OUT		0x1c
94 #define AXP22X_DCDC1_V_OUT		0x21
95 #define AXP22X_DCDC2_V_OUT		0x22
96 #define AXP22X_DCDC3_V_OUT		0x23
97 #define AXP22X_DCDC4_V_OUT		0x24
98 #define AXP22X_DCDC5_V_OUT		0x25
99 #define AXP22X_DCDC23_V_RAMP_CTRL	0x27
100 #define AXP22X_ALDO1_V_OUT		0x28
101 #define AXP22X_ALDO2_V_OUT		0x29
102 #define AXP22X_ALDO3_V_OUT		0x2a
103 #define AXP22X_CHRG_CTRL3		0x35
104 
105 #define AXP313A_ON_INDICATE		0x00
106 #define AXP313A_OUTPUT_CONTROL		0x10
107 #define AXP313A_DCDC1_CONRTOL		0x13
108 #define AXP313A_DCDC2_CONRTOL		0x14
109 #define AXP313A_DCDC3_CONRTOL		0x15
110 #define AXP313A_ALDO1_CONRTOL		0x16
111 #define AXP313A_DLDO1_CONRTOL		0x17
112 #define AXP313A_SHUTDOWN_CTRL		0x1a
113 #define AXP313A_IRQ_EN			0x20
114 #define AXP313A_IRQ_STATE		0x21
115 
116 #define AXP806_STARTUP_SRC		0x00
117 #define AXP806_CHIP_ID			0x03
118 #define AXP806_PWR_OUT_CTRL1		0x10
119 #define AXP806_PWR_OUT_CTRL2		0x11
120 #define AXP806_DCDCA_V_CTRL		0x12
121 #define AXP806_DCDCB_V_CTRL		0x13
122 #define AXP806_DCDCC_V_CTRL		0x14
123 #define AXP806_DCDCD_V_CTRL		0x15
124 #define AXP806_DCDCE_V_CTRL		0x16
125 #define AXP806_ALDO1_V_CTRL		0x17
126 #define AXP806_ALDO2_V_CTRL		0x18
127 #define AXP806_ALDO3_V_CTRL		0x19
128 #define AXP806_DCDC_MODE_CTRL1		0x1a
129 #define AXP806_DCDC_MODE_CTRL2		0x1b
130 #define AXP806_DCDC_FREQ_CTRL		0x1c
131 #define AXP806_BLDO1_V_CTRL		0x20
132 #define AXP806_BLDO2_V_CTRL		0x21
133 #define AXP806_BLDO3_V_CTRL		0x22
134 #define AXP806_BLDO4_V_CTRL		0x23
135 #define AXP806_CLDO1_V_CTRL		0x24
136 #define AXP806_CLDO2_V_CTRL		0x25
137 #define AXP806_CLDO3_V_CTRL		0x26
138 #define AXP806_VREF_TEMP_WARN_L		0xf3
139 #define AXP806_BUS_ADDR_EXT		0xfe
140 #define AXP806_REG_ADDR_EXT		0xff
141 
142 #define AXP803_POLYPHASE_CTRL		0x14
143 #define AXP803_FLDO1_V_OUT		0x1c
144 #define AXP803_FLDO2_V_OUT		0x1d
145 #define AXP803_DCDC1_V_OUT		0x20
146 #define AXP803_DCDC2_V_OUT		0x21
147 #define AXP803_DCDC3_V_OUT		0x22
148 #define AXP803_DCDC4_V_OUT		0x23
149 #define AXP803_DCDC5_V_OUT		0x24
150 #define AXP803_DCDC6_V_OUT		0x25
151 #define AXP803_DCDC_FREQ_CTRL		0x3b
152 
153 /* Other DCDC regulator control registers are the same as AXP803 */
154 #define AXP813_DCDC7_V_OUT		0x26
155 
156 #define AXP15060_STARTUP_SRC		0x00
157 #define AXP15060_PWR_OUT_CTRL1		0x10
158 #define AXP15060_PWR_OUT_CTRL2		0x11
159 #define AXP15060_PWR_OUT_CTRL3		0x12
160 #define AXP15060_DCDC1_V_CTRL		0x13
161 #define AXP15060_DCDC2_V_CTRL		0x14
162 #define AXP15060_DCDC3_V_CTRL		0x15
163 #define AXP15060_DCDC4_V_CTRL		0x16
164 #define AXP15060_DCDC5_V_CTRL		0x17
165 #define AXP15060_DCDC6_V_CTRL		0x18
166 #define AXP15060_ALDO1_V_CTRL		0x19
167 #define AXP15060_DCDC_MODE_CTRL1		0x1a
168 #define AXP15060_DCDC_MODE_CTRL2		0x1b
169 #define AXP15060_OUTPUT_MONITOR_DISCHARGE		0x1e
170 #define AXP15060_IRQ_PWROK_VOFF		0x1f
171 #define AXP15060_ALDO2_V_CTRL		0x20
172 #define AXP15060_ALDO3_V_CTRL		0x21
173 #define AXP15060_ALDO4_V_CTRL		0x22
174 #define AXP15060_ALDO5_V_CTRL		0x23
175 #define AXP15060_BLDO1_V_CTRL		0x24
176 #define AXP15060_BLDO2_V_CTRL		0x25
177 #define AXP15060_BLDO3_V_CTRL		0x26
178 #define AXP15060_BLDO4_V_CTRL		0x27
179 #define AXP15060_BLDO5_V_CTRL		0x28
180 #define AXP15060_CLDO1_V_CTRL		0x29
181 #define AXP15060_CLDO2_V_CTRL		0x2a
182 #define AXP15060_CLDO3_V_CTRL		0x2b
183 #define AXP15060_CLDO4_V_CTRL		0x2d
184 #define AXP15060_CPUSLDO_V_CTRL		0x2e
185 #define AXP15060_PWR_WAKEUP_CTRL		0x31
186 #define AXP15060_PWR_DISABLE_DOWN_SEQ		0x32
187 #define AXP15060_PEK_KEY		0x36
188 
189 /* Interrupt */
190 #define AXP152_IRQ1_EN			0x40
191 #define AXP152_IRQ2_EN			0x41
192 #define AXP152_IRQ3_EN			0x42
193 #define AXP152_IRQ1_STATE		0x48
194 #define AXP152_IRQ2_STATE		0x49
195 #define AXP152_IRQ3_STATE		0x4a
196 
197 #define AXP192_IRQ1_EN			0x40
198 #define AXP192_IRQ2_EN			0x41
199 #define AXP192_IRQ3_EN			0x42
200 #define AXP192_IRQ4_EN			0x43
201 #define AXP192_IRQ1_STATE		0x44
202 #define AXP192_IRQ2_STATE		0x45
203 #define AXP192_IRQ3_STATE		0x46
204 #define AXP192_IRQ4_STATE		0x47
205 #define AXP192_IRQ5_EN			0x4a
206 #define AXP192_IRQ5_STATE		0x4d
207 
208 #define AXP20X_IRQ1_EN			0x40
209 #define AXP20X_IRQ2_EN			0x41
210 #define AXP20X_IRQ3_EN			0x42
211 #define AXP20X_IRQ4_EN			0x43
212 #define AXP20X_IRQ5_EN			0x44
213 #define AXP20X_IRQ6_EN			0x45
214 #define AXP20X_IRQ1_STATE		0x48
215 #define AXP20X_IRQ2_STATE		0x49
216 #define AXP20X_IRQ3_STATE		0x4a
217 #define AXP20X_IRQ4_STATE		0x4b
218 #define AXP20X_IRQ5_STATE		0x4c
219 #define AXP20X_IRQ6_STATE		0x4d
220 
221 #define AXP15060_IRQ1_EN		0x40
222 #define AXP15060_IRQ2_EN		0x41
223 #define AXP15060_IRQ1_STATE		0x48
224 #define AXP15060_IRQ2_STATE		0x49
225 
226 /* ADC */
227 #define AXP192_GPIO2_V_ADC_H		0x68
228 #define AXP192_GPIO2_V_ADC_L		0x69
229 #define AXP192_GPIO3_V_ADC_H		0x6a
230 #define AXP192_GPIO3_V_ADC_L		0x6b
231 
232 #define AXP20X_ACIN_V_ADC_H		0x56
233 #define AXP20X_ACIN_V_ADC_L		0x57
234 #define AXP20X_ACIN_I_ADC_H		0x58
235 #define AXP20X_ACIN_I_ADC_L		0x59
236 #define AXP20X_VBUS_V_ADC_H		0x5a
237 #define AXP20X_VBUS_V_ADC_L		0x5b
238 #define AXP20X_VBUS_I_ADC_H		0x5c
239 #define AXP20X_VBUS_I_ADC_L		0x5d
240 #define AXP20X_TEMP_ADC_H		0x5e
241 #define AXP20X_TEMP_ADC_L		0x5f
242 #define AXP20X_TS_IN_H			0x62
243 #define AXP20X_TS_IN_L			0x63
244 #define AXP20X_GPIO0_V_ADC_H		0x64
245 #define AXP20X_GPIO0_V_ADC_L		0x65
246 #define AXP20X_GPIO1_V_ADC_H		0x66
247 #define AXP20X_GPIO1_V_ADC_L		0x67
248 #define AXP20X_PWR_BATT_H		0x70
249 #define AXP20X_PWR_BATT_M		0x71
250 #define AXP20X_PWR_BATT_L		0x72
251 #define AXP20X_BATT_V_H			0x78
252 #define AXP20X_BATT_V_L			0x79
253 #define AXP20X_BATT_CHRG_I_H		0x7a
254 #define AXP20X_BATT_CHRG_I_L		0x7b
255 #define AXP20X_BATT_DISCHRG_I_H		0x7c
256 #define AXP20X_BATT_DISCHRG_I_L		0x7d
257 #define AXP20X_IPSOUT_V_HIGH_H		0x7e
258 #define AXP20X_IPSOUT_V_HIGH_L		0x7f
259 
260 /* Power supply */
261 #define AXP192_GPIO30_IN_RANGE		0x85
262 
263 #define AXP20X_DCDC_MODE		0x80
264 #define AXP20X_ADC_EN1			0x82
265 #define AXP20X_ADC_EN2			0x83
266 #define AXP20X_ADC_RATE			0x84
267 #define AXP20X_GPIO10_IN_RANGE		0x85
268 #define AXP20X_GPIO1_ADC_IRQ_RIS	0x86
269 #define AXP20X_GPIO1_ADC_IRQ_FAL	0x87
270 #define AXP20X_TIMER_CTRL		0x8a
271 #define AXP20X_VBUS_MON			0x8b
272 #define AXP20X_OVER_TMP			0x8f
273 
274 #define AXP22X_PWREN_CTRL1		0x8c
275 #define AXP22X_PWREN_CTRL2		0x8d
276 
277 /* GPIO */
278 #define AXP152_GPIO0_CTRL		0x90
279 #define AXP152_GPIO1_CTRL		0x91
280 #define AXP152_GPIO2_CTRL		0x92
281 #define AXP152_GPIO3_CTRL		0x93
282 #define AXP152_LDOGPIO2_V_OUT		0x96
283 #define AXP152_GPIO_INPUT		0x97
284 #define AXP152_PWM0_FREQ_X		0x98
285 #define AXP152_PWM0_FREQ_Y		0x99
286 #define AXP152_PWM0_DUTY_CYCLE		0x9a
287 #define AXP152_PWM1_FREQ_X		0x9b
288 #define AXP152_PWM1_FREQ_Y		0x9c
289 #define AXP152_PWM1_DUTY_CYCLE		0x9d
290 
291 #define AXP192_GPIO0_CTRL		0x90
292 #define AXP192_LDO_IO0_V_OUT		0x91
293 #define AXP192_GPIO1_CTRL		0x92
294 #define AXP192_GPIO2_CTRL		0x93
295 #define AXP192_GPIO2_0_STATE		0x94
296 #define AXP192_GPIO4_3_CTRL		0x95
297 #define AXP192_GPIO4_3_STATE		0x96
298 #define AXP192_GPIO2_0_PULL		0x97
299 #define AXP192_N_RSTO_CTRL		0x9e
300 
301 #define AXP20X_GPIO0_CTRL		0x90
302 #define AXP20X_LDO5_V_OUT		0x91
303 #define AXP20X_GPIO1_CTRL		0x92
304 #define AXP20X_GPIO2_CTRL		0x93
305 #define AXP20X_GPIO20_SS		0x94
306 #define AXP20X_GPIO3_CTRL		0x95
307 
308 #define AXP22X_LDO_IO0_V_OUT		0x91
309 #define AXP22X_LDO_IO1_V_OUT		0x93
310 #define AXP22X_GPIO_STATE		0x94
311 #define AXP22X_GPIO_PULL_DOWN		0x95
312 
313 #define AXP15060_CLDO4_GPIO2_MODESET		0x2c
314 
315 /* Battery */
316 #define AXP20X_CHRG_CC_31_24		0xb0
317 #define AXP20X_CHRG_CC_23_16		0xb1
318 #define AXP20X_CHRG_CC_15_8		0xb2
319 #define AXP20X_CHRG_CC_7_0		0xb3
320 #define AXP20X_DISCHRG_CC_31_24		0xb4
321 #define AXP20X_DISCHRG_CC_23_16		0xb5
322 #define AXP20X_DISCHRG_CC_15_8		0xb6
323 #define AXP20X_DISCHRG_CC_7_0		0xb7
324 #define AXP20X_CC_CTRL			0xb8
325 #define AXP20X_FG_RES			0xb9
326 
327 /* OCV */
328 #define AXP20X_RDC_H			0xba
329 #define AXP20X_RDC_L			0xbb
330 #define AXP20X_OCV(m)			(0xc0 + (m))
331 #define AXP20X_OCV_MAX			0xf
332 
333 /* AXP22X specific registers */
334 #define AXP22X_PMIC_TEMP_H		0x56
335 #define AXP22X_PMIC_TEMP_L		0x57
336 #define AXP22X_TS_ADC_H			0x58
337 #define AXP22X_TS_ADC_L			0x59
338 #define AXP22X_BATLOW_THRES1		0xe6
339 
340 /* AXP288/AXP803 specific registers */
341 #define AXP288_POWER_REASON		0x02
342 #define AXP288_BC_GLOBAL		0x2c
343 #define AXP288_BC_VBUS_CNTL		0x2d
344 #define AXP288_BC_USB_STAT		0x2e
345 #define AXP288_BC_DET_STAT		0x2f
346 #define AXP288_PMIC_ADC_H               0x56
347 #define AXP288_PMIC_ADC_L               0x57
348 #define AXP288_TS_ADC_H			0x58
349 #define AXP288_TS_ADC_L			0x59
350 #define AXP288_GP_ADC_H			0x5a
351 #define AXP288_GP_ADC_L			0x5b
352 #define AXP288_ADC_TS_PIN_CTRL          0x84
353 #define AXP288_RT_BATT_V_H		0xa0
354 #define AXP288_RT_BATT_V_L		0xa1
355 
356 #define AXP813_ACIN_PATH_CTRL		0x3a
357 #define AXP813_ADC_RATE			0x85
358 
359 /* Fuel Gauge */
360 #define AXP288_FG_RDC1_REG          0xba
361 #define AXP288_FG_RDC0_REG          0xbb
362 #define AXP288_FG_OCVH_REG          0xbc
363 #define AXP288_FG_OCVL_REG          0xbd
364 #define AXP288_FG_OCV_CURVE_REG     0xc0
365 #define AXP288_FG_DES_CAP1_REG      0xe0
366 #define AXP288_FG_DES_CAP0_REG      0xe1
367 #define AXP288_FG_CC_MTR1_REG       0xe2
368 #define AXP288_FG_CC_MTR0_REG       0xe3
369 #define AXP288_FG_OCV_CAP_REG       0xe4
370 #define AXP288_FG_CC_CAP_REG        0xe5
371 #define AXP288_FG_LOW_CAP_REG       0xe6
372 #define AXP288_FG_TUNE0             0xe8
373 #define AXP288_FG_TUNE1             0xe9
374 #define AXP288_FG_TUNE2             0xea
375 #define AXP288_FG_TUNE3             0xeb
376 #define AXP288_FG_TUNE4             0xec
377 #define AXP288_FG_TUNE5             0xed
378 
379 /* Regulators IDs */
380 enum {
381 	AXP192_DCDC1 = 0,
382 	AXP192_DCDC2,
383 	AXP192_DCDC3,
384 	AXP192_LDO1,
385 	AXP192_LDO2,
386 	AXP192_LDO3,
387 	AXP192_LDO_IO0,
388 	AXP192_REG_ID_MAX
389 };
390 
391 enum {
392 	AXP20X_LDO1 = 0,
393 	AXP20X_LDO2,
394 	AXP20X_LDO3,
395 	AXP20X_LDO4,
396 	AXP20X_LDO5,
397 	AXP20X_DCDC2,
398 	AXP20X_DCDC3,
399 	AXP20X_REG_ID_MAX,
400 };
401 
402 enum {
403 	AXP22X_DCDC1 = 0,
404 	AXP22X_DCDC2,
405 	AXP22X_DCDC3,
406 	AXP22X_DCDC4,
407 	AXP22X_DCDC5,
408 	AXP22X_DC1SW,
409 	AXP22X_DC5LDO,
410 	AXP22X_ALDO1,
411 	AXP22X_ALDO2,
412 	AXP22X_ALDO3,
413 	AXP22X_ELDO1,
414 	AXP22X_ELDO2,
415 	AXP22X_ELDO3,
416 	AXP22X_DLDO1,
417 	AXP22X_DLDO2,
418 	AXP22X_DLDO3,
419 	AXP22X_DLDO4,
420 	AXP22X_RTC_LDO,
421 	AXP22X_LDO_IO0,
422 	AXP22X_LDO_IO1,
423 	AXP22X_REG_ID_MAX,
424 };
425 
426 enum {
427 	AXP313A_DCDC1 = 0,
428 	AXP313A_DCDC2,
429 	AXP313A_DCDC3,
430 	AXP313A_ALDO1,
431 	AXP313A_DLDO1,
432 	AXP313A_RTC_LDO,
433 	AXP313A_REG_ID_MAX,
434 };
435 
436 enum {
437 	AXP806_DCDCA = 0,
438 	AXP806_DCDCB,
439 	AXP806_DCDCC,
440 	AXP806_DCDCD,
441 	AXP806_DCDCE,
442 	AXP806_ALDO1,
443 	AXP806_ALDO2,
444 	AXP806_ALDO3,
445 	AXP806_BLDO1,
446 	AXP806_BLDO2,
447 	AXP806_BLDO3,
448 	AXP806_BLDO4,
449 	AXP806_CLDO1,
450 	AXP806_CLDO2,
451 	AXP806_CLDO3,
452 	AXP806_SW,
453 	AXP806_REG_ID_MAX,
454 };
455 
456 enum {
457 	AXP809_DCDC1 = 0,
458 	AXP809_DCDC2,
459 	AXP809_DCDC3,
460 	AXP809_DCDC4,
461 	AXP809_DCDC5,
462 	AXP809_DC1SW,
463 	AXP809_DC5LDO,
464 	AXP809_ALDO1,
465 	AXP809_ALDO2,
466 	AXP809_ALDO3,
467 	AXP809_ELDO1,
468 	AXP809_ELDO2,
469 	AXP809_ELDO3,
470 	AXP809_DLDO1,
471 	AXP809_DLDO2,
472 	AXP809_RTC_LDO,
473 	AXP809_LDO_IO0,
474 	AXP809_LDO_IO1,
475 	AXP809_SW,
476 	AXP809_REG_ID_MAX,
477 };
478 
479 enum {
480 	AXP803_DCDC1 = 0,
481 	AXP803_DCDC2,
482 	AXP803_DCDC3,
483 	AXP803_DCDC4,
484 	AXP803_DCDC5,
485 	AXP803_DCDC6,
486 	AXP803_DC1SW,
487 	AXP803_ALDO1,
488 	AXP803_ALDO2,
489 	AXP803_ALDO3,
490 	AXP803_DLDO1,
491 	AXP803_DLDO2,
492 	AXP803_DLDO3,
493 	AXP803_DLDO4,
494 	AXP803_ELDO1,
495 	AXP803_ELDO2,
496 	AXP803_ELDO3,
497 	AXP803_FLDO1,
498 	AXP803_FLDO2,
499 	AXP803_RTC_LDO,
500 	AXP803_LDO_IO0,
501 	AXP803_LDO_IO1,
502 	AXP803_REG_ID_MAX,
503 };
504 
505 enum {
506 	AXP813_DCDC1 = 0,
507 	AXP813_DCDC2,
508 	AXP813_DCDC3,
509 	AXP813_DCDC4,
510 	AXP813_DCDC5,
511 	AXP813_DCDC6,
512 	AXP813_DCDC7,
513 	AXP813_ALDO1,
514 	AXP813_ALDO2,
515 	AXP813_ALDO3,
516 	AXP813_DLDO1,
517 	AXP813_DLDO2,
518 	AXP813_DLDO3,
519 	AXP813_DLDO4,
520 	AXP813_ELDO1,
521 	AXP813_ELDO2,
522 	AXP813_ELDO3,
523 	AXP813_FLDO1,
524 	AXP813_FLDO2,
525 	AXP813_FLDO3,
526 	AXP813_RTC_LDO,
527 	AXP813_LDO_IO0,
528 	AXP813_LDO_IO1,
529 	AXP813_SW,
530 	AXP813_REG_ID_MAX,
531 };
532 
533 enum {
534 	AXP15060_DCDC1 = 0,
535 	AXP15060_DCDC2,
536 	AXP15060_DCDC3,
537 	AXP15060_DCDC4,
538 	AXP15060_DCDC5,
539 	AXP15060_DCDC6,
540 	AXP15060_ALDO1,
541 	AXP15060_ALDO2,
542 	AXP15060_ALDO3,
543 	AXP15060_ALDO4,
544 	AXP15060_ALDO5,
545 	AXP15060_BLDO1,
546 	AXP15060_BLDO2,
547 	AXP15060_BLDO3,
548 	AXP15060_BLDO4,
549 	AXP15060_BLDO5,
550 	AXP15060_CLDO1,
551 	AXP15060_CLDO2,
552 	AXP15060_CLDO3,
553 	AXP15060_CLDO4,
554 	AXP15060_CPUSLDO,
555 	AXP15060_SW,
556 	AXP15060_RTC_LDO,
557 	AXP15060_REG_ID_MAX,
558 };
559 
560 /* IRQs */
561 enum {
562 	AXP152_IRQ_LDO0IN_CONNECT = 1,
563 	AXP152_IRQ_LDO0IN_REMOVAL,
564 	AXP152_IRQ_ALDO0IN_CONNECT,
565 	AXP152_IRQ_ALDO0IN_REMOVAL,
566 	AXP152_IRQ_DCDC1_V_LOW,
567 	AXP152_IRQ_DCDC2_V_LOW,
568 	AXP152_IRQ_DCDC3_V_LOW,
569 	AXP152_IRQ_DCDC4_V_LOW,
570 	AXP152_IRQ_PEK_SHORT,
571 	AXP152_IRQ_PEK_LONG,
572 	AXP152_IRQ_TIMER,
573 	/* out of bit order to make sure the press event is handled first */
574 	AXP152_IRQ_PEK_FAL_EDGE,
575 	AXP152_IRQ_PEK_RIS_EDGE,
576 	AXP152_IRQ_GPIO3_INPUT,
577 	AXP152_IRQ_GPIO2_INPUT,
578 	AXP152_IRQ_GPIO1_INPUT,
579 	AXP152_IRQ_GPIO0_INPUT,
580 };
581 
582 enum axp192_irqs {
583 	AXP192_IRQ_ACIN_OVER_V = 1,
584 	AXP192_IRQ_ACIN_PLUGIN,
585 	AXP192_IRQ_ACIN_REMOVAL,
586 	AXP192_IRQ_VBUS_OVER_V,
587 	AXP192_IRQ_VBUS_PLUGIN,
588 	AXP192_IRQ_VBUS_REMOVAL,
589 	AXP192_IRQ_VBUS_V_LOW,
590 	AXP192_IRQ_BATT_PLUGIN,
591 	AXP192_IRQ_BATT_REMOVAL,
592 	AXP192_IRQ_BATT_ENT_ACT_MODE,
593 	AXP192_IRQ_BATT_EXIT_ACT_MODE,
594 	AXP192_IRQ_CHARG,
595 	AXP192_IRQ_CHARG_DONE,
596 	AXP192_IRQ_BATT_TEMP_HIGH,
597 	AXP192_IRQ_BATT_TEMP_LOW,
598 	AXP192_IRQ_DIE_TEMP_HIGH,
599 	AXP192_IRQ_CHARG_I_LOW,
600 	AXP192_IRQ_DCDC1_V_LONG,
601 	AXP192_IRQ_DCDC2_V_LONG,
602 	AXP192_IRQ_DCDC3_V_LONG,
603 	AXP192_IRQ_PEK_SHORT = 22,
604 	AXP192_IRQ_PEK_LONG,
605 	AXP192_IRQ_N_OE_PWR_ON,
606 	AXP192_IRQ_N_OE_PWR_OFF,
607 	AXP192_IRQ_VBUS_VALID,
608 	AXP192_IRQ_VBUS_NOT_VALID,
609 	AXP192_IRQ_VBUS_SESS_VALID,
610 	AXP192_IRQ_VBUS_SESS_END,
611 	AXP192_IRQ_LOW_PWR_LVL = 31,
612 	AXP192_IRQ_TIMER,
613 	AXP192_IRQ_GPIO2_INPUT = 37,
614 	AXP192_IRQ_GPIO1_INPUT,
615 	AXP192_IRQ_GPIO0_INPUT,
616 };
617 
618 enum {
619 	AXP20X_IRQ_ACIN_OVER_V = 1,
620 	AXP20X_IRQ_ACIN_PLUGIN,
621 	AXP20X_IRQ_ACIN_REMOVAL,
622 	AXP20X_IRQ_VBUS_OVER_V,
623 	AXP20X_IRQ_VBUS_PLUGIN,
624 	AXP20X_IRQ_VBUS_REMOVAL,
625 	AXP20X_IRQ_VBUS_V_LOW,
626 	AXP20X_IRQ_BATT_PLUGIN,
627 	AXP20X_IRQ_BATT_REMOVAL,
628 	AXP20X_IRQ_BATT_ENT_ACT_MODE,
629 	AXP20X_IRQ_BATT_EXIT_ACT_MODE,
630 	AXP20X_IRQ_CHARG,
631 	AXP20X_IRQ_CHARG_DONE,
632 	AXP20X_IRQ_BATT_TEMP_HIGH,
633 	AXP20X_IRQ_BATT_TEMP_LOW,
634 	AXP20X_IRQ_DIE_TEMP_HIGH,
635 	AXP20X_IRQ_CHARG_I_LOW,
636 	AXP20X_IRQ_DCDC1_V_LONG,
637 	AXP20X_IRQ_DCDC2_V_LONG,
638 	AXP20X_IRQ_DCDC3_V_LONG,
639 	AXP20X_IRQ_PEK_SHORT = 22,
640 	AXP20X_IRQ_PEK_LONG,
641 	AXP20X_IRQ_N_OE_PWR_ON,
642 	AXP20X_IRQ_N_OE_PWR_OFF,
643 	AXP20X_IRQ_VBUS_VALID,
644 	AXP20X_IRQ_VBUS_NOT_VALID,
645 	AXP20X_IRQ_VBUS_SESS_VALID,
646 	AXP20X_IRQ_VBUS_SESS_END,
647 	AXP20X_IRQ_LOW_PWR_LVL1,
648 	AXP20X_IRQ_LOW_PWR_LVL2,
649 	AXP20X_IRQ_TIMER,
650 	/* out of bit order to make sure the press event is handled first */
651 	AXP20X_IRQ_PEK_FAL_EDGE,
652 	AXP20X_IRQ_PEK_RIS_EDGE,
653 	AXP20X_IRQ_GPIO3_INPUT,
654 	AXP20X_IRQ_GPIO2_INPUT,
655 	AXP20X_IRQ_GPIO1_INPUT,
656 	AXP20X_IRQ_GPIO0_INPUT,
657 };
658 
659 enum axp22x_irqs {
660 	AXP22X_IRQ_ACIN_OVER_V = 1,
661 	AXP22X_IRQ_ACIN_PLUGIN,
662 	AXP22X_IRQ_ACIN_REMOVAL,
663 	AXP22X_IRQ_VBUS_OVER_V,
664 	AXP22X_IRQ_VBUS_PLUGIN,
665 	AXP22X_IRQ_VBUS_REMOVAL,
666 	AXP22X_IRQ_VBUS_V_LOW,
667 	AXP22X_IRQ_BATT_PLUGIN,
668 	AXP22X_IRQ_BATT_REMOVAL,
669 	AXP22X_IRQ_BATT_ENT_ACT_MODE,
670 	AXP22X_IRQ_BATT_EXIT_ACT_MODE,
671 	AXP22X_IRQ_CHARG,
672 	AXP22X_IRQ_CHARG_DONE,
673 	AXP22X_IRQ_BATT_TEMP_HIGH,
674 	AXP22X_IRQ_BATT_TEMP_LOW,
675 	AXP22X_IRQ_DIE_TEMP_HIGH,
676 	AXP22X_IRQ_PEK_SHORT,
677 	AXP22X_IRQ_PEK_LONG,
678 	AXP22X_IRQ_LOW_PWR_LVL1,
679 	AXP22X_IRQ_LOW_PWR_LVL2,
680 	AXP22X_IRQ_TIMER,
681 	/* out of bit order to make sure the press event is handled first */
682 	AXP22X_IRQ_PEK_FAL_EDGE,
683 	AXP22X_IRQ_PEK_RIS_EDGE,
684 	AXP22X_IRQ_GPIO1_INPUT,
685 	AXP22X_IRQ_GPIO0_INPUT,
686 };
687 
688 enum axp288_irqs {
689 	AXP288_IRQ_VBUS_FALL     = 2,
690 	AXP288_IRQ_VBUS_RISE,
691 	AXP288_IRQ_OV,
692 	AXP288_IRQ_FALLING_ALT,
693 	AXP288_IRQ_RISING_ALT,
694 	AXP288_IRQ_OV_ALT,
695 	AXP288_IRQ_DONE          = 10,
696 	AXP288_IRQ_CHARGING,
697 	AXP288_IRQ_SAFE_QUIT,
698 	AXP288_IRQ_SAFE_ENTER,
699 	AXP288_IRQ_ABSENT,
700 	AXP288_IRQ_APPEND,
701 	AXP288_IRQ_QWBTU,
702 	AXP288_IRQ_WBTU,
703 	AXP288_IRQ_QWBTO,
704 	AXP288_IRQ_WBTO,
705 	AXP288_IRQ_QCBTU,
706 	AXP288_IRQ_CBTU,
707 	AXP288_IRQ_QCBTO,
708 	AXP288_IRQ_CBTO,
709 	AXP288_IRQ_WL2,
710 	AXP288_IRQ_WL1,
711 	AXP288_IRQ_GPADC,
712 	AXP288_IRQ_OT            = 31,
713 	AXP288_IRQ_GPIO0,
714 	AXP288_IRQ_GPIO1,
715 	AXP288_IRQ_POKO,
716 	AXP288_IRQ_POKL,
717 	AXP288_IRQ_POKS,
718 	AXP288_IRQ_POKN,
719 	AXP288_IRQ_POKP,
720 	AXP288_IRQ_TIMER,
721 	AXP288_IRQ_MV_CHNG,
722 	AXP288_IRQ_BC_USB_CHNG,
723 };
724 
725 enum axp313a_irqs {
726 	AXP313A_IRQ_DIE_TEMP_HIGH,
727 	AXP313A_IRQ_DCDC2_V_LOW = 2,
728 	AXP313A_IRQ_DCDC3_V_LOW,
729 	AXP313A_IRQ_PEK_LONG,
730 	AXP313A_IRQ_PEK_SHORT,
731 	AXP313A_IRQ_PEK_FAL_EDGE,
732 	AXP313A_IRQ_PEK_RIS_EDGE,
733 };
734 
735 enum axp803_irqs {
736 	AXP803_IRQ_ACIN_OVER_V = 1,
737 	AXP803_IRQ_ACIN_PLUGIN,
738 	AXP803_IRQ_ACIN_REMOVAL,
739 	AXP803_IRQ_VBUS_OVER_V,
740 	AXP803_IRQ_VBUS_PLUGIN,
741 	AXP803_IRQ_VBUS_REMOVAL,
742 	AXP803_IRQ_BATT_PLUGIN,
743 	AXP803_IRQ_BATT_REMOVAL,
744 	AXP803_IRQ_BATT_ENT_ACT_MODE,
745 	AXP803_IRQ_BATT_EXIT_ACT_MODE,
746 	AXP803_IRQ_CHARG,
747 	AXP803_IRQ_CHARG_DONE,
748 	AXP803_IRQ_BATT_CHG_TEMP_HIGH,
749 	AXP803_IRQ_BATT_CHG_TEMP_HIGH_END,
750 	AXP803_IRQ_BATT_CHG_TEMP_LOW,
751 	AXP803_IRQ_BATT_CHG_TEMP_LOW_END,
752 	AXP803_IRQ_BATT_ACT_TEMP_HIGH,
753 	AXP803_IRQ_BATT_ACT_TEMP_HIGH_END,
754 	AXP803_IRQ_BATT_ACT_TEMP_LOW,
755 	AXP803_IRQ_BATT_ACT_TEMP_LOW_END,
756 	AXP803_IRQ_DIE_TEMP_HIGH,
757 	AXP803_IRQ_GPADC,
758 	AXP803_IRQ_LOW_PWR_LVL1,
759 	AXP803_IRQ_LOW_PWR_LVL2,
760 	AXP803_IRQ_TIMER,
761 	/* out of bit order to make sure the press event is handled first */
762 	AXP803_IRQ_PEK_FAL_EDGE,
763 	AXP803_IRQ_PEK_RIS_EDGE,
764 	AXP803_IRQ_PEK_SHORT,
765 	AXP803_IRQ_PEK_LONG,
766 	AXP803_IRQ_PEK_OVER_OFF,
767 	AXP803_IRQ_GPIO1_INPUT,
768 	AXP803_IRQ_GPIO0_INPUT,
769 	AXP803_IRQ_BC_USB_CHNG,
770 	AXP803_IRQ_MV_CHNG,
771 };
772 
773 enum axp806_irqs {
774 	AXP806_IRQ_DIE_TEMP_HIGH_LV1,
775 	AXP806_IRQ_DIE_TEMP_HIGH_LV2,
776 	AXP806_IRQ_DCDCA_V_LOW,
777 	AXP806_IRQ_DCDCB_V_LOW,
778 	AXP806_IRQ_DCDCC_V_LOW,
779 	AXP806_IRQ_DCDCD_V_LOW,
780 	AXP806_IRQ_DCDCE_V_LOW,
781 	AXP806_IRQ_POK_LONG,
782 	AXP806_IRQ_POK_SHORT,
783 	AXP806_IRQ_WAKEUP,
784 	AXP806_IRQ_POK_FALL,
785 	AXP806_IRQ_POK_RISE,
786 };
787 
788 enum axp809_irqs {
789 	AXP809_IRQ_ACIN_OVER_V = 1,
790 	AXP809_IRQ_ACIN_PLUGIN,
791 	AXP809_IRQ_ACIN_REMOVAL,
792 	AXP809_IRQ_VBUS_OVER_V,
793 	AXP809_IRQ_VBUS_PLUGIN,
794 	AXP809_IRQ_VBUS_REMOVAL,
795 	AXP809_IRQ_VBUS_V_LOW,
796 	AXP809_IRQ_BATT_PLUGIN,
797 	AXP809_IRQ_BATT_REMOVAL,
798 	AXP809_IRQ_BATT_ENT_ACT_MODE,
799 	AXP809_IRQ_BATT_EXIT_ACT_MODE,
800 	AXP809_IRQ_CHARG,
801 	AXP809_IRQ_CHARG_DONE,
802 	AXP809_IRQ_BATT_CHG_TEMP_HIGH,
803 	AXP809_IRQ_BATT_CHG_TEMP_HIGH_END,
804 	AXP809_IRQ_BATT_CHG_TEMP_LOW,
805 	AXP809_IRQ_BATT_CHG_TEMP_LOW_END,
806 	AXP809_IRQ_BATT_ACT_TEMP_HIGH,
807 	AXP809_IRQ_BATT_ACT_TEMP_HIGH_END,
808 	AXP809_IRQ_BATT_ACT_TEMP_LOW,
809 	AXP809_IRQ_BATT_ACT_TEMP_LOW_END,
810 	AXP809_IRQ_DIE_TEMP_HIGH,
811 	AXP809_IRQ_LOW_PWR_LVL1,
812 	AXP809_IRQ_LOW_PWR_LVL2,
813 	AXP809_IRQ_TIMER,
814 	/* out of bit order to make sure the press event is handled first */
815 	AXP809_IRQ_PEK_FAL_EDGE,
816 	AXP809_IRQ_PEK_RIS_EDGE,
817 	AXP809_IRQ_PEK_SHORT,
818 	AXP809_IRQ_PEK_LONG,
819 	AXP809_IRQ_PEK_OVER_OFF,
820 	AXP809_IRQ_GPIO1_INPUT,
821 	AXP809_IRQ_GPIO0_INPUT,
822 };
823 
824 enum axp15060_irqs {
825 	AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1,
826 	AXP15060_IRQ_DIE_TEMP_HIGH_LV2,
827 	AXP15060_IRQ_DCDC1_V_LOW,
828 	AXP15060_IRQ_DCDC2_V_LOW,
829 	AXP15060_IRQ_DCDC3_V_LOW,
830 	AXP15060_IRQ_DCDC4_V_LOW,
831 	AXP15060_IRQ_DCDC5_V_LOW,
832 	AXP15060_IRQ_DCDC6_V_LOW,
833 	AXP15060_IRQ_PEK_LONG,
834 	AXP15060_IRQ_PEK_SHORT,
835 	AXP15060_IRQ_GPIO1_INPUT,
836 	AXP15060_IRQ_PEK_FAL_EDGE,
837 	AXP15060_IRQ_PEK_RIS_EDGE,
838 	AXP15060_IRQ_GPIO2_INPUT,
839 };
840 
841 struct axp20x_dev {
842 	struct device			*dev;
843 	int				irq;
844 	unsigned long			irq_flags;
845 	struct regmap			*regmap;
846 	struct regmap_irq_chip_data	*regmap_irqc;
847 	long				variant;
848 	int                             nr_cells;
849 	const struct mfd_cell           *cells;
850 	const struct regmap_config	*regmap_cfg;
851 	const struct regmap_irq_chip	*regmap_irq_chip;
852 };
853 
854 /* generic helper function for reading 9-16 bit wide regs */
axp20x_read_variable_width(struct regmap * regmap,unsigned int reg,unsigned int width)855 static inline int axp20x_read_variable_width(struct regmap *regmap,
856 	unsigned int reg, unsigned int width)
857 {
858 	unsigned int reg_val, result;
859 	int err;
860 
861 	err = regmap_read(regmap, reg, &reg_val);
862 	if (err)
863 		return err;
864 
865 	result = reg_val << (width - 8);
866 
867 	err = regmap_read(regmap, reg + 1, &reg_val);
868 	if (err)
869 		return err;
870 
871 	result |= reg_val;
872 
873 	return result;
874 }
875 
876 /**
877  * axp20x_match_device(): Setup axp20x variant related fields
878  *
879  * @axp20x: axp20x device to setup (.dev field must be set)
880  * @dev: device associated with this axp20x device
881  *
882  * This lets the axp20x core configure the mfd cells and register maps
883  * for later use.
884  */
885 int axp20x_match_device(struct axp20x_dev *axp20x);
886 
887 /**
888  * axp20x_device_probe(): Probe a configured axp20x device
889  *
890  * @axp20x: axp20x device to probe (must be configured)
891  *
892  * This function lets the axp20x core register the axp20x mfd devices
893  * and irqchip. The axp20x device passed in must be fully configured
894  * with axp20x_match_device, its irq set, and regmap created.
895  */
896 int axp20x_device_probe(struct axp20x_dev *axp20x);
897 
898 /**
899  * axp20x_device_remove(): Remove a axp20x device
900  *
901  * @axp20x: axp20x device to remove
902  *
903  * This tells the axp20x core to remove the associated mfd devices
904  */
905 void axp20x_device_remove(struct axp20x_dev *axp20x);
906 
907 #endif /* __LINUX_MFD_AXP20X_H */
908