1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _ASM_X86_ACPI_H
3 #define _ASM_X86_ACPI_H
4
5 /*
6 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
8 */
9 #include <acpi/pdc_intel.h>
10
11 #include <asm/numa.h>
12 #include <asm/fixmap.h>
13 #include <asm/processor.h>
14 #include <asm/mmu.h>
15 #include <asm/mpspec.h>
16 #include <asm/x86_init.h>
17
18 #ifdef CONFIG_ACPI_APEI
19 # include <asm/pgtable_types.h>
20 #endif
21
22 #ifdef CONFIG_ACPI
23 extern int acpi_lapic;
24 extern int acpi_ioapic;
25 extern int acpi_noirq;
26 extern int acpi_strict;
27 extern int acpi_disabled;
28 extern int acpi_pci_disabled;
29 extern int acpi_skip_timer_override;
30 extern int acpi_use_timer_override;
31 extern int acpi_fix_pin2_polarity;
32 extern int acpi_disable_cmcff;
33
34 extern u8 acpi_sci_flags;
35 extern u32 acpi_sci_override_gsi;
36 void acpi_pic_sci_set_trigger(unsigned int, u16);
37
38 struct device;
39
40 extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
41 int trigger, int polarity);
42 extern void (*__acpi_unregister_gsi)(u32 gsi);
43
disable_acpi(void)44 static inline void disable_acpi(void)
45 {
46 acpi_disabled = 1;
47 acpi_pci_disabled = 1;
48 acpi_noirq = 1;
49 }
50
51 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
52
acpi_noirq_set(void)53 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
acpi_disable_pci(void)54 static inline void acpi_disable_pci(void)
55 {
56 acpi_pci_disabled = 1;
57 acpi_noirq_set();
58 }
59
60 /* Low-level suspend routine. */
61 extern int (*acpi_suspend_lowlevel)(void);
62
63 /* Physical address to resume after wakeup */
64 unsigned long acpi_get_wakeup_address(void);
65
66 /*
67 * Check if the CPU can handle C2 and deeper
68 */
acpi_processor_cstate_check(unsigned int max_cstate)69 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
70 {
71 /*
72 * Early models (<=5) of AMD Opterons are not supposed to go into
73 * C2 state.
74 *
75 * Steppings 0x0A and later are good
76 */
77 if (boot_cpu_data.x86 == 0x0F &&
78 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
79 boot_cpu_data.x86_model <= 0x05 &&
80 boot_cpu_data.x86_stepping < 0x0A)
81 return 1;
82 else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E))
83 return 1;
84 else
85 return max_cstate;
86 }
87
arch_has_acpi_pdc(void)88 static inline bool arch_has_acpi_pdc(void)
89 {
90 struct cpuinfo_x86 *c = &cpu_data(0);
91 return (c->x86_vendor == X86_VENDOR_INTEL ||
92 c->x86_vendor == X86_VENDOR_CENTAUR);
93 }
94
arch_acpi_set_pdc_bits(u32 * buf)95 static inline void arch_acpi_set_pdc_bits(u32 *buf)
96 {
97 struct cpuinfo_x86 *c = &cpu_data(0);
98
99 buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
100
101 if (cpu_has(c, X86_FEATURE_EST))
102 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
103
104 if (cpu_has(c, X86_FEATURE_ACPI))
105 buf[2] |= ACPI_PDC_T_FFH;
106
107 /*
108 * If mwait/monitor is unsupported, C2/C3_FFH will be disabled
109 */
110 if (!cpu_has(c, X86_FEATURE_MWAIT))
111 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
112 }
113
acpi_has_cpu_in_madt(void)114 static inline bool acpi_has_cpu_in_madt(void)
115 {
116 return !!acpi_lapic;
117 }
118
119 #define ACPI_HAVE_ARCH_SET_ROOT_POINTER
acpi_arch_set_root_pointer(u64 addr)120 static inline void acpi_arch_set_root_pointer(u64 addr)
121 {
122 x86_init.acpi.set_root_pointer(addr);
123 }
124
125 #define ACPI_HAVE_ARCH_GET_ROOT_POINTER
acpi_arch_get_root_pointer(void)126 static inline u64 acpi_arch_get_root_pointer(void)
127 {
128 return x86_init.acpi.get_root_pointer();
129 }
130
131 void acpi_generic_reduced_hw_init(void);
132
133 void x86_default_set_root_pointer(u64 addr);
134 u64 x86_default_get_root_pointer(void);
135
136 #else /* !CONFIG_ACPI */
137
138 #define acpi_lapic 0
139 #define acpi_ioapic 0
140 #define acpi_disable_cmcff 0
acpi_noirq_set(void)141 static inline void acpi_noirq_set(void) { }
acpi_disable_pci(void)142 static inline void acpi_disable_pci(void) { }
disable_acpi(void)143 static inline void disable_acpi(void) { }
144
acpi_generic_reduced_hw_init(void)145 static inline void acpi_generic_reduced_hw_init(void) { }
146
x86_default_set_root_pointer(u64 addr)147 static inline void x86_default_set_root_pointer(u64 addr) { }
148
x86_default_get_root_pointer(void)149 static inline u64 x86_default_get_root_pointer(void)
150 {
151 return 0;
152 }
153
154 #endif /* !CONFIG_ACPI */
155
156 #define ARCH_HAS_POWER_INIT 1
157
158 #ifdef CONFIG_ACPI_NUMA
159 extern int x86_acpi_numa_init(void);
160 #endif /* CONFIG_ACPI_NUMA */
161
162 struct cper_ia_proc_ctx;
163
164 #ifdef CONFIG_ACPI_APEI
arch_apei_get_mem_attribute(phys_addr_t addr)165 static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr)
166 {
167 /*
168 * We currently have no way to look up the EFI memory map
169 * attributes for a region in a consistent way, because the
170 * memmap is discarded after efi_free_boot_services(). So if
171 * you call efi_mem_attributes() during boot and at runtime,
172 * you could theoretically see different attributes.
173 *
174 * We are yet to see any x86 platforms that require anything
175 * other than PAGE_KERNEL (some ARM64 platforms require the
176 * equivalent of PAGE_KERNEL_NOCACHE). Additionally, if SME
177 * is active, the ACPI information will not be encrypted,
178 * so return PAGE_KERNEL_NOENC until we know differently.
179 */
180 return PAGE_KERNEL_NOENC;
181 }
182
183 int arch_apei_report_x86_error(struct cper_ia_proc_ctx *ctx_info,
184 u64 lapic_id);
185 #else
arch_apei_report_x86_error(struct cper_ia_proc_ctx * ctx_info,u64 lapic_id)186 static inline int arch_apei_report_x86_error(struct cper_ia_proc_ctx *ctx_info,
187 u64 lapic_id)
188 {
189 return -EINVAL;
190 }
191 #endif
192
193 #define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT)
194
195 #endif /* _ASM_X86_ACPI_H */
196