1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2006 Intel Corp.
4  *     Tom Long Nguyen (tom.l.nguyen@intel.com)
5  *     Zhang Yanmin (yanmin.zhang@intel.com)
6  */
7 
8 #ifndef _AER_H_
9 #define _AER_H_
10 
11 #include <linux/errno.h>
12 #include <linux/types.h>
13 
14 #define AER_NONFATAL			0
15 #define AER_FATAL			1
16 #define AER_CORRECTABLE			2
17 #define DPC_FATAL			3
18 
19 struct pci_dev;
20 
21 struct aer_header_log_regs {
22 	unsigned int dw0;
23 	unsigned int dw1;
24 	unsigned int dw2;
25 	unsigned int dw3;
26 };
27 
28 struct aer_capability_regs {
29 	u32 header;
30 	u32 uncor_status;
31 	u32 uncor_mask;
32 	u32 uncor_severity;
33 	u32 cor_status;
34 	u32 cor_mask;
35 	u32 cap_control;
36 	struct aer_header_log_regs header_log;
37 	u32 root_command;
38 	u32 root_status;
39 	u16 cor_err_source;
40 	u16 uncor_err_source;
41 };
42 
43 #if defined(CONFIG_PCIEAER)
44 int pci_aer_clear_nonfatal_status(struct pci_dev *dev);
45 int pcie_aer_is_native(struct pci_dev *dev);
46 #else
pci_aer_clear_nonfatal_status(struct pci_dev * dev)47 static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev)
48 {
49 	return -EINVAL;
50 }
pcie_aer_is_native(struct pci_dev * dev)51 static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
52 #endif
53 
54 void cper_print_aer(struct pci_dev *dev, int aer_severity,
55 		    struct aer_capability_regs *aer);
56 int cper_severity_to_aer(int cper_severity);
57 void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
58 		       int severity, struct aer_capability_regs *aer_regs);
59 #endif //_AER_H_
60 
61