1 /*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21 #ifndef __SOUND_HDA_CODEC_H
22 #define __SOUND_HDA_CODEC_H
23
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/pcm.h>
27 #include <sound/hwdep.h>
28
29 /*
30 * nodes
31 */
32 #define AC_NODE_ROOT 0x00
33
34 /*
35 * function group types
36 */
37 enum {
38 AC_GRP_AUDIO_FUNCTION = 0x01,
39 AC_GRP_MODEM_FUNCTION = 0x02,
40 };
41
42 /*
43 * widget types
44 */
45 enum {
46 AC_WID_AUD_OUT, /* Audio Out */
47 AC_WID_AUD_IN, /* Audio In */
48 AC_WID_AUD_MIX, /* Audio Mixer */
49 AC_WID_AUD_SEL, /* Audio Selector */
50 AC_WID_PIN, /* Pin Complex */
51 AC_WID_POWER, /* Power */
52 AC_WID_VOL_KNB, /* Volume Knob */
53 AC_WID_BEEP, /* Beep Generator */
54 AC_WID_VENDOR = 0x0f /* Vendor specific */
55 };
56
57 /*
58 * GET verbs
59 */
60 #define AC_VERB_GET_STREAM_FORMAT 0x0a00
61 #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
62 #define AC_VERB_GET_PROC_COEF 0x0c00
63 #define AC_VERB_GET_COEF_INDEX 0x0d00
64 #define AC_VERB_PARAMETERS 0x0f00
65 #define AC_VERB_GET_CONNECT_SEL 0x0f01
66 #define AC_VERB_GET_CONNECT_LIST 0x0f02
67 #define AC_VERB_GET_PROC_STATE 0x0f03
68 #define AC_VERB_GET_SDI_SELECT 0x0f04
69 #define AC_VERB_GET_POWER_STATE 0x0f05
70 #define AC_VERB_GET_CONV 0x0f06
71 #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
72 #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
73 #define AC_VERB_GET_PIN_SENSE 0x0f09
74 #define AC_VERB_GET_BEEP_CONTROL 0x0f0a
75 #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
76 #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
77 #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
78 #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
79 /* f10-f1a: GPIO */
80 #define AC_VERB_GET_GPIO_DATA 0x0f15
81 #define AC_VERB_GET_GPIO_MASK 0x0f16
82 #define AC_VERB_GET_GPIO_DIRECTION 0x0f17
83 #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
84 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
85 #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
86 #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
87 /* f20: AFG/MFG */
88 #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
89 #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
90 #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
91 #define AC_VERB_GET_HDMI_ELDD 0x0f2f
92 #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
93 #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
94 #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
95 #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
96 #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
97
98 /*
99 * SET verbs
100 */
101 #define AC_VERB_SET_STREAM_FORMAT 0x200
102 #define AC_VERB_SET_AMP_GAIN_MUTE 0x300
103 #define AC_VERB_SET_PROC_COEF 0x400
104 #define AC_VERB_SET_COEF_INDEX 0x500
105 #define AC_VERB_SET_CONNECT_SEL 0x701
106 #define AC_VERB_SET_PROC_STATE 0x703
107 #define AC_VERB_SET_SDI_SELECT 0x704
108 #define AC_VERB_SET_POWER_STATE 0x705
109 #define AC_VERB_SET_CHANNEL_STREAMID 0x706
110 #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
111 #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
112 #define AC_VERB_SET_PIN_SENSE 0x709
113 #define AC_VERB_SET_BEEP_CONTROL 0x70a
114 #define AC_VERB_SET_EAPD_BTLENABLE 0x70c
115 #define AC_VERB_SET_DIGI_CONVERT_1 0x70d
116 #define AC_VERB_SET_DIGI_CONVERT_2 0x70e
117 #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
118 #define AC_VERB_SET_GPIO_DATA 0x715
119 #define AC_VERB_SET_GPIO_MASK 0x716
120 #define AC_VERB_SET_GPIO_DIRECTION 0x717
121 #define AC_VERB_SET_GPIO_WAKE_MASK 0x718
122 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
123 #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
124 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
125 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
126 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
127 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
128 #define AC_VERB_SET_EAPD 0x788
129 #define AC_VERB_SET_CODEC_RESET 0x7ff
130 #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
131 #define AC_VERB_SET_HDMI_DIP_INDEX 0x730
132 #define AC_VERB_SET_HDMI_DIP_DATA 0x731
133 #define AC_VERB_SET_HDMI_DIP_XMIT 0x732
134 #define AC_VERB_SET_HDMI_CP_CTRL 0x733
135 #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
136
137 /*
138 * Parameter IDs
139 */
140 #define AC_PAR_VENDOR_ID 0x00
141 #define AC_PAR_SUBSYSTEM_ID 0x01
142 #define AC_PAR_REV_ID 0x02
143 #define AC_PAR_NODE_COUNT 0x04
144 #define AC_PAR_FUNCTION_TYPE 0x05
145 #define AC_PAR_AUDIO_FG_CAP 0x08
146 #define AC_PAR_AUDIO_WIDGET_CAP 0x09
147 #define AC_PAR_PCM 0x0a
148 #define AC_PAR_STREAM 0x0b
149 #define AC_PAR_PIN_CAP 0x0c
150 #define AC_PAR_AMP_IN_CAP 0x0d
151 #define AC_PAR_CONNLIST_LEN 0x0e
152 #define AC_PAR_POWER_STATE 0x0f
153 #define AC_PAR_PROC_CAP 0x10
154 #define AC_PAR_GPIO_CAP 0x11
155 #define AC_PAR_AMP_OUT_CAP 0x12
156 #define AC_PAR_VOL_KNB_CAP 0x13
157 #define AC_PAR_HDMI_LPCM_CAP 0x20
158
159 /*
160 * AC_VERB_PARAMETERS results (32bit)
161 */
162
163 /* Function Group Type */
164 #define AC_FGT_TYPE (0xff<<0)
165 #define AC_FGT_TYPE_SHIFT 0
166 #define AC_FGT_UNSOL_CAP (1<<8)
167
168 /* Audio Function Group Capabilities */
169 #define AC_AFG_OUT_DELAY (0xf<<0)
170 #define AC_AFG_IN_DELAY (0xf<<8)
171 #define AC_AFG_BEEP_GEN (1<<16)
172
173 /* Audio Widget Capabilities */
174 #define AC_WCAP_STEREO (1<<0) /* stereo I/O */
175 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
176 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
177 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
178 #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
179 #define AC_WCAP_STRIPE (1<<5) /* stripe */
180 #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
181 #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
182 #define AC_WCAP_CONN_LIST (1<<8) /* connection list */
183 #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
184 #define AC_WCAP_POWER (1<<10) /* power control */
185 #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
186 #define AC_WCAP_CP_CAPS (1<<12) /* content protection */
187 #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
188 #define AC_WCAP_DELAY (0xf<<16)
189 #define AC_WCAP_DELAY_SHIFT 16
190 #define AC_WCAP_TYPE (0xf<<20)
191 #define AC_WCAP_TYPE_SHIFT 20
192
193 /* supported PCM rates and bits */
194 #define AC_SUPPCM_RATES (0xfff << 0)
195 #define AC_SUPPCM_BITS_8 (1<<16)
196 #define AC_SUPPCM_BITS_16 (1<<17)
197 #define AC_SUPPCM_BITS_20 (1<<18)
198 #define AC_SUPPCM_BITS_24 (1<<19)
199 #define AC_SUPPCM_BITS_32 (1<<20)
200
201 /* supported PCM stream format */
202 #define AC_SUPFMT_PCM (1<<0)
203 #define AC_SUPFMT_FLOAT32 (1<<1)
204 #define AC_SUPFMT_AC3 (1<<2)
205
206 /* GP I/O count */
207 #define AC_GPIO_IO_COUNT (0xff<<0)
208 #define AC_GPIO_O_COUNT (0xff<<8)
209 #define AC_GPIO_O_COUNT_SHIFT 8
210 #define AC_GPIO_I_COUNT (0xff<<16)
211 #define AC_GPIO_I_COUNT_SHIFT 16
212 #define AC_GPIO_UNSOLICITED (1<<30)
213 #define AC_GPIO_WAKE (1<<31)
214
215 /* Converter stream, channel */
216 #define AC_CONV_CHANNEL (0xf<<0)
217 #define AC_CONV_STREAM (0xf<<4)
218 #define AC_CONV_STREAM_SHIFT 4
219
220 /* Input converter SDI select */
221 #define AC_SDI_SELECT (0xf<<0)
222
223 /* stream format id */
224 #define AC_FMT_CHAN_SHIFT 0
225 #define AC_FMT_CHAN_MASK (0x0f << 0)
226 #define AC_FMT_BITS_SHIFT 4
227 #define AC_FMT_BITS_MASK (7 << 4)
228 #define AC_FMT_BITS_8 (0 << 4)
229 #define AC_FMT_BITS_16 (1 << 4)
230 #define AC_FMT_BITS_20 (2 << 4)
231 #define AC_FMT_BITS_24 (3 << 4)
232 #define AC_FMT_BITS_32 (4 << 4)
233 #define AC_FMT_DIV_SHIFT 8
234 #define AC_FMT_DIV_MASK (7 << 8)
235 #define AC_FMT_MULT_SHIFT 11
236 #define AC_FMT_MULT_MASK (7 << 11)
237 #define AC_FMT_BASE_SHIFT 14
238 #define AC_FMT_BASE_48K (0 << 14)
239 #define AC_FMT_BASE_44K (1 << 14)
240 #define AC_FMT_TYPE_SHIFT 15
241 #define AC_FMT_TYPE_PCM (0 << 15)
242 #define AC_FMT_TYPE_NON_PCM (1 << 15)
243
244 /* Unsolicited response control */
245 #define AC_UNSOL_TAG (0x3f<<0)
246 #define AC_UNSOL_ENABLED (1<<7)
247 #define AC_USRSP_EN AC_UNSOL_ENABLED
248
249 /* Unsolicited responses */
250 #define AC_UNSOL_RES_TAG (0x3f<<26)
251 #define AC_UNSOL_RES_TAG_SHIFT 26
252 #define AC_UNSOL_RES_SUBTAG (0x1f<<21)
253 #define AC_UNSOL_RES_SUBTAG_SHIFT 21
254 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
255 #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
256 #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
257 #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
258
259 /* Pin widget capabilies */
260 #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
261 #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
262 #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
263 #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
264 #define AC_PINCAP_OUT (1<<4) /* output capable */
265 #define AC_PINCAP_IN (1<<5) /* input capable */
266 #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
267 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
268 * but is marked reserved in the Intel HDA specification.
269 */
270 #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
271 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
272 * in HD-audio specification
273 */
274 #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
275 #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
276 * coexist with AC_PINCAP_HDMI
277 */
278 #define AC_PINCAP_VREF (0x37<<8)
279 #define AC_PINCAP_VREF_SHIFT 8
280 #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
281 #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
282 /* Vref status (used in pin cap) */
283 #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
284 #define AC_PINCAP_VREF_50 (1<<1) /* 50% */
285 #define AC_PINCAP_VREF_GRD (1<<2) /* ground */
286 #define AC_PINCAP_VREF_80 (1<<4) /* 80% */
287 #define AC_PINCAP_VREF_100 (1<<5) /* 100% */
288
289 /* Amplifier capabilities */
290 #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
291 #define AC_AMPCAP_OFFSET_SHIFT 0
292 #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
293 #define AC_AMPCAP_NUM_STEPS_SHIFT 8
294 #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
295 * in 0.25dB
296 */
297 #define AC_AMPCAP_STEP_SIZE_SHIFT 16
298 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */
299 #define AC_AMPCAP_MUTE_SHIFT 31
300
301 /* driver-specific amp-caps: using bits 24-30 */
302 #define AC_AMPCAP_MIN_MUTE (1 << 30) /* min-volume = mute */
303
304 /* Connection list */
305 #define AC_CLIST_LENGTH (0x7f<<0)
306 #define AC_CLIST_LONG (1<<7)
307
308 /* Supported power status */
309 #define AC_PWRST_D0SUP (1<<0)
310 #define AC_PWRST_D1SUP (1<<1)
311 #define AC_PWRST_D2SUP (1<<2)
312 #define AC_PWRST_D3SUP (1<<3)
313 #define AC_PWRST_D3COLDSUP (1<<4)
314 #define AC_PWRST_S3D3COLDSUP (1<<29)
315 #define AC_PWRST_CLKSTOP (1<<30)
316 #define AC_PWRST_EPSS (1U<<31)
317
318 /* Power state values */
319 #define AC_PWRST_SETTING (0xf<<0)
320 #define AC_PWRST_ACTUAL (0xf<<4)
321 #define AC_PWRST_ACTUAL_SHIFT 4
322 #define AC_PWRST_D0 0x00
323 #define AC_PWRST_D1 0x01
324 #define AC_PWRST_D2 0x02
325 #define AC_PWRST_D3 0x03
326
327 /* Processing capabilies */
328 #define AC_PCAP_BENIGN (1<<0)
329 #define AC_PCAP_NUM_COEF (0xff<<8)
330 #define AC_PCAP_NUM_COEF_SHIFT 8
331
332 /* Volume knobs capabilities */
333 #define AC_KNBCAP_NUM_STEPS (0x7f<<0)
334 #define AC_KNBCAP_DELTA (1<<7)
335
336 /* HDMI LPCM capabilities */
337 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
338 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
339 #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
340 #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
341 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
342 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
343 #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
344 #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
345 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
346 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
347 #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
348 #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
349 #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
350 #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
351
352 /*
353 * Control Parameters
354 */
355
356 /* Amp gain/mute */
357 #define AC_AMP_MUTE (1<<7)
358 #define AC_AMP_GAIN (0x7f)
359 #define AC_AMP_GET_INDEX (0xf<<0)
360
361 #define AC_AMP_GET_LEFT (1<<13)
362 #define AC_AMP_GET_RIGHT (0<<13)
363 #define AC_AMP_GET_OUTPUT (1<<15)
364 #define AC_AMP_GET_INPUT (0<<15)
365
366 #define AC_AMP_SET_INDEX (0xf<<8)
367 #define AC_AMP_SET_INDEX_SHIFT 8
368 #define AC_AMP_SET_RIGHT (1<<12)
369 #define AC_AMP_SET_LEFT (1<<13)
370 #define AC_AMP_SET_INPUT (1<<14)
371 #define AC_AMP_SET_OUTPUT (1<<15)
372
373 /* DIGITAL1 bits */
374 #define AC_DIG1_ENABLE (1<<0)
375 #define AC_DIG1_V (1<<1)
376 #define AC_DIG1_VCFG (1<<2)
377 #define AC_DIG1_EMPHASIS (1<<3)
378 #define AC_DIG1_COPYRIGHT (1<<4)
379 #define AC_DIG1_NONAUDIO (1<<5)
380 #define AC_DIG1_PROFESSIONAL (1<<6)
381 #define AC_DIG1_LEVEL (1<<7)
382
383 /* DIGITAL2 bits */
384 #define AC_DIG2_CC (0x7f<<0)
385
386 /* Pin widget control - 8bit */
387 #define AC_PINCTL_EPT (0x3<<0)
388 #define AC_PINCTL_EPT_NATIVE 0
389 #define AC_PINCTL_EPT_HBR 3
390 #define AC_PINCTL_VREFEN (0x7<<0)
391 #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
392 #define AC_PINCTL_VREF_50 1 /* 50% */
393 #define AC_PINCTL_VREF_GRD 2 /* ground */
394 #define AC_PINCTL_VREF_80 4 /* 80% */
395 #define AC_PINCTL_VREF_100 5 /* 100% */
396 #define AC_PINCTL_IN_EN (1<<5)
397 #define AC_PINCTL_OUT_EN (1<<6)
398 #define AC_PINCTL_HP_EN (1<<7)
399
400 /* Pin sense - 32bit */
401 #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
402 #define AC_PINSENSE_PRESENCE (1<<31)
403 #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
404
405 /* EAPD/BTL enable - 32bit */
406 #define AC_EAPDBTL_BALANCED (1<<0)
407 #define AC_EAPDBTL_EAPD (1<<1)
408 #define AC_EAPDBTL_LR_SWAP (1<<2)
409
410 /* HDMI ELD data */
411 #define AC_ELDD_ELD_VALID (1<<31)
412 #define AC_ELDD_ELD_DATA 0xff
413
414 /* HDMI DIP size */
415 #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
416 #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
417
418 /* HDMI DIP index */
419 #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
420 #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
421
422 /* HDMI DIP xmit (transmit) control */
423 #define AC_DIPXMIT_MASK (0x3<<6)
424 #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
425 #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
426 #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
427
428 /* HDMI content protection (CP) control */
429 #define AC_CPCTRL_CES (1<<9) /* current encryption state */
430 #define AC_CPCTRL_READY (1<<8) /* ready bit */
431 #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
432 #define AC_CPCTRL_STATE (3<<0) /* current CP request state */
433
434 /* Converter channel <-> HDMI slot mapping */
435 #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
436 #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
437
438 /* configuration default - 32bit */
439 #define AC_DEFCFG_SEQUENCE (0xf<<0)
440 #define AC_DEFCFG_DEF_ASSOC (0xf<<4)
441 #define AC_DEFCFG_ASSOC_SHIFT 4
442 #define AC_DEFCFG_MISC (0xf<<8)
443 #define AC_DEFCFG_MISC_SHIFT 8
444 #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
445 #define AC_DEFCFG_COLOR (0xf<<12)
446 #define AC_DEFCFG_COLOR_SHIFT 12
447 #define AC_DEFCFG_CONN_TYPE (0xf<<16)
448 #define AC_DEFCFG_CONN_TYPE_SHIFT 16
449 #define AC_DEFCFG_DEVICE (0xf<<20)
450 #define AC_DEFCFG_DEVICE_SHIFT 20
451 #define AC_DEFCFG_LOCATION (0x3f<<24)
452 #define AC_DEFCFG_LOCATION_SHIFT 24
453 #define AC_DEFCFG_PORT_CONN (0x3<<30)
454 #define AC_DEFCFG_PORT_CONN_SHIFT 30
455
456 /* device device types (0x0-0xf) */
457 enum {
458 AC_JACK_LINE_OUT,
459 AC_JACK_SPEAKER,
460 AC_JACK_HP_OUT,
461 AC_JACK_CD,
462 AC_JACK_SPDIF_OUT,
463 AC_JACK_DIG_OTHER_OUT,
464 AC_JACK_MODEM_LINE_SIDE,
465 AC_JACK_MODEM_HAND_SIDE,
466 AC_JACK_LINE_IN,
467 AC_JACK_AUX,
468 AC_JACK_MIC_IN,
469 AC_JACK_TELEPHONY,
470 AC_JACK_SPDIF_IN,
471 AC_JACK_DIG_OTHER_IN,
472 AC_JACK_OTHER = 0xf,
473 };
474
475 /* jack connection types (0x0-0xf) */
476 enum {
477 AC_JACK_CONN_UNKNOWN,
478 AC_JACK_CONN_1_8,
479 AC_JACK_CONN_1_4,
480 AC_JACK_CONN_ATAPI,
481 AC_JACK_CONN_RCA,
482 AC_JACK_CONN_OPTICAL,
483 AC_JACK_CONN_OTHER_DIGITAL,
484 AC_JACK_CONN_OTHER_ANALOG,
485 AC_JACK_CONN_DIN,
486 AC_JACK_CONN_XLR,
487 AC_JACK_CONN_RJ11,
488 AC_JACK_CONN_COMB,
489 AC_JACK_CONN_OTHER = 0xf,
490 };
491
492 /* jack colors (0x0-0xf) */
493 enum {
494 AC_JACK_COLOR_UNKNOWN,
495 AC_JACK_COLOR_BLACK,
496 AC_JACK_COLOR_GREY,
497 AC_JACK_COLOR_BLUE,
498 AC_JACK_COLOR_GREEN,
499 AC_JACK_COLOR_RED,
500 AC_JACK_COLOR_ORANGE,
501 AC_JACK_COLOR_YELLOW,
502 AC_JACK_COLOR_PURPLE,
503 AC_JACK_COLOR_PINK,
504 AC_JACK_COLOR_WHITE = 0xe,
505 AC_JACK_COLOR_OTHER,
506 };
507
508 /* Jack location (0x0-0x3f) */
509 /* common case */
510 enum {
511 AC_JACK_LOC_NONE,
512 AC_JACK_LOC_REAR,
513 AC_JACK_LOC_FRONT,
514 AC_JACK_LOC_LEFT,
515 AC_JACK_LOC_RIGHT,
516 AC_JACK_LOC_TOP,
517 AC_JACK_LOC_BOTTOM,
518 };
519 /* bits 4-5 */
520 enum {
521 AC_JACK_LOC_EXTERNAL = 0x00,
522 AC_JACK_LOC_INTERNAL = 0x10,
523 AC_JACK_LOC_SEPARATE = 0x20,
524 AC_JACK_LOC_OTHER = 0x30,
525 };
526 enum {
527 /* external on primary chasis */
528 AC_JACK_LOC_REAR_PANEL = 0x07,
529 AC_JACK_LOC_DRIVE_BAY,
530 /* internal */
531 AC_JACK_LOC_RISER = 0x17,
532 AC_JACK_LOC_HDMI,
533 AC_JACK_LOC_ATAPI,
534 /* others */
535 AC_JACK_LOC_MOBILE_IN = 0x37,
536 AC_JACK_LOC_MOBILE_OUT,
537 };
538
539 /* Port connectivity (0-3) */
540 enum {
541 AC_JACK_PORT_COMPLEX,
542 AC_JACK_PORT_NONE,
543 AC_JACK_PORT_FIXED,
544 AC_JACK_PORT_BOTH,
545 };
546
547 /* max. connections to a widget */
548 #define HDA_MAX_CONNECTIONS 32
549
550 /* max. codec address */
551 #define HDA_MAX_CODEC_ADDRESS 0x0f
552
553 /*
554 * generic arrays
555 */
556 struct snd_array {
557 unsigned int used;
558 unsigned int alloced;
559 unsigned int elem_size;
560 unsigned int alloc_align;
561 void *list;
562 };
563
564 void *snd_array_new(struct snd_array *array);
565 void snd_array_free(struct snd_array *array);
snd_array_init(struct snd_array * array,unsigned int size,unsigned int align)566 static inline void snd_array_init(struct snd_array *array, unsigned int size,
567 unsigned int align)
568 {
569 array->elem_size = size;
570 array->alloc_align = align;
571 }
572
snd_array_elem(struct snd_array * array,unsigned int idx)573 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
574 {
575 return array->list + idx * array->elem_size;
576 }
577
snd_array_index(struct snd_array * array,void * ptr)578 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
579 {
580 return (unsigned long)(ptr - array->list) / array->elem_size;
581 }
582
583 /*
584 * Structures
585 */
586
587 struct hda_bus;
588 struct hda_beep;
589 struct hda_codec;
590 struct hda_pcm;
591 struct hda_pcm_stream;
592 struct hda_bus_unsolicited;
593
594 /* NID type */
595 typedef u16 hda_nid_t;
596
597 /* bus operators */
598 struct hda_bus_ops {
599 /* send a single command */
600 int (*command)(struct hda_bus *bus, unsigned int cmd);
601 /* get a response from the last command */
602 unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
603 /* free the private data */
604 void (*private_free)(struct hda_bus *);
605 /* attach a PCM stream */
606 int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
607 struct hda_pcm *pcm);
608 /* reset bus for retry verb */
609 void (*bus_reset)(struct hda_bus *bus);
610 #ifdef CONFIG_SND_HDA_POWER_SAVE
611 /* notify power-up/down from codec to controller */
612 void (*pm_notify)(struct hda_bus *bus);
613 #endif
614 };
615
616 /* template to pass to the bus constructor */
617 struct hda_bus_template {
618 void *private_data;
619 struct pci_dev *pci;
620 const char *modelname;
621 int *power_save;
622 struct hda_bus_ops ops;
623 };
624
625 /*
626 * codec bus
627 *
628 * each controller needs to creata a hda_bus to assign the accessor.
629 * A hda_bus contains several codecs in the list codec_list.
630 */
631 struct hda_bus {
632 struct snd_card *card;
633
634 /* copied from template */
635 void *private_data;
636 struct pci_dev *pci;
637 const char *modelname;
638 int *power_save;
639 struct hda_bus_ops ops;
640
641 /* codec linked list */
642 struct list_head codec_list;
643 /* link caddr -> codec */
644 struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
645
646 struct mutex cmd_mutex;
647 struct mutex prepare_mutex;
648
649 /* unsolicited event queue */
650 struct hda_bus_unsolicited *unsol;
651 char workq_name[16];
652 struct workqueue_struct *workq; /* common workqueue for codecs */
653
654 /* assigned PCMs */
655 DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
656
657 /* misc op flags */
658 unsigned int needs_damn_long_delay :1;
659 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
660 unsigned int sync_write:1; /* sync after verb write */
661 /* status for codec/controller */
662 unsigned int shutdown :1; /* being unloaded */
663 unsigned int rirb_error:1; /* error in codec communication */
664 unsigned int response_reset:1; /* controller was reset */
665 unsigned int in_reset:1; /* during reset operation */
666 unsigned int power_keep_link_on:1; /* don't power off HDA link */
667 };
668
669 /*
670 * codec preset
671 *
672 * Known codecs have the patch to build and set up the controls/PCMs
673 * better than the generic parser.
674 */
675 struct hda_codec_preset {
676 unsigned int id;
677 unsigned int mask;
678 unsigned int subs;
679 unsigned int subs_mask;
680 unsigned int rev;
681 hda_nid_t afg, mfg;
682 const char *name;
683 int (*patch)(struct hda_codec *codec);
684 };
685
686 struct hda_codec_preset_list {
687 const struct hda_codec_preset *preset;
688 struct module *owner;
689 struct list_head list;
690 };
691
692 /* initial hook */
693 int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
694 int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
695
696 /* ops set by the preset patch */
697 struct hda_codec_ops {
698 int (*build_controls)(struct hda_codec *codec);
699 int (*build_pcms)(struct hda_codec *codec);
700 int (*init)(struct hda_codec *codec);
701 void (*free)(struct hda_codec *codec);
702 void (*unsol_event)(struct hda_codec *codec, unsigned int res);
703 void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
704 unsigned int power_state);
705 #ifdef CONFIG_PM
706 int (*suspend)(struct hda_codec *codec, pm_message_t state);
707 int (*post_suspend)(struct hda_codec *codec);
708 int (*pre_resume)(struct hda_codec *codec);
709 int (*resume)(struct hda_codec *codec);
710 #endif
711 #ifdef CONFIG_SND_HDA_POWER_SAVE
712 int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
713 #endif
714 void (*reboot_notify)(struct hda_codec *codec);
715 };
716
717 /* record for amp information cache */
718 struct hda_cache_head {
719 u32 key; /* hash key */
720 u16 val; /* assigned value */
721 u16 next; /* next link; -1 = terminal */
722 };
723
724 struct hda_amp_info {
725 struct hda_cache_head head;
726 u32 amp_caps; /* amp capabilities */
727 u16 vol[2]; /* current volume & mute */
728 };
729
730 struct hda_cache_rec {
731 u16 hash[64]; /* hash table for index */
732 struct snd_array buf; /* record entries */
733 };
734
735 /* PCM callbacks */
736 struct hda_pcm_ops {
737 int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
738 struct snd_pcm_substream *substream);
739 int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
740 struct snd_pcm_substream *substream);
741 int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
742 unsigned int stream_tag, unsigned int format,
743 struct snd_pcm_substream *substream);
744 int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
745 struct snd_pcm_substream *substream);
746 };
747
748 /* PCM information for each substream */
749 struct hda_pcm_stream {
750 unsigned int substreams; /* number of substreams, 0 = not exist*/
751 unsigned int channels_min; /* min. number of channels */
752 unsigned int channels_max; /* max. number of channels */
753 hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
754 u32 rates; /* supported rates */
755 u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
756 unsigned int maxbps; /* supported max. bit per sample */
757 struct hda_pcm_ops ops;
758 };
759
760 /* PCM types */
761 enum {
762 HDA_PCM_TYPE_AUDIO,
763 HDA_PCM_TYPE_SPDIF,
764 HDA_PCM_TYPE_HDMI,
765 HDA_PCM_TYPE_MODEM,
766 HDA_PCM_NTYPES
767 };
768
769 /* for PCM creation */
770 struct hda_pcm {
771 char *name;
772 struct hda_pcm_stream stream[2];
773 unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
774 int device; /* device number to assign */
775 struct snd_pcm *pcm; /* assigned PCM instance */
776 };
777
778 /* codec information */
779 struct hda_codec {
780 struct hda_bus *bus;
781 unsigned int addr; /* codec addr*/
782 struct list_head list; /* list point */
783
784 hda_nid_t afg; /* AFG node id */
785 hda_nid_t mfg; /* MFG node id */
786
787 /* ids */
788 u8 afg_function_id;
789 u8 mfg_function_id;
790 u8 afg_unsol;
791 u8 mfg_unsol;
792 u32 vendor_id;
793 u32 subsystem_id;
794 u32 revision_id;
795
796 /* detected preset */
797 const struct hda_codec_preset *preset;
798 struct module *owner;
799 const char *vendor_name; /* codec vendor name */
800 const char *chip_name; /* codec chip name */
801 const char *modelname; /* model name for preset */
802
803 /* set by patch */
804 struct hda_codec_ops patch_ops;
805
806 /* PCM to create, set by patch_ops.build_pcms callback */
807 unsigned int num_pcms;
808 struct hda_pcm *pcm_info;
809
810 /* codec specific info */
811 void *spec;
812
813 /* beep device */
814 struct hda_beep *beep;
815 unsigned int beep_mode;
816
817 /* widget capabilities cache */
818 unsigned int num_nodes;
819 hda_nid_t start_nid;
820 u32 *wcaps;
821
822 struct snd_array mixers; /* list of assigned mixer elements */
823 struct snd_array nids; /* list of mapped mixer elements */
824
825 struct hda_cache_rec amp_cache; /* cache for amp access */
826 struct hda_cache_rec cmd_cache; /* cache for other commands */
827
828 struct snd_array conn_lists; /* connection-list array */
829
830 struct mutex spdif_mutex;
831 struct mutex control_mutex;
832 struct snd_array spdif_out;
833 unsigned int spdif_in_enable; /* SPDIF input enable? */
834 const hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
835 struct snd_array init_pins; /* initial (BIOS) pin configurations */
836 struct snd_array driver_pins; /* pin configs set by codec parser */
837 struct snd_array cvt_setups; /* audio convert setups */
838
839 #ifdef CONFIG_SND_HDA_HWDEP
840 struct snd_hwdep *hwdep; /* assigned hwdep device */
841 struct snd_array init_verbs; /* additional init verbs */
842 struct snd_array hints; /* additional hints */
843 struct snd_array user_pins; /* default pin configs to override */
844 #endif
845
846 /* misc flags */
847 unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
848 * status change
849 * (e.g. Realtek codecs)
850 */
851 unsigned int pin_amp_workaround:1; /* pin out-amp takes index
852 * (e.g. Conexant codecs)
853 */
854 unsigned int single_adc_amp:1; /* adc in-amp takes no index
855 * (e.g. CX20549 codec)
856 */
857 unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
858 unsigned int pins_shutup:1; /* pins are shut up */
859 unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
860 unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */
861 unsigned int no_jack_detect:1; /* Machine has no jack-detection */
862 #ifdef CONFIG_SND_HDA_POWER_SAVE
863 unsigned int power_on :1; /* current (global) power-state */
864 unsigned int power_transition :1; /* power-state in transition */
865 int power_count; /* current (global) power refcount */
866 struct delayed_work power_work; /* delayed task for powerdown */
867 unsigned long power_on_acct;
868 unsigned long power_off_acct;
869 unsigned long power_jiffies;
870 #endif
871
872 /* codec-specific additional proc output */
873 void (*proc_widget_hook)(struct snd_info_buffer *buffer,
874 struct hda_codec *codec, hda_nid_t nid);
875
876 /* jack detection */
877 struct snd_array jacktbl;
878
879 #ifdef CONFIG_SND_HDA_INPUT_JACK
880 /* jack detection */
881 struct snd_array jacks;
882 #endif
883 };
884
885 /* direction */
886 enum {
887 HDA_INPUT, HDA_OUTPUT
888 };
889
890
891 /*
892 * constructors
893 */
894 int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
895 struct hda_bus **busp);
896 int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
897 struct hda_codec **codecp);
898 int snd_hda_codec_configure(struct hda_codec *codec);
899
900 /*
901 * low level functions
902 */
903 unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
904 int direct,
905 unsigned int verb, unsigned int parm);
906 int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
907 unsigned int verb, unsigned int parm);
908 #define snd_hda_param_read(codec, nid, param) \
909 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
910 int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
911 hda_nid_t *start_id);
912 int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
913 hda_nid_t *conn_list, int max_conns);
914 int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid,
915 hda_nid_t *conn_list, int max_conns);
916 int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
917 const hda_nid_t **listp);
918 int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
919 const hda_nid_t *list);
920 int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
921 hda_nid_t nid, int recursive);
922 int snd_hda_query_supported_pcm(struct hda_codec *codec, hda_nid_t nid,
923 u32 *ratesp, u64 *formatsp, unsigned int *bpsp);
924
925 struct hda_verb {
926 hda_nid_t nid;
927 u32 verb;
928 u32 param;
929 };
930
931 void snd_hda_sequence_write(struct hda_codec *codec,
932 const struct hda_verb *seq);
933
934 /* unsolicited event */
935 int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
936
937 /* cached write */
938 #ifdef CONFIG_PM
939 int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
940 int direct, unsigned int verb, unsigned int parm);
941 void snd_hda_sequence_write_cache(struct hda_codec *codec,
942 const struct hda_verb *seq);
943 int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
944 int direct, unsigned int verb, unsigned int parm);
945 void snd_hda_codec_resume_cache(struct hda_codec *codec);
946 #else
947 #define snd_hda_codec_write_cache snd_hda_codec_write
948 #define snd_hda_codec_update_cache snd_hda_codec_write
949 #define snd_hda_sequence_write_cache snd_hda_sequence_write
950 #endif
951
952 /* the struct for codec->pin_configs */
953 struct hda_pincfg {
954 hda_nid_t nid;
955 unsigned char ctrl; /* current pin control value */
956 unsigned char pad; /* reserved */
957 unsigned int cfg; /* default configuration */
958 };
959
960 unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
961 int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
962 unsigned int cfg);
963 int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
964 hda_nid_t nid, unsigned int cfg); /* for hwdep */
965 void snd_hda_shutup_pins(struct hda_codec *codec);
966
967 /* SPDIF controls */
968 struct hda_spdif_out {
969 hda_nid_t nid; /* Converter nid values relate to */
970 unsigned int status; /* IEC958 status bits */
971 unsigned short ctls; /* SPDIF control bits */
972 };
973 struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
974 hda_nid_t nid);
975 void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
976 void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
977
978 /*
979 * Mixer
980 */
981 int snd_hda_build_controls(struct hda_bus *bus);
982 int snd_hda_codec_build_controls(struct hda_codec *codec);
983
984 /*
985 * PCM
986 */
987 int snd_hda_build_pcms(struct hda_bus *bus);
988 int snd_hda_codec_build_pcms(struct hda_codec *codec);
989
990 int snd_hda_codec_prepare(struct hda_codec *codec,
991 struct hda_pcm_stream *hinfo,
992 unsigned int stream,
993 unsigned int format,
994 struct snd_pcm_substream *substream);
995 void snd_hda_codec_cleanup(struct hda_codec *codec,
996 struct hda_pcm_stream *hinfo,
997 struct snd_pcm_substream *substream);
998
999 void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
1000 u32 stream_tag,
1001 int channel_id, int format);
1002 void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
1003 int do_now);
1004 #define snd_hda_codec_cleanup_stream(codec, nid) \
1005 __snd_hda_codec_cleanup_stream(codec, nid, 0)
1006 unsigned int snd_hda_calc_stream_format(unsigned int rate,
1007 unsigned int channels,
1008 unsigned int format,
1009 unsigned int maxbps,
1010 unsigned short spdif_ctls);
1011 int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
1012 unsigned int format);
1013
1014 /*
1015 * Misc
1016 */
1017 void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
1018 void snd_hda_bus_reboot_notify(struct hda_bus *bus);
1019 void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
1020 unsigned int power_state,
1021 bool eapd_workaround);
1022
1023 /*
1024 * power management
1025 */
1026 #ifdef CONFIG_PM
1027 int snd_hda_suspend(struct hda_bus *bus);
1028 int snd_hda_resume(struct hda_bus *bus);
1029 #endif
1030
1031 static inline
hda_call_check_power_status(struct hda_codec * codec,hda_nid_t nid)1032 int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1033 {
1034 #ifdef CONFIG_SND_HDA_POWER_SAVE
1035 if (codec->patch_ops.check_power_status)
1036 return codec->patch_ops.check_power_status(codec, nid);
1037 #endif
1038 return 0;
1039 }
1040
1041 /*
1042 * get widget information
1043 */
1044 const char *snd_hda_get_jack_connectivity(u32 cfg);
1045 const char *snd_hda_get_jack_type(u32 cfg);
1046 const char *snd_hda_get_jack_location(u32 cfg);
1047
1048 /*
1049 * power saving
1050 */
1051 #ifdef CONFIG_SND_HDA_POWER_SAVE
1052 void snd_hda_power_up(struct hda_codec *codec);
1053 void snd_hda_power_down(struct hda_codec *codec);
1054 #define snd_hda_codec_needs_resume(codec) codec->power_count
1055 void snd_hda_update_power_acct(struct hda_codec *codec);
1056 #else
snd_hda_power_up(struct hda_codec * codec)1057 static inline void snd_hda_power_up(struct hda_codec *codec) {}
snd_hda_power_down(struct hda_codec * codec)1058 static inline void snd_hda_power_down(struct hda_codec *codec) {}
1059 #define snd_hda_codec_needs_resume(codec) 1
1060 #endif
1061
1062 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1063 /*
1064 * patch firmware
1065 */
1066 int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
1067 #endif
1068
1069 /*
1070 * Codec modularization
1071 */
1072
1073 /* Export symbols only for communication with codec drivers;
1074 * When built in kernel, all HD-audio drivers are supposed to be statically
1075 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
1076 * exported unless it's built as a module.
1077 */
1078 #ifdef MODULE
1079 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1080 #else
1081 #define EXPORT_SYMBOL_HDA(sym)
1082 #endif
1083
1084 #endif /* __SOUND_HDA_CODEC_H */
1085