1 /*
2  * Universal Interface for Intel High Definition Audio Codec
3  *
4  * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5  *
6  *  This program is free software; you can redistribute it and/or modify it
7  *  under the terms of the GNU General Public License as published by the Free
8  *  Software Foundation; either version 2 of the License, or (at your option)
9  *  any later version.
10  *
11  *  This program is distributed in the hope that it will be useful, but WITHOUT
12  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  *  more details.
15  *
16  *  You should have received a copy of the GNU General Public License along with
17  *  this program; if not, write to the Free Software Foundation, Inc., 59
18  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
19  */
20 
21 #ifndef __SOUND_HDA_CODEC_H
22 #define __SOUND_HDA_CODEC_H
23 
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/pcm.h>
27 #include <sound/hwdep.h>
28 
29 #if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
30 #define SND_HDA_NEEDS_RESUME	/* resume control code is required */
31 #endif
32 
33 /*
34  * nodes
35  */
36 #define	AC_NODE_ROOT		0x00
37 
38 /*
39  * function group types
40  */
41 enum {
42 	AC_GRP_AUDIO_FUNCTION = 0x01,
43 	AC_GRP_MODEM_FUNCTION = 0x02,
44 };
45 
46 /*
47  * widget types
48  */
49 enum {
50 	AC_WID_AUD_OUT,		/* Audio Out */
51 	AC_WID_AUD_IN,		/* Audio In */
52 	AC_WID_AUD_MIX,		/* Audio Mixer */
53 	AC_WID_AUD_SEL,		/* Audio Selector */
54 	AC_WID_PIN,		/* Pin Complex */
55 	AC_WID_POWER,		/* Power */
56 	AC_WID_VOL_KNB,		/* Volume Knob */
57 	AC_WID_BEEP,		/* Beep Generator */
58 	AC_WID_VENDOR = 0x0f	/* Vendor specific */
59 };
60 
61 /*
62  * GET verbs
63  */
64 #define AC_VERB_GET_STREAM_FORMAT		0x0a00
65 #define AC_VERB_GET_AMP_GAIN_MUTE		0x0b00
66 #define AC_VERB_GET_PROC_COEF			0x0c00
67 #define AC_VERB_GET_COEF_INDEX			0x0d00
68 #define AC_VERB_PARAMETERS			0x0f00
69 #define AC_VERB_GET_CONNECT_SEL			0x0f01
70 #define AC_VERB_GET_CONNECT_LIST		0x0f02
71 #define AC_VERB_GET_PROC_STATE			0x0f03
72 #define AC_VERB_GET_SDI_SELECT			0x0f04
73 #define AC_VERB_GET_POWER_STATE			0x0f05
74 #define AC_VERB_GET_CONV			0x0f06
75 #define AC_VERB_GET_PIN_WIDGET_CONTROL		0x0f07
76 #define AC_VERB_GET_UNSOLICITED_RESPONSE	0x0f08
77 #define AC_VERB_GET_PIN_SENSE			0x0f09
78 #define AC_VERB_GET_BEEP_CONTROL		0x0f0a
79 #define AC_VERB_GET_EAPD_BTLENABLE		0x0f0c
80 #define AC_VERB_GET_DIGI_CONVERT_1		0x0f0d
81 #define AC_VERB_GET_DIGI_CONVERT_2		0x0f0e /* unused */
82 #define AC_VERB_GET_VOLUME_KNOB_CONTROL		0x0f0f
83 /* f10-f1a: GPIO */
84 #define AC_VERB_GET_GPIO_DATA			0x0f15
85 #define AC_VERB_GET_GPIO_MASK			0x0f16
86 #define AC_VERB_GET_GPIO_DIRECTION		0x0f17
87 #define AC_VERB_GET_GPIO_WAKE_MASK		0x0f18
88 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK	0x0f19
89 #define AC_VERB_GET_GPIO_STICKY_MASK		0x0f1a
90 #define AC_VERB_GET_CONFIG_DEFAULT		0x0f1c
91 /* f20: AFG/MFG */
92 #define AC_VERB_GET_SUBSYSTEM_ID		0x0f20
93 #define AC_VERB_GET_CVT_CHAN_COUNT		0x0f2d
94 #define AC_VERB_GET_HDMI_DIP_SIZE		0x0f2e
95 #define AC_VERB_GET_HDMI_ELDD			0x0f2f
96 #define AC_VERB_GET_HDMI_DIP_INDEX		0x0f30
97 #define AC_VERB_GET_HDMI_DIP_DATA		0x0f31
98 #define AC_VERB_GET_HDMI_DIP_XMIT		0x0f32
99 #define AC_VERB_GET_HDMI_CP_CTRL		0x0f33
100 #define AC_VERB_GET_HDMI_CHAN_SLOT		0x0f34
101 
102 /*
103  * SET verbs
104  */
105 #define AC_VERB_SET_STREAM_FORMAT		0x200
106 #define AC_VERB_SET_AMP_GAIN_MUTE		0x300
107 #define AC_VERB_SET_PROC_COEF			0x400
108 #define AC_VERB_SET_COEF_INDEX			0x500
109 #define AC_VERB_SET_CONNECT_SEL			0x701
110 #define AC_VERB_SET_PROC_STATE			0x703
111 #define AC_VERB_SET_SDI_SELECT			0x704
112 #define AC_VERB_SET_POWER_STATE			0x705
113 #define AC_VERB_SET_CHANNEL_STREAMID		0x706
114 #define AC_VERB_SET_PIN_WIDGET_CONTROL		0x707
115 #define AC_VERB_SET_UNSOLICITED_ENABLE		0x708
116 #define AC_VERB_SET_PIN_SENSE			0x709
117 #define AC_VERB_SET_BEEP_CONTROL		0x70a
118 #define AC_VERB_SET_EAPD_BTLENABLE		0x70c
119 #define AC_VERB_SET_DIGI_CONVERT_1		0x70d
120 #define AC_VERB_SET_DIGI_CONVERT_2		0x70e
121 #define AC_VERB_SET_VOLUME_KNOB_CONTROL		0x70f
122 #define AC_VERB_SET_GPIO_DATA			0x715
123 #define AC_VERB_SET_GPIO_MASK			0x716
124 #define AC_VERB_SET_GPIO_DIRECTION		0x717
125 #define AC_VERB_SET_GPIO_WAKE_MASK		0x718
126 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK	0x719
127 #define AC_VERB_SET_GPIO_STICKY_MASK		0x71a
128 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0	0x71c
129 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1	0x71d
130 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2	0x71e
131 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3	0x71f
132 #define AC_VERB_SET_EAPD				0x788
133 #define AC_VERB_SET_CODEC_RESET			0x7ff
134 #define AC_VERB_SET_CVT_CHAN_COUNT		0x72d
135 #define AC_VERB_SET_HDMI_DIP_INDEX		0x730
136 #define AC_VERB_SET_HDMI_DIP_DATA		0x731
137 #define AC_VERB_SET_HDMI_DIP_XMIT		0x732
138 #define AC_VERB_SET_HDMI_CP_CTRL		0x733
139 #define AC_VERB_SET_HDMI_CHAN_SLOT		0x734
140 
141 /*
142  * Parameter IDs
143  */
144 #define AC_PAR_VENDOR_ID		0x00
145 #define AC_PAR_SUBSYSTEM_ID		0x01
146 #define AC_PAR_REV_ID			0x02
147 #define AC_PAR_NODE_COUNT		0x04
148 #define AC_PAR_FUNCTION_TYPE		0x05
149 #define AC_PAR_AUDIO_FG_CAP		0x08
150 #define AC_PAR_AUDIO_WIDGET_CAP		0x09
151 #define AC_PAR_PCM			0x0a
152 #define AC_PAR_STREAM			0x0b
153 #define AC_PAR_PIN_CAP			0x0c
154 #define AC_PAR_AMP_IN_CAP		0x0d
155 #define AC_PAR_CONNLIST_LEN		0x0e
156 #define AC_PAR_POWER_STATE		0x0f
157 #define AC_PAR_PROC_CAP			0x10
158 #define AC_PAR_GPIO_CAP			0x11
159 #define AC_PAR_AMP_OUT_CAP		0x12
160 #define AC_PAR_VOL_KNB_CAP		0x13
161 #define AC_PAR_HDMI_LPCM_CAP		0x20
162 
163 /*
164  * AC_VERB_PARAMETERS results (32bit)
165  */
166 
167 /* Function Group Type */
168 #define AC_FGT_TYPE			(0xff<<0)
169 #define AC_FGT_TYPE_SHIFT		0
170 #define AC_FGT_UNSOL_CAP		(1<<8)
171 
172 /* Audio Function Group Capabilities */
173 #define AC_AFG_OUT_DELAY		(0xf<<0)
174 #define AC_AFG_IN_DELAY			(0xf<<8)
175 #define AC_AFG_BEEP_GEN			(1<<16)
176 
177 /* Audio Widget Capabilities */
178 #define AC_WCAP_STEREO			(1<<0)	/* stereo I/O */
179 #define AC_WCAP_IN_AMP			(1<<1)	/* AMP-in present */
180 #define AC_WCAP_OUT_AMP			(1<<2)	/* AMP-out present */
181 #define AC_WCAP_AMP_OVRD		(1<<3)	/* AMP-parameter override */
182 #define AC_WCAP_FORMAT_OVRD		(1<<4)	/* format override */
183 #define AC_WCAP_STRIPE			(1<<5)	/* stripe */
184 #define AC_WCAP_PROC_WID		(1<<6)	/* Proc Widget */
185 #define AC_WCAP_UNSOL_CAP		(1<<7)	/* Unsol capable */
186 #define AC_WCAP_CONN_LIST		(1<<8)	/* connection list */
187 #define AC_WCAP_DIGITAL			(1<<9)	/* digital I/O */
188 #define AC_WCAP_POWER			(1<<10)	/* power control */
189 #define AC_WCAP_LR_SWAP			(1<<11)	/* L/R swap */
190 #define AC_WCAP_CP_CAPS			(1<<12) /* content protection */
191 #define AC_WCAP_CHAN_CNT_EXT		(7<<13)	/* channel count ext */
192 #define AC_WCAP_DELAY			(0xf<<16)
193 #define AC_WCAP_DELAY_SHIFT		16
194 #define AC_WCAP_TYPE			(0xf<<20)
195 #define AC_WCAP_TYPE_SHIFT		20
196 
197 /* supported PCM rates and bits */
198 #define AC_SUPPCM_RATES			(0xfff << 0)
199 #define AC_SUPPCM_BITS_8		(1<<16)
200 #define AC_SUPPCM_BITS_16		(1<<17)
201 #define AC_SUPPCM_BITS_20		(1<<18)
202 #define AC_SUPPCM_BITS_24		(1<<19)
203 #define AC_SUPPCM_BITS_32		(1<<20)
204 
205 /* supported PCM stream format */
206 #define AC_SUPFMT_PCM			(1<<0)
207 #define AC_SUPFMT_FLOAT32		(1<<1)
208 #define AC_SUPFMT_AC3			(1<<2)
209 
210 /* GP I/O count */
211 #define AC_GPIO_IO_COUNT		(0xff<<0)
212 #define AC_GPIO_O_COUNT			(0xff<<8)
213 #define AC_GPIO_O_COUNT_SHIFT		8
214 #define AC_GPIO_I_COUNT			(0xff<<16)
215 #define AC_GPIO_I_COUNT_SHIFT		16
216 #define AC_GPIO_UNSOLICITED		(1<<30)
217 #define AC_GPIO_WAKE			(1<<31)
218 
219 /* Converter stream, channel */
220 #define AC_CONV_CHANNEL			(0xf<<0)
221 #define AC_CONV_STREAM			(0xf<<4)
222 #define AC_CONV_STREAM_SHIFT		4
223 
224 /* Input converter SDI select */
225 #define AC_SDI_SELECT			(0xf<<0)
226 
227 /* stream format id */
228 #define AC_FMT_CHAN_SHIFT		0
229 #define AC_FMT_CHAN_MASK		(0x0f << 0)
230 #define AC_FMT_BITS_SHIFT		4
231 #define AC_FMT_BITS_MASK		(7 << 4)
232 #define AC_FMT_BITS_8			(0 << 4)
233 #define AC_FMT_BITS_16			(1 << 4)
234 #define AC_FMT_BITS_20			(2 << 4)
235 #define AC_FMT_BITS_24			(3 << 4)
236 #define AC_FMT_BITS_32			(4 << 4)
237 #define AC_FMT_DIV_SHIFT		8
238 #define AC_FMT_DIV_MASK			(7 << 8)
239 #define AC_FMT_MULT_SHIFT		11
240 #define AC_FMT_MULT_MASK		(7 << 11)
241 #define AC_FMT_BASE_SHIFT		14
242 #define AC_FMT_BASE_48K			(0 << 14)
243 #define AC_FMT_BASE_44K			(1 << 14)
244 #define AC_FMT_TYPE_SHIFT		15
245 #define AC_FMT_TYPE_PCM			(0 << 15)
246 #define AC_FMT_TYPE_NON_PCM		(1 << 15)
247 
248 /* Unsolicited response control */
249 #define AC_UNSOL_TAG			(0x3f<<0)
250 #define AC_UNSOL_ENABLED		(1<<7)
251 #define AC_USRSP_EN			AC_UNSOL_ENABLED
252 
253 /* Unsolicited responses */
254 #define AC_UNSOL_RES_TAG		(0x3f<<26)
255 #define AC_UNSOL_RES_TAG_SHIFT		26
256 #define AC_UNSOL_RES_SUBTAG		(0x1f<<21)
257 #define AC_UNSOL_RES_SUBTAG_SHIFT	21
258 #define AC_UNSOL_RES_ELDV		(1<<1)	/* ELD Data valid (for HDMI) */
259 #define AC_UNSOL_RES_PD			(1<<0)	/* pinsense detect */
260 #define AC_UNSOL_RES_CP_STATE		(1<<1)	/* content protection */
261 #define AC_UNSOL_RES_CP_READY		(1<<0)	/* content protection */
262 
263 /* Pin widget capabilies */
264 #define AC_PINCAP_IMP_SENSE		(1<<0)	/* impedance sense capable */
265 #define AC_PINCAP_TRIG_REQ		(1<<1)	/* trigger required */
266 #define AC_PINCAP_PRES_DETECT		(1<<2)	/* presence detect capable */
267 #define AC_PINCAP_HP_DRV		(1<<3)	/* headphone drive capable */
268 #define AC_PINCAP_OUT			(1<<4)	/* output capable */
269 #define AC_PINCAP_IN			(1<<5)	/* input capable */
270 #define AC_PINCAP_BALANCE		(1<<6)	/* balanced I/O capable */
271 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
272  *       but is marked reserved in the Intel HDA specification.
273  */
274 #define AC_PINCAP_LR_SWAP		(1<<7)	/* L/R swap */
275 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
276  *       in HD-audio specification
277  */
278 #define AC_PINCAP_HDMI			(1<<7)	/* HDMI pin */
279 #define AC_PINCAP_DP			(1<<24)	/* DisplayPort pin, can
280 						 * coexist with AC_PINCAP_HDMI
281 						 */
282 #define AC_PINCAP_VREF			(0x37<<8)
283 #define AC_PINCAP_VREF_SHIFT		8
284 #define AC_PINCAP_EAPD			(1<<16)	/* EAPD capable */
285 #define AC_PINCAP_HBR			(1<<27)	/* High Bit Rate */
286 /* Vref status (used in pin cap) */
287 #define AC_PINCAP_VREF_HIZ		(1<<0)	/* Hi-Z */
288 #define AC_PINCAP_VREF_50		(1<<1)	/* 50% */
289 #define AC_PINCAP_VREF_GRD		(1<<2)	/* ground */
290 #define AC_PINCAP_VREF_80		(1<<4)	/* 80% */
291 #define AC_PINCAP_VREF_100		(1<<5)	/* 100% */
292 
293 /* Amplifier capabilities */
294 #define AC_AMPCAP_OFFSET		(0x7f<<0)  /* 0dB offset */
295 #define AC_AMPCAP_OFFSET_SHIFT		0
296 #define AC_AMPCAP_NUM_STEPS		(0x7f<<8)  /* number of steps */
297 #define AC_AMPCAP_NUM_STEPS_SHIFT	8
298 #define AC_AMPCAP_STEP_SIZE		(0x7f<<16) /* step size 0-32dB
299 						    * in 0.25dB
300 						    */
301 #define AC_AMPCAP_STEP_SIZE_SHIFT	16
302 #define AC_AMPCAP_MUTE			(1<<31)    /* mute capable */
303 #define AC_AMPCAP_MUTE_SHIFT		31
304 
305 /* Connection list */
306 #define AC_CLIST_LENGTH			(0x7f<<0)
307 #define AC_CLIST_LONG			(1<<7)
308 
309 /* Supported power status */
310 #define AC_PWRST_D0SUP			(1<<0)
311 #define AC_PWRST_D1SUP			(1<<1)
312 #define AC_PWRST_D2SUP			(1<<2)
313 #define AC_PWRST_D3SUP			(1<<3)
314 #define AC_PWRST_D3COLDSUP		(1<<4)
315 #define AC_PWRST_S3D3COLDSUP		(1<<29)
316 #define AC_PWRST_CLKSTOP		(1<<30)
317 #define AC_PWRST_EPSS			(1U<<31)
318 
319 /* Power state values */
320 #define AC_PWRST_SETTING		(0xf<<0)
321 #define AC_PWRST_ACTUAL			(0xf<<4)
322 #define AC_PWRST_ACTUAL_SHIFT		4
323 #define AC_PWRST_D0			0x00
324 #define AC_PWRST_D1			0x01
325 #define AC_PWRST_D2			0x02
326 #define AC_PWRST_D3			0x03
327 
328 /* Processing capabilies */
329 #define AC_PCAP_BENIGN			(1<<0)
330 #define AC_PCAP_NUM_COEF		(0xff<<8)
331 #define AC_PCAP_NUM_COEF_SHIFT		8
332 
333 /* Volume knobs capabilities */
334 #define AC_KNBCAP_NUM_STEPS		(0x7f<<0)
335 #define AC_KNBCAP_DELTA			(1<<7)
336 
337 /* HDMI LPCM capabilities */
338 #define AC_LPCMCAP_48K_CP_CHNS		(0x0f<<0) /* max channels w/ CP-on */
339 #define AC_LPCMCAP_48K_NO_CHNS		(0x0f<<4) /* max channels w/o CP-on */
340 #define AC_LPCMCAP_48K_20BIT		(1<<8)	/* 20b bitrate supported */
341 #define AC_LPCMCAP_48K_24BIT		(1<<9)	/* 24b bitrate supported */
342 #define AC_LPCMCAP_96K_CP_CHNS		(0x0f<<10) /* max channels w/ CP-on */
343 #define AC_LPCMCAP_96K_NO_CHNS		(0x0f<<14) /* max channels w/o CP-on */
344 #define AC_LPCMCAP_96K_20BIT		(1<<18)	/* 20b bitrate supported */
345 #define AC_LPCMCAP_96K_24BIT		(1<<19)	/* 24b bitrate supported */
346 #define AC_LPCMCAP_192K_CP_CHNS		(0x0f<<20) /* max channels w/ CP-on */
347 #define AC_LPCMCAP_192K_NO_CHNS		(0x0f<<24) /* max channels w/o CP-on */
348 #define AC_LPCMCAP_192K_20BIT		(1<<28)	/* 20b bitrate supported */
349 #define AC_LPCMCAP_192K_24BIT		(1<<29)	/* 24b bitrate supported */
350 #define AC_LPCMCAP_44K			(1<<30)	/* 44.1kHz support */
351 #define AC_LPCMCAP_44K_MS		(1<<31)	/* 44.1kHz-multiplies support */
352 
353 /*
354  * Control Parameters
355  */
356 
357 /* Amp gain/mute */
358 #define AC_AMP_MUTE			(1<<7)
359 #define AC_AMP_GAIN			(0x7f)
360 #define AC_AMP_GET_INDEX		(0xf<<0)
361 
362 #define AC_AMP_GET_LEFT			(1<<13)
363 #define AC_AMP_GET_RIGHT		(0<<13)
364 #define AC_AMP_GET_OUTPUT		(1<<15)
365 #define AC_AMP_GET_INPUT		(0<<15)
366 
367 #define AC_AMP_SET_INDEX		(0xf<<8)
368 #define AC_AMP_SET_INDEX_SHIFT		8
369 #define AC_AMP_SET_RIGHT		(1<<12)
370 #define AC_AMP_SET_LEFT			(1<<13)
371 #define AC_AMP_SET_INPUT		(1<<14)
372 #define AC_AMP_SET_OUTPUT		(1<<15)
373 
374 /* DIGITAL1 bits */
375 #define AC_DIG1_ENABLE			(1<<0)
376 #define AC_DIG1_V			(1<<1)
377 #define AC_DIG1_VCFG			(1<<2)
378 #define AC_DIG1_EMPHASIS		(1<<3)
379 #define AC_DIG1_COPYRIGHT		(1<<4)
380 #define AC_DIG1_NONAUDIO		(1<<5)
381 #define AC_DIG1_PROFESSIONAL		(1<<6)
382 #define AC_DIG1_LEVEL			(1<<7)
383 
384 /* DIGITAL2 bits */
385 #define AC_DIG2_CC			(0x7f<<0)
386 
387 /* Pin widget control - 8bit */
388 #define AC_PINCTL_EPT			(0x3<<0)
389 #define AC_PINCTL_EPT_NATIVE		0
390 #define AC_PINCTL_EPT_HBR		3
391 #define AC_PINCTL_VREFEN		(0x7<<0)
392 #define AC_PINCTL_VREF_HIZ		0	/* Hi-Z */
393 #define AC_PINCTL_VREF_50		1	/* 50% */
394 #define AC_PINCTL_VREF_GRD		2	/* ground */
395 #define AC_PINCTL_VREF_80		4	/* 80% */
396 #define AC_PINCTL_VREF_100		5	/* 100% */
397 #define AC_PINCTL_IN_EN			(1<<5)
398 #define AC_PINCTL_OUT_EN		(1<<6)
399 #define AC_PINCTL_HP_EN			(1<<7)
400 
401 /* Pin sense - 32bit */
402 #define AC_PINSENSE_IMPEDANCE_MASK	(0x7fffffff)
403 #define AC_PINSENSE_PRESENCE		(1<<31)
404 #define AC_PINSENSE_ELDV		(1<<30)	/* ELD valid (HDMI) */
405 
406 /* EAPD/BTL enable - 32bit */
407 #define AC_EAPDBTL_BALANCED		(1<<0)
408 #define AC_EAPDBTL_EAPD			(1<<1)
409 #define AC_EAPDBTL_LR_SWAP		(1<<2)
410 
411 /* HDMI ELD data */
412 #define AC_ELDD_ELD_VALID		(1<<31)
413 #define AC_ELDD_ELD_DATA		0xff
414 
415 /* HDMI DIP size */
416 #define AC_DIPSIZE_ELD_BUF		(1<<3) /* ELD buf size of packet size */
417 #define AC_DIPSIZE_PACK_IDX		(0x07<<0) /* packet index */
418 
419 /* HDMI DIP index */
420 #define AC_DIPIDX_PACK_IDX		(0x07<<5) /* packet idnex */
421 #define AC_DIPIDX_BYTE_IDX		(0x1f<<0) /* byte index */
422 
423 /* HDMI DIP xmit (transmit) control */
424 #define AC_DIPXMIT_MASK			(0x3<<6)
425 #define AC_DIPXMIT_DISABLE		(0x0<<6) /* disable xmit */
426 #define AC_DIPXMIT_ONCE			(0x2<<6) /* xmit once then disable */
427 #define AC_DIPXMIT_BEST			(0x3<<6) /* best effort */
428 
429 /* HDMI content protection (CP) control */
430 #define AC_CPCTRL_CES			(1<<9) /* current encryption state */
431 #define AC_CPCTRL_READY			(1<<8) /* ready bit */
432 #define AC_CPCTRL_SUBTAG		(0x1f<<3) /* subtag for unsol-resp */
433 #define AC_CPCTRL_STATE			(3<<0) /* current CP request state */
434 
435 /* Converter channel <-> HDMI slot mapping */
436 #define AC_CVTMAP_HDMI_SLOT		(0xf<<0) /* HDMI slot number */
437 #define AC_CVTMAP_CHAN			(0xf<<4) /* converter channel number */
438 
439 /* configuration default - 32bit */
440 #define AC_DEFCFG_SEQUENCE		(0xf<<0)
441 #define AC_DEFCFG_DEF_ASSOC		(0xf<<4)
442 #define AC_DEFCFG_ASSOC_SHIFT		4
443 #define AC_DEFCFG_MISC			(0xf<<8)
444 #define AC_DEFCFG_MISC_SHIFT		8
445 #define AC_DEFCFG_MISC_NO_PRESENCE	(1<<0)
446 #define AC_DEFCFG_COLOR			(0xf<<12)
447 #define AC_DEFCFG_COLOR_SHIFT		12
448 #define AC_DEFCFG_CONN_TYPE		(0xf<<16)
449 #define AC_DEFCFG_CONN_TYPE_SHIFT	16
450 #define AC_DEFCFG_DEVICE		(0xf<<20)
451 #define AC_DEFCFG_DEVICE_SHIFT		20
452 #define AC_DEFCFG_LOCATION		(0x3f<<24)
453 #define AC_DEFCFG_LOCATION_SHIFT	24
454 #define AC_DEFCFG_PORT_CONN		(0x3<<30)
455 #define AC_DEFCFG_PORT_CONN_SHIFT	30
456 
457 /* device device types (0x0-0xf) */
458 enum {
459 	AC_JACK_LINE_OUT,
460 	AC_JACK_SPEAKER,
461 	AC_JACK_HP_OUT,
462 	AC_JACK_CD,
463 	AC_JACK_SPDIF_OUT,
464 	AC_JACK_DIG_OTHER_OUT,
465 	AC_JACK_MODEM_LINE_SIDE,
466 	AC_JACK_MODEM_HAND_SIDE,
467 	AC_JACK_LINE_IN,
468 	AC_JACK_AUX,
469 	AC_JACK_MIC_IN,
470 	AC_JACK_TELEPHONY,
471 	AC_JACK_SPDIF_IN,
472 	AC_JACK_DIG_OTHER_IN,
473 	AC_JACK_OTHER = 0xf,
474 };
475 
476 /* jack connection types (0x0-0xf) */
477 enum {
478 	AC_JACK_CONN_UNKNOWN,
479 	AC_JACK_CONN_1_8,
480 	AC_JACK_CONN_1_4,
481 	AC_JACK_CONN_ATAPI,
482 	AC_JACK_CONN_RCA,
483 	AC_JACK_CONN_OPTICAL,
484 	AC_JACK_CONN_OTHER_DIGITAL,
485 	AC_JACK_CONN_OTHER_ANALOG,
486 	AC_JACK_CONN_DIN,
487 	AC_JACK_CONN_XLR,
488 	AC_JACK_CONN_RJ11,
489 	AC_JACK_CONN_COMB,
490 	AC_JACK_CONN_OTHER = 0xf,
491 };
492 
493 /* jack colors (0x0-0xf) */
494 enum {
495 	AC_JACK_COLOR_UNKNOWN,
496 	AC_JACK_COLOR_BLACK,
497 	AC_JACK_COLOR_GREY,
498 	AC_JACK_COLOR_BLUE,
499 	AC_JACK_COLOR_GREEN,
500 	AC_JACK_COLOR_RED,
501 	AC_JACK_COLOR_ORANGE,
502 	AC_JACK_COLOR_YELLOW,
503 	AC_JACK_COLOR_PURPLE,
504 	AC_JACK_COLOR_PINK,
505 	AC_JACK_COLOR_WHITE = 0xe,
506 	AC_JACK_COLOR_OTHER,
507 };
508 
509 /* Jack location (0x0-0x3f) */
510 /* common case */
511 enum {
512 	AC_JACK_LOC_NONE,
513 	AC_JACK_LOC_REAR,
514 	AC_JACK_LOC_FRONT,
515 	AC_JACK_LOC_LEFT,
516 	AC_JACK_LOC_RIGHT,
517 	AC_JACK_LOC_TOP,
518 	AC_JACK_LOC_BOTTOM,
519 };
520 /* bits 4-5 */
521 enum {
522 	AC_JACK_LOC_EXTERNAL = 0x00,
523 	AC_JACK_LOC_INTERNAL = 0x10,
524 	AC_JACK_LOC_SEPARATE = 0x20,
525 	AC_JACK_LOC_OTHER    = 0x30,
526 };
527 enum {
528 	/* external on primary chasis */
529 	AC_JACK_LOC_REAR_PANEL = 0x07,
530 	AC_JACK_LOC_DRIVE_BAY,
531 	/* internal */
532 	AC_JACK_LOC_RISER = 0x17,
533 	AC_JACK_LOC_HDMI,
534 	AC_JACK_LOC_ATAPI,
535 	/* others */
536 	AC_JACK_LOC_MOBILE_IN = 0x37,
537 	AC_JACK_LOC_MOBILE_OUT,
538 };
539 
540 /* Port connectivity (0-3) */
541 enum {
542 	AC_JACK_PORT_COMPLEX,
543 	AC_JACK_PORT_NONE,
544 	AC_JACK_PORT_FIXED,
545 	AC_JACK_PORT_BOTH,
546 };
547 
548 /* max. connections to a widget */
549 #define HDA_MAX_CONNECTIONS	32
550 
551 /* max. codec address */
552 #define HDA_MAX_CODEC_ADDRESS	0x0f
553 
554 /* max number of PCM devics per card */
555 #define HDA_MAX_PCMS		10
556 
557 /*
558  * generic arrays
559  */
560 struct snd_array {
561 	unsigned int used;
562 	unsigned int alloced;
563 	unsigned int elem_size;
564 	unsigned int alloc_align;
565 	void *list;
566 };
567 
568 void *snd_array_new(struct snd_array *array);
569 void snd_array_free(struct snd_array *array);
snd_array_init(struct snd_array * array,unsigned int size,unsigned int align)570 static inline void snd_array_init(struct snd_array *array, unsigned int size,
571 				  unsigned int align)
572 {
573 	array->elem_size = size;
574 	array->alloc_align = align;
575 }
576 
snd_array_elem(struct snd_array * array,unsigned int idx)577 static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
578 {
579 	return array->list + idx * array->elem_size;
580 }
581 
snd_array_index(struct snd_array * array,void * ptr)582 static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
583 {
584 	return (unsigned long)(ptr - array->list) / array->elem_size;
585 }
586 
587 /*
588  * Structures
589  */
590 
591 struct hda_bus;
592 struct hda_beep;
593 struct hda_codec;
594 struct hda_pcm;
595 struct hda_pcm_stream;
596 struct hda_bus_unsolicited;
597 
598 /* NID type */
599 typedef u16 hda_nid_t;
600 
601 /* bus operators */
602 struct hda_bus_ops {
603 	/* send a single command */
604 	int (*command)(struct hda_bus *bus, unsigned int cmd);
605 	/* get a response from the last command */
606 	unsigned int (*get_response)(struct hda_bus *bus, unsigned int addr);
607 	/* free the private data */
608 	void (*private_free)(struct hda_bus *);
609 	/* attach a PCM stream */
610 	int (*attach_pcm)(struct hda_bus *bus, struct hda_codec *codec,
611 			  struct hda_pcm *pcm);
612 	/* reset bus for retry verb */
613 	void (*bus_reset)(struct hda_bus *bus);
614 #ifdef CONFIG_SND_HDA_POWER_SAVE
615 	/* notify power-up/down from codec to controller */
616 	void (*pm_notify)(struct hda_bus *bus);
617 #endif
618 };
619 
620 /* template to pass to the bus constructor */
621 struct hda_bus_template {
622 	void *private_data;
623 	struct pci_dev *pci;
624 	const char *modelname;
625 	int *power_save;
626 	struct hda_bus_ops ops;
627 };
628 
629 /*
630  * codec bus
631  *
632  * each controller needs to creata a hda_bus to assign the accessor.
633  * A hda_bus contains several codecs in the list codec_list.
634  */
635 struct hda_bus {
636 	struct snd_card *card;
637 
638 	/* copied from template */
639 	void *private_data;
640 	struct pci_dev *pci;
641 	const char *modelname;
642 	int *power_save;
643 	struct hda_bus_ops ops;
644 
645 	/* codec linked list */
646 	struct list_head codec_list;
647 	/* link caddr -> codec */
648 	struct hda_codec *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
649 
650 	struct mutex cmd_mutex;
651 	struct mutex prepare_mutex;
652 
653 	/* unsolicited event queue */
654 	struct hda_bus_unsolicited *unsol;
655 	char workq_name[16];
656 	struct workqueue_struct *workq;	/* common workqueue for codecs */
657 
658 	/* assigned PCMs */
659 	DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
660 
661 	/* misc op flags */
662 	unsigned int needs_damn_long_delay :1;
663 	unsigned int allow_bus_reset:1;	/* allow bus reset at fatal error */
664 	unsigned int sync_write:1;	/* sync after verb write */
665 	/* status for codec/controller */
666 	unsigned int shutdown :1;	/* being unloaded */
667 	unsigned int rirb_error:1;	/* error in codec communication */
668 	unsigned int response_reset:1;	/* controller was reset */
669 	unsigned int in_reset:1;	/* during reset operation */
670 	unsigned int power_keep_link_on:1; /* don't power off HDA link */
671 };
672 
673 /*
674  * codec preset
675  *
676  * Known codecs have the patch to build and set up the controls/PCMs
677  * better than the generic parser.
678  */
679 struct hda_codec_preset {
680 	unsigned int id;
681 	unsigned int mask;
682 	unsigned int subs;
683 	unsigned int subs_mask;
684 	unsigned int rev;
685 	hda_nid_t afg, mfg;
686 	const char *name;
687 	int (*patch)(struct hda_codec *codec);
688 };
689 
690 struct hda_codec_preset_list {
691 	const struct hda_codec_preset *preset;
692 	struct module *owner;
693 	struct list_head list;
694 };
695 
696 /* initial hook */
697 int snd_hda_add_codec_preset(struct hda_codec_preset_list *preset);
698 int snd_hda_delete_codec_preset(struct hda_codec_preset_list *preset);
699 
700 /* ops set by the preset patch */
701 struct hda_codec_ops {
702 	int (*build_controls)(struct hda_codec *codec);
703 	int (*build_pcms)(struct hda_codec *codec);
704 	int (*init)(struct hda_codec *codec);
705 	void (*free)(struct hda_codec *codec);
706 	void (*unsol_event)(struct hda_codec *codec, unsigned int res);
707 #ifdef SND_HDA_NEEDS_RESUME
708 	int (*suspend)(struct hda_codec *codec, pm_message_t state);
709 	int (*resume)(struct hda_codec *codec);
710 #endif
711 #ifdef CONFIG_SND_HDA_POWER_SAVE
712 	int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
713 #endif
714 	void (*reboot_notify)(struct hda_codec *codec);
715 };
716 
717 /* record for amp information cache */
718 struct hda_cache_head {
719 	u32 key;		/* hash key */
720 	u16 val;		/* assigned value */
721 	u16 next;		/* next link; -1 = terminal */
722 };
723 
724 struct hda_amp_info {
725 	struct hda_cache_head head;
726 	u32 amp_caps;		/* amp capabilities */
727 	u16 vol[2];		/* current volume & mute */
728 };
729 
730 struct hda_cache_rec {
731 	u16 hash[64];			/* hash table for index */
732 	struct snd_array buf;		/* record entries */
733 };
734 
735 /* PCM callbacks */
736 struct hda_pcm_ops {
737 	int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
738 		    struct snd_pcm_substream *substream);
739 	int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
740 		     struct snd_pcm_substream *substream);
741 	int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
742 		       unsigned int stream_tag, unsigned int format,
743 		       struct snd_pcm_substream *substream);
744 	int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
745 		       struct snd_pcm_substream *substream);
746 };
747 
748 /* PCM information for each substream */
749 struct hda_pcm_stream {
750 	unsigned int substreams;	/* number of substreams, 0 = not exist*/
751 	unsigned int channels_min;	/* min. number of channels */
752 	unsigned int channels_max;	/* max. number of channels */
753 	hda_nid_t nid;	/* default NID to query rates/formats/bps, or set up */
754 	u32 rates;	/* supported rates */
755 	u64 formats;	/* supported formats (SNDRV_PCM_FMTBIT_) */
756 	unsigned int maxbps;	/* supported max. bit per sample */
757 	struct hda_pcm_ops ops;
758 };
759 
760 /* PCM types */
761 enum {
762 	HDA_PCM_TYPE_AUDIO,
763 	HDA_PCM_TYPE_SPDIF,
764 	HDA_PCM_TYPE_HDMI,
765 	HDA_PCM_TYPE_MODEM,
766 	HDA_PCM_NTYPES
767 };
768 
769 /* for PCM creation */
770 struct hda_pcm {
771 	char *name;
772 	struct hda_pcm_stream stream[2];
773 	unsigned int pcm_type;	/* HDA_PCM_TYPE_XXX */
774 	int device;		/* device number to assign */
775 	struct snd_pcm *pcm;	/* assigned PCM instance */
776 };
777 
778 /* codec information */
779 struct hda_codec {
780 	struct hda_bus *bus;
781 	unsigned int addr;	/* codec addr*/
782 	struct list_head list;	/* list point */
783 
784 	hda_nid_t afg;	/* AFG node id */
785 	hda_nid_t mfg;	/* MFG node id */
786 
787 	/* ids */
788 	u8 afg_function_id;
789 	u8 mfg_function_id;
790 	u8 afg_unsol;
791 	u8 mfg_unsol;
792 	u32 vendor_id;
793 	u32 subsystem_id;
794 	u32 revision_id;
795 
796 	/* detected preset */
797 	const struct hda_codec_preset *preset;
798 	struct module *owner;
799 	const char *vendor_name;	/* codec vendor name */
800 	const char *chip_name;		/* codec chip name */
801 	const char *modelname;	/* model name for preset */
802 
803 	/* set by patch */
804 	struct hda_codec_ops patch_ops;
805 
806 	/* PCM to create, set by patch_ops.build_pcms callback */
807 	unsigned int num_pcms;
808 	struct hda_pcm *pcm_info;
809 
810 	/* codec specific info */
811 	void *spec;
812 
813 	/* beep device */
814 	struct hda_beep *beep;
815 	unsigned int beep_mode;
816 
817 	/* widget capabilities cache */
818 	unsigned int num_nodes;
819 	hda_nid_t start_nid;
820 	u32 *wcaps;
821 
822 	struct snd_array mixers;	/* list of assigned mixer elements */
823 	struct snd_array nids;		/* list of mapped mixer elements */
824 
825 	struct hda_cache_rec amp_cache;	/* cache for amp access */
826 	struct hda_cache_rec cmd_cache;	/* cache for other commands */
827 
828 	struct mutex spdif_mutex;
829 	struct mutex control_mutex;
830 	unsigned int spdif_status;	/* IEC958 status bits */
831 	unsigned short spdif_ctls;	/* SPDIF control bits */
832 	unsigned int spdif_in_enable;	/* SPDIF input enable? */
833 	hda_nid_t *slave_dig_outs; /* optional digital out slave widgets */
834 	struct snd_array init_pins;	/* initial (BIOS) pin configurations */
835 	struct snd_array driver_pins;	/* pin configs set by codec parser */
836 	struct snd_array cvt_setups;	/* audio convert setups */
837 
838 #ifdef CONFIG_SND_HDA_HWDEP
839 	struct snd_hwdep *hwdep;	/* assigned hwdep device */
840 	struct snd_array init_verbs;	/* additional init verbs */
841 	struct snd_array hints;		/* additional hints */
842 	struct snd_array user_pins;	/* default pin configs to override */
843 #endif
844 
845 	/* misc flags */
846 	unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
847 					     * status change
848 					     * (e.g. Realtek codecs)
849 					     */
850 	unsigned int pin_amp_workaround:1; /* pin out-amp takes index
851 					    * (e.g. Conexant codecs)
852 					    */
853 	unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
854 	unsigned int pins_shutup:1;	/* pins are shut up */
855 	unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
856 #ifdef CONFIG_SND_HDA_POWER_SAVE
857 	unsigned int power_on :1;	/* current (global) power-state */
858 	unsigned int power_transition :1; /* power-state in transition */
859 	int power_count;	/* current (global) power refcount */
860 	struct delayed_work power_work; /* delayed task for powerdown */
861 	unsigned long power_on_acct;
862 	unsigned long power_off_acct;
863 	unsigned long power_jiffies;
864 #endif
865 
866 	/* codec-specific additional proc output */
867 	void (*proc_widget_hook)(struct snd_info_buffer *buffer,
868 				 struct hda_codec *codec, hda_nid_t nid);
869 
870 #ifdef CONFIG_SND_HDA_INPUT_JACK
871 	/* jack detection */
872 	struct snd_array jacks;
873 #endif
874 };
875 
876 /* direction */
877 enum {
878 	HDA_INPUT, HDA_OUTPUT
879 };
880 
881 
882 /*
883  * constructors
884  */
885 int snd_hda_bus_new(struct snd_card *card, const struct hda_bus_template *temp,
886 		    struct hda_bus **busp);
887 int snd_hda_codec_new(struct hda_bus *bus, unsigned int codec_addr,
888 		      struct hda_codec **codecp);
889 int snd_hda_codec_configure(struct hda_codec *codec);
890 
891 /*
892  * low level functions
893  */
894 unsigned int snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
895 				int direct,
896 				unsigned int verb, unsigned int parm);
897 int snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int direct,
898 			unsigned int verb, unsigned int parm);
899 #define snd_hda_param_read(codec, nid, param) \
900 	snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
901 int snd_hda_get_sub_nodes(struct hda_codec *codec, hda_nid_t nid,
902 			  hda_nid_t *start_id);
903 int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
904 			    hda_nid_t *conn_list, int max_conns);
905 
906 struct hda_verb {
907 	hda_nid_t nid;
908 	u32 verb;
909 	u32 param;
910 };
911 
912 void snd_hda_sequence_write(struct hda_codec *codec,
913 			    const struct hda_verb *seq);
914 
915 /* unsolicited event */
916 int snd_hda_queue_unsol_event(struct hda_bus *bus, u32 res, u32 res_ex);
917 
918 /* cached write */
919 #ifdef SND_HDA_NEEDS_RESUME
920 int snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
921 			      int direct, unsigned int verb, unsigned int parm);
922 void snd_hda_sequence_write_cache(struct hda_codec *codec,
923 				  const struct hda_verb *seq);
924 int snd_hda_codec_update_cache(struct hda_codec *codec, hda_nid_t nid,
925 			      int direct, unsigned int verb, unsigned int parm);
926 void snd_hda_codec_resume_cache(struct hda_codec *codec);
927 #else
928 #define snd_hda_codec_write_cache	snd_hda_codec_write
929 #define snd_hda_codec_update_cache	snd_hda_codec_write
930 #define snd_hda_sequence_write_cache	snd_hda_sequence_write
931 #endif
932 
933 /* the struct for codec->pin_configs */
934 struct hda_pincfg {
935 	hda_nid_t nid;
936 	unsigned char ctrl;	/* current pin control value */
937 	unsigned char pad;	/* reserved */
938 	unsigned int cfg;	/* default configuration */
939 };
940 
941 unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
942 int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
943 			     unsigned int cfg);
944 int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
945 		       hda_nid_t nid, unsigned int cfg); /* for hwdep */
946 void snd_hda_shutup_pins(struct hda_codec *codec);
947 
948 /*
949  * Mixer
950  */
951 int snd_hda_build_controls(struct hda_bus *bus);
952 int snd_hda_codec_build_controls(struct hda_codec *codec);
953 
954 /*
955  * PCM
956  */
957 int snd_hda_build_pcms(struct hda_bus *bus);
958 int snd_hda_codec_build_pcms(struct hda_codec *codec);
959 
960 int snd_hda_codec_prepare(struct hda_codec *codec,
961 			  struct hda_pcm_stream *hinfo,
962 			  unsigned int stream,
963 			  unsigned int format,
964 			  struct snd_pcm_substream *substream);
965 void snd_hda_codec_cleanup(struct hda_codec *codec,
966 			   struct hda_pcm_stream *hinfo,
967 			   struct snd_pcm_substream *substream);
968 
969 void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
970 				u32 stream_tag,
971 				int channel_id, int format);
972 void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
973 				    int do_now);
974 #define snd_hda_codec_cleanup_stream(codec, nid) \
975 	__snd_hda_codec_cleanup_stream(codec, nid, 0)
976 unsigned int snd_hda_calc_stream_format(unsigned int rate,
977 					unsigned int channels,
978 					unsigned int format,
979 					unsigned int maxbps,
980 					unsigned short spdif_ctls);
981 int snd_hda_is_supported_format(struct hda_codec *codec, hda_nid_t nid,
982 				unsigned int format);
983 
984 /*
985  * Misc
986  */
987 void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
988 void snd_hda_bus_reboot_notify(struct hda_bus *bus);
989 
990 /*
991  * power management
992  */
993 #ifdef CONFIG_PM
994 int snd_hda_suspend(struct hda_bus *bus);
995 int snd_hda_resume(struct hda_bus *bus);
996 #endif
997 
998 #ifdef CONFIG_SND_HDA_POWER_SAVE
999 static inline
hda_call_check_power_status(struct hda_codec * codec,hda_nid_t nid)1000 int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
1001 {
1002 	if (codec->patch_ops.check_power_status)
1003 		return codec->patch_ops.check_power_status(codec, nid);
1004 	return 0;
1005 }
1006 #else
1007 #define hda_call_check_power_status(codec, nid)		0
1008 #endif
1009 
1010 /*
1011  * get widget information
1012  */
1013 const char *snd_hda_get_jack_connectivity(u32 cfg);
1014 const char *snd_hda_get_jack_type(u32 cfg);
1015 const char *snd_hda_get_jack_location(u32 cfg);
1016 
1017 /*
1018  * power saving
1019  */
1020 #ifdef CONFIG_SND_HDA_POWER_SAVE
1021 void snd_hda_power_up(struct hda_codec *codec);
1022 void snd_hda_power_down(struct hda_codec *codec);
1023 #define snd_hda_codec_needs_resume(codec) codec->power_count
1024 void snd_hda_update_power_acct(struct hda_codec *codec);
1025 #else
snd_hda_power_up(struct hda_codec * codec)1026 static inline void snd_hda_power_up(struct hda_codec *codec) {}
snd_hda_power_down(struct hda_codec * codec)1027 static inline void snd_hda_power_down(struct hda_codec *codec) {}
1028 #define snd_hda_codec_needs_resume(codec) 1
1029 #endif
1030 
1031 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1032 /*
1033  * patch firmware
1034  */
1035 int snd_hda_load_patch(struct hda_bus *bus, const char *patch);
1036 #endif
1037 
1038 /*
1039  * Codec modularization
1040  */
1041 
1042 /* Export symbols only for communication with codec drivers;
1043  * When built in kernel, all HD-audio drivers are supposed to be statically
1044  * linked to the kernel.  Thus, the symbols don't have to (or shouldn't) be
1045  * exported unless it's built as a module.
1046  */
1047 #ifdef MODULE
1048 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
1049 #else
1050 #define EXPORT_SYMBOL_HDA(sym)
1051 #endif
1052 
1053 #endif /* __SOUND_HDA_CODEC_H */
1054