1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45 struct intel_encoder base;
46
47 struct edid *edid;
48
49 int fitting_mode;
50 u32 pfit_control;
51 u32 pfit_pgm_ratios;
52 bool pfit_dirty;
53
54 struct drm_display_mode *fixed_mode;
55 };
56
to_intel_lvds(struct drm_encoder * encoder)57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
58 {
59 return container_of(encoder, struct intel_lvds, base.base);
60 }
61
intel_attached_lvds(struct drm_connector * connector)62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
63 {
64 return container_of(intel_attached_encoder(connector),
65 struct intel_lvds, base);
66 }
67
68 /**
69 * Sets the power state for the panel.
70 */
intel_lvds_enable(struct intel_lvds * intel_lvds)71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
72 {
73 struct drm_device *dev = intel_lvds->base.base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 u32 ctl_reg, lvds_reg, stat_reg;
76
77 if (HAS_PCH_SPLIT(dev)) {
78 ctl_reg = PCH_PP_CONTROL;
79 lvds_reg = PCH_LVDS;
80 stat_reg = PCH_PP_STATUS;
81 } else {
82 ctl_reg = PP_CONTROL;
83 lvds_reg = LVDS;
84 stat_reg = PP_STATUS;
85 }
86
87 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
88
89 if (intel_lvds->pfit_dirty) {
90 /*
91 * Enable automatic panel scaling so that non-native modes
92 * fill the screen. The panel fitter should only be
93 * adjusted whilst the pipe is disabled, according to
94 * register description and PRM.
95 */
96 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
97 intel_lvds->pfit_control,
98 intel_lvds->pfit_pgm_ratios);
99
100 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
101 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
102 intel_lvds->pfit_dirty = false;
103 }
104
105 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
106 POSTING_READ(lvds_reg);
107 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
108 DRM_ERROR("timed out waiting for panel to power on\n");
109
110 intel_panel_enable_backlight(dev);
111 }
112
intel_lvds_disable(struct intel_lvds * intel_lvds)113 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
114 {
115 struct drm_device *dev = intel_lvds->base.base.dev;
116 struct drm_i915_private *dev_priv = dev->dev_private;
117 u32 ctl_reg, lvds_reg, stat_reg;
118
119 if (HAS_PCH_SPLIT(dev)) {
120 ctl_reg = PCH_PP_CONTROL;
121 lvds_reg = PCH_LVDS;
122 stat_reg = PCH_PP_STATUS;
123 } else {
124 ctl_reg = PP_CONTROL;
125 lvds_reg = LVDS;
126 stat_reg = PP_STATUS;
127 }
128
129 intel_panel_disable_backlight(dev);
130
131 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
132 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
133 DRM_ERROR("timed out waiting for panel to power off\n");
134
135 if (intel_lvds->pfit_control) {
136 I915_WRITE(PFIT_CONTROL, 0);
137 intel_lvds->pfit_dirty = true;
138 }
139
140 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
141 POSTING_READ(lvds_reg);
142 }
143
intel_lvds_dpms(struct drm_encoder * encoder,int mode)144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
145 {
146 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
147
148 if (mode == DRM_MODE_DPMS_ON)
149 intel_lvds_enable(intel_lvds);
150 else
151 intel_lvds_disable(intel_lvds);
152
153 /* XXX: We never power down the LVDS pairs. */
154 }
155
intel_lvds_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)156 static int intel_lvds_mode_valid(struct drm_connector *connector,
157 struct drm_display_mode *mode)
158 {
159 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
160 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
161
162 if (mode->hdisplay > fixed_mode->hdisplay)
163 return MODE_PANEL;
164 if (mode->vdisplay > fixed_mode->vdisplay)
165 return MODE_PANEL;
166
167 return MODE_OK;
168 }
169
170 static void
centre_horizontally(struct drm_display_mode * mode,int width)171 centre_horizontally(struct drm_display_mode *mode,
172 int width)
173 {
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
178 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (mode->hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 mode->crtc_hdisplay = width;
185 mode->crtc_hblank_start = width + border;
186 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
187
188 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
189 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
190
191 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
192 }
193
194 static void
centre_vertically(struct drm_display_mode * mode,int height)195 centre_vertically(struct drm_display_mode *mode,
196 int height)
197 {
198 u32 border, sync_pos, blank_width, sync_width;
199
200 /* keep the vsync and vblank widths constant */
201 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
202 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
203 sync_pos = (blank_width - sync_width + 1) / 2;
204
205 border = (mode->vdisplay - height + 1) / 2;
206
207 mode->crtc_vdisplay = height;
208 mode->crtc_vblank_start = height + border;
209 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
210
211 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
212 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
213
214 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
215 }
216
panel_fitter_scaling(u32 source,u32 target)217 static inline u32 panel_fitter_scaling(u32 source, u32 target)
218 {
219 /*
220 * Floating point operation is not supported. So the FACTOR
221 * is defined, which can avoid the floating point computation
222 * when calculating the panel ratio.
223 */
224 #define ACCURACY 12
225 #define FACTOR (1 << ACCURACY)
226 u32 ratio = source * FACTOR / target;
227 return (FACTOR * ratio + FACTOR/2) / FACTOR;
228 }
229
intel_lvds_mode_fixup(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)230 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
231 struct drm_display_mode *mode,
232 struct drm_display_mode *adjusted_mode)
233 {
234 struct drm_device *dev = encoder->dev;
235 struct drm_i915_private *dev_priv = dev->dev_private;
236 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
237 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
238 struct drm_encoder *tmp_encoder;
239 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
240 int pipe;
241
242 /* Should never happen!! */
243 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
244 DRM_ERROR("Can't support LVDS on pipe A\n");
245 return false;
246 }
247
248 /* Should never happen!! */
249 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
250 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
251 DRM_ERROR("Can't enable LVDS and another "
252 "encoder on the same pipe\n");
253 return false;
254 }
255 }
256
257 /*
258 * We have timings from the BIOS for the panel, put them in
259 * to the adjusted mode. The CRTC will be set up for this mode,
260 * with the panel scaling set up to source from the H/VDisplay
261 * of the original mode.
262 */
263 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
264
265 if (HAS_PCH_SPLIT(dev)) {
266 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
267 mode, adjusted_mode);
268 return true;
269 }
270
271 /* Native modes don't need fitting */
272 if (adjusted_mode->hdisplay == mode->hdisplay &&
273 adjusted_mode->vdisplay == mode->vdisplay)
274 goto out;
275
276 /* 965+ wants fuzzy fitting */
277 if (INTEL_INFO(dev)->gen >= 4)
278 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
279 PFIT_FILTER_FUZZY);
280
281 /*
282 * Enable automatic panel scaling for non-native modes so that they fill
283 * the screen. Should be enabled before the pipe is enabled, according
284 * to register description and PRM.
285 * Change the value here to see the borders for debugging
286 */
287 for_each_pipe(pipe)
288 I915_WRITE(BCLRPAT(pipe), 0);
289
290 drm_mode_set_crtcinfo(adjusted_mode, 0);
291
292 switch (intel_lvds->fitting_mode) {
293 case DRM_MODE_SCALE_CENTER:
294 /*
295 * For centered modes, we have to calculate border widths &
296 * heights and modify the values programmed into the CRTC.
297 */
298 centre_horizontally(adjusted_mode, mode->hdisplay);
299 centre_vertically(adjusted_mode, mode->vdisplay);
300 border = LVDS_BORDER_ENABLE;
301 break;
302
303 case DRM_MODE_SCALE_ASPECT:
304 /* Scale but preserve the aspect ratio */
305 if (INTEL_INFO(dev)->gen >= 4) {
306 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
307 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
308
309 /* 965+ is easy, it does everything in hw */
310 if (scaled_width > scaled_height)
311 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
312 else if (scaled_width < scaled_height)
313 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
314 else if (adjusted_mode->hdisplay != mode->hdisplay)
315 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
316 } else {
317 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
318 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
319 /*
320 * For earlier chips we have to calculate the scaling
321 * ratio by hand and program it into the
322 * PFIT_PGM_RATIO register
323 */
324 if (scaled_width > scaled_height) { /* pillar */
325 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
326
327 border = LVDS_BORDER_ENABLE;
328 if (mode->vdisplay != adjusted_mode->vdisplay) {
329 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
330 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
331 bits << PFIT_VERT_SCALE_SHIFT);
332 pfit_control |= (PFIT_ENABLE |
333 VERT_INTERP_BILINEAR |
334 HORIZ_INTERP_BILINEAR);
335 }
336 } else if (scaled_width < scaled_height) { /* letter */
337 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
338
339 border = LVDS_BORDER_ENABLE;
340 if (mode->hdisplay != adjusted_mode->hdisplay) {
341 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
342 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
343 bits << PFIT_VERT_SCALE_SHIFT);
344 pfit_control |= (PFIT_ENABLE |
345 VERT_INTERP_BILINEAR |
346 HORIZ_INTERP_BILINEAR);
347 }
348 } else
349 /* Aspects match, Let hw scale both directions */
350 pfit_control |= (PFIT_ENABLE |
351 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
352 VERT_INTERP_BILINEAR |
353 HORIZ_INTERP_BILINEAR);
354 }
355 break;
356
357 case DRM_MODE_SCALE_FULLSCREEN:
358 /*
359 * Full scaling, even if it changes the aspect ratio.
360 * Fortunately this is all done for us in hw.
361 */
362 if (mode->vdisplay != adjusted_mode->vdisplay ||
363 mode->hdisplay != adjusted_mode->hdisplay) {
364 pfit_control |= PFIT_ENABLE;
365 if (INTEL_INFO(dev)->gen >= 4)
366 pfit_control |= PFIT_SCALING_AUTO;
367 else
368 pfit_control |= (VERT_AUTO_SCALE |
369 VERT_INTERP_BILINEAR |
370 HORIZ_AUTO_SCALE |
371 HORIZ_INTERP_BILINEAR);
372 }
373 break;
374
375 default:
376 break;
377 }
378
379 out:
380 /* If not enabling scaling, be consistent and always use 0. */
381 if ((pfit_control & PFIT_ENABLE) == 0) {
382 pfit_control = 0;
383 pfit_pgm_ratios = 0;
384 }
385
386 /* Make sure pre-965 set dither correctly */
387 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
388 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
389
390 if (pfit_control != intel_lvds->pfit_control ||
391 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
392 intel_lvds->pfit_control = pfit_control;
393 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
394 intel_lvds->pfit_dirty = true;
395 }
396 dev_priv->lvds_border_bits = border;
397
398 /*
399 * XXX: It would be nice to support lower refresh rates on the
400 * panels to reduce power consumption, and perhaps match the
401 * user's requested refresh rate.
402 */
403
404 return true;
405 }
406
intel_lvds_prepare(struct drm_encoder * encoder)407 static void intel_lvds_prepare(struct drm_encoder *encoder)
408 {
409 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
410
411 intel_lvds_disable(intel_lvds);
412 }
413
intel_lvds_commit(struct drm_encoder * encoder)414 static void intel_lvds_commit(struct drm_encoder *encoder)
415 {
416 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
417
418 /* Always do a full power on as we do not know what state
419 * we were left in.
420 */
421 intel_lvds_enable(intel_lvds);
422 }
423
intel_lvds_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)424 static void intel_lvds_mode_set(struct drm_encoder *encoder,
425 struct drm_display_mode *mode,
426 struct drm_display_mode *adjusted_mode)
427 {
428 /*
429 * The LVDS pin pair will already have been turned on in the
430 * intel_crtc_mode_set since it has a large impact on the DPLL
431 * settings.
432 */
433 }
434
435 /**
436 * Detect the LVDS connection.
437 *
438 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
439 * connected and closed means disconnected. We also send hotplug events as
440 * needed, using lid status notification from the input layer.
441 */
442 static enum drm_connector_status
intel_lvds_detect(struct drm_connector * connector,bool force)443 intel_lvds_detect(struct drm_connector *connector, bool force)
444 {
445 struct drm_device *dev = connector->dev;
446 enum drm_connector_status status;
447
448 status = intel_panel_detect(dev);
449 if (status != connector_status_unknown)
450 return status;
451
452 return connector_status_connected;
453 }
454
455 /**
456 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
457 */
intel_lvds_get_modes(struct drm_connector * connector)458 static int intel_lvds_get_modes(struct drm_connector *connector)
459 {
460 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
461 struct drm_device *dev = connector->dev;
462 struct drm_display_mode *mode;
463
464 if (intel_lvds->edid)
465 return drm_add_edid_modes(connector, intel_lvds->edid);
466
467 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
468 if (mode == NULL)
469 return 0;
470
471 drm_mode_probed_add(connector, mode);
472 return 1;
473 }
474
intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id * id)475 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
476 {
477 DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
478 return 1;
479 }
480
481 /* The GPU hangs up on these systems if modeset is performed on LID open */
482 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
483 {
484 .callback = intel_no_modeset_on_lid_dmi_callback,
485 .ident = "Toshiba Tecra A11",
486 .matches = {
487 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
488 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
489 },
490 },
491
492 { } /* terminating entry */
493 };
494
495 /*
496 * Lid events. Note the use of 'modeset_on_lid':
497 * - we set it on lid close, and reset it on open
498 * - we use it as a "only once" bit (ie we ignore
499 * duplicate events where it was already properly
500 * set/reset)
501 * - the suspend/resume paths will also set it to
502 * zero, since they restore the mode ("lid open").
503 */
intel_lid_notify(struct notifier_block * nb,unsigned long val,void * unused)504 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
505 void *unused)
506 {
507 struct drm_i915_private *dev_priv =
508 container_of(nb, struct drm_i915_private, lid_notifier);
509 struct drm_device *dev = dev_priv->dev;
510 struct drm_connector *connector = dev_priv->int_lvds_connector;
511
512 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
513 return NOTIFY_OK;
514
515 /*
516 * check and update the status of LVDS connector after receiving
517 * the LID nofication event.
518 */
519 if (connector)
520 connector->status = connector->funcs->detect(connector,
521 false);
522
523 /* Don't force modeset on machines where it causes a GPU lockup */
524 if (dmi_check_system(intel_no_modeset_on_lid))
525 return NOTIFY_OK;
526 if (!acpi_lid_open()) {
527 dev_priv->modeset_on_lid = 1;
528 return NOTIFY_OK;
529 }
530
531 if (!dev_priv->modeset_on_lid)
532 return NOTIFY_OK;
533
534 dev_priv->modeset_on_lid = 0;
535
536 mutex_lock(&dev->mode_config.mutex);
537 drm_helper_resume_force_mode(dev);
538 i915_redisable_vga(dev);
539 mutex_unlock(&dev->mode_config.mutex);
540
541 return NOTIFY_OK;
542 }
543
544 /**
545 * intel_lvds_destroy - unregister and free LVDS structures
546 * @connector: connector to free
547 *
548 * Unregister the DDC bus for this connector then free the driver private
549 * structure.
550 */
intel_lvds_destroy(struct drm_connector * connector)551 static void intel_lvds_destroy(struct drm_connector *connector)
552 {
553 struct drm_device *dev = connector->dev;
554 struct drm_i915_private *dev_priv = dev->dev_private;
555
556 if (dev_priv->lid_notifier.notifier_call)
557 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
558 drm_sysfs_connector_remove(connector);
559 drm_connector_cleanup(connector);
560 kfree(connector);
561 }
562
intel_lvds_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t value)563 static int intel_lvds_set_property(struct drm_connector *connector,
564 struct drm_property *property,
565 uint64_t value)
566 {
567 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
568 struct drm_device *dev = connector->dev;
569
570 if (property == dev->mode_config.scaling_mode_property) {
571 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
572
573 if (value == DRM_MODE_SCALE_NONE) {
574 DRM_DEBUG_KMS("no scaling not supported\n");
575 return -EINVAL;
576 }
577
578 if (intel_lvds->fitting_mode == value) {
579 /* the LVDS scaling property is not changed */
580 return 0;
581 }
582 intel_lvds->fitting_mode = value;
583 if (crtc && crtc->enabled) {
584 /*
585 * If the CRTC is enabled, the display will be changed
586 * according to the new panel fitting mode.
587 */
588 drm_crtc_helper_set_mode(crtc, &crtc->mode,
589 crtc->x, crtc->y, crtc->fb);
590 }
591 }
592
593 return 0;
594 }
595
596 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
597 .dpms = intel_lvds_dpms,
598 .mode_fixup = intel_lvds_mode_fixup,
599 .prepare = intel_lvds_prepare,
600 .mode_set = intel_lvds_mode_set,
601 .commit = intel_lvds_commit,
602 };
603
604 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
605 .get_modes = intel_lvds_get_modes,
606 .mode_valid = intel_lvds_mode_valid,
607 .best_encoder = intel_best_encoder,
608 };
609
610 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
611 .dpms = drm_helper_connector_dpms,
612 .detect = intel_lvds_detect,
613 .fill_modes = drm_helper_probe_single_connector_modes,
614 .set_property = intel_lvds_set_property,
615 .destroy = intel_lvds_destroy,
616 };
617
618 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
619 .destroy = intel_encoder_destroy,
620 };
621
intel_no_lvds_dmi_callback(const struct dmi_system_id * id)622 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
623 {
624 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
625 return 1;
626 }
627
628 /* These systems claim to have LVDS, but really don't */
629 static const struct dmi_system_id intel_no_lvds[] = {
630 {
631 .callback = intel_no_lvds_dmi_callback,
632 .ident = "Apple Mac Mini (Core series)",
633 .matches = {
634 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
635 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
636 },
637 },
638 {
639 .callback = intel_no_lvds_dmi_callback,
640 .ident = "Apple Mac Mini (Core 2 series)",
641 .matches = {
642 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
643 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
644 },
645 },
646 {
647 .callback = intel_no_lvds_dmi_callback,
648 .ident = "MSI IM-945GSE-A",
649 .matches = {
650 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
651 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
652 },
653 },
654 {
655 .callback = intel_no_lvds_dmi_callback,
656 .ident = "Dell Studio Hybrid",
657 .matches = {
658 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
659 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
660 },
661 },
662 {
663 .callback = intel_no_lvds_dmi_callback,
664 .ident = "Dell OptiPlex FX170",
665 .matches = {
666 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
667 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
668 },
669 },
670 {
671 .callback = intel_no_lvds_dmi_callback,
672 .ident = "AOpen Mini PC",
673 .matches = {
674 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
675 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
676 },
677 },
678 {
679 .callback = intel_no_lvds_dmi_callback,
680 .ident = "AOpen Mini PC MP915",
681 .matches = {
682 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
683 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
684 },
685 },
686 {
687 .callback = intel_no_lvds_dmi_callback,
688 .ident = "AOpen i915GMm-HFS",
689 .matches = {
690 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
691 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
692 },
693 },
694 {
695 .callback = intel_no_lvds_dmi_callback,
696 .ident = "AOpen i45GMx-I",
697 .matches = {
698 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
699 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
700 },
701 },
702 {
703 .callback = intel_no_lvds_dmi_callback,
704 .ident = "Aopen i945GTt-VFA",
705 .matches = {
706 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
707 },
708 },
709 {
710 .callback = intel_no_lvds_dmi_callback,
711 .ident = "Clientron U800",
712 .matches = {
713 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
714 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
715 },
716 },
717 {
718 .callback = intel_no_lvds_dmi_callback,
719 .ident = "Clientron E830",
720 .matches = {
721 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
722 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
723 },
724 },
725 {
726 .callback = intel_no_lvds_dmi_callback,
727 .ident = "Asus EeeBox PC EB1007",
728 .matches = {
729 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
730 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
731 },
732 },
733 {
734 .callback = intel_no_lvds_dmi_callback,
735 .ident = "Asus AT5NM10T-I",
736 .matches = {
737 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
738 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
739 },
740 },
741 {
742 .callback = intel_no_lvds_dmi_callback,
743 .ident = "Hewlett-Packard HP t5740",
744 .matches = {
745 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
746 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
747 },
748 },
749 {
750 .callback = intel_no_lvds_dmi_callback,
751 .ident = "Hewlett-Packard t5745",
752 .matches = {
753 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
754 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
755 },
756 },
757 {
758 .callback = intel_no_lvds_dmi_callback,
759 .ident = "Hewlett-Packard st5747",
760 .matches = {
761 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
762 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
763 },
764 },
765 {
766 .callback = intel_no_lvds_dmi_callback,
767 .ident = "MSI Wind Box DC500",
768 .matches = {
769 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
770 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
771 },
772 },
773 {
774 .callback = intel_no_lvds_dmi_callback,
775 .ident = "Gigabyte GA-D525TUD",
776 .matches = {
777 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
778 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
779 },
780 },
781 {
782 .callback = intel_no_lvds_dmi_callback,
783 .ident = "Supermicro X7SPA-H",
784 .matches = {
785 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
786 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
787 },
788 },
789 {
790 .callback = intel_no_lvds_dmi_callback,
791 .ident = "Fujitsu Esprimo Q900",
792 .matches = {
793 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
794 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
795 },
796 },
797
798 { } /* terminating entry */
799 };
800
801 /**
802 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
803 * @dev: drm device
804 * @connector: LVDS connector
805 *
806 * Find the reduced downclock for LVDS in EDID.
807 */
intel_find_lvds_downclock(struct drm_device * dev,struct drm_display_mode * fixed_mode,struct drm_connector * connector)808 static void intel_find_lvds_downclock(struct drm_device *dev,
809 struct drm_display_mode *fixed_mode,
810 struct drm_connector *connector)
811 {
812 struct drm_i915_private *dev_priv = dev->dev_private;
813 struct drm_display_mode *scan;
814 int temp_downclock;
815
816 temp_downclock = fixed_mode->clock;
817 list_for_each_entry(scan, &connector->probed_modes, head) {
818 /*
819 * If one mode has the same resolution with the fixed_panel
820 * mode while they have the different refresh rate, it means
821 * that the reduced downclock is found for the LVDS. In such
822 * case we can set the different FPx0/1 to dynamically select
823 * between low and high frequency.
824 */
825 if (scan->hdisplay == fixed_mode->hdisplay &&
826 scan->hsync_start == fixed_mode->hsync_start &&
827 scan->hsync_end == fixed_mode->hsync_end &&
828 scan->htotal == fixed_mode->htotal &&
829 scan->vdisplay == fixed_mode->vdisplay &&
830 scan->vsync_start == fixed_mode->vsync_start &&
831 scan->vsync_end == fixed_mode->vsync_end &&
832 scan->vtotal == fixed_mode->vtotal) {
833 if (scan->clock < temp_downclock) {
834 /*
835 * The downclock is already found. But we
836 * expect to find the lower downclock.
837 */
838 temp_downclock = scan->clock;
839 }
840 }
841 }
842 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
843 /* We found the downclock for LVDS. */
844 dev_priv->lvds_downclock_avail = 1;
845 dev_priv->lvds_downclock = temp_downclock;
846 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
847 "Normal clock %dKhz, downclock %dKhz\n",
848 fixed_mode->clock, temp_downclock);
849 }
850 }
851
852 /*
853 * Enumerate the child dev array parsed from VBT to check whether
854 * the LVDS is present.
855 * If it is present, return 1.
856 * If it is not present, return false.
857 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
858 */
lvds_is_present_in_vbt(struct drm_device * dev,u8 * i2c_pin)859 static bool lvds_is_present_in_vbt(struct drm_device *dev,
860 u8 *i2c_pin)
861 {
862 struct drm_i915_private *dev_priv = dev->dev_private;
863 int i;
864
865 if (!dev_priv->child_dev_num)
866 return true;
867
868 for (i = 0; i < dev_priv->child_dev_num; i++) {
869 struct child_device_config *child = dev_priv->child_dev + i;
870
871 /* If the device type is not LFP, continue.
872 * We have to check both the new identifiers as well as the
873 * old for compatibility with some BIOSes.
874 */
875 if (child->device_type != DEVICE_TYPE_INT_LFP &&
876 child->device_type != DEVICE_TYPE_LFP)
877 continue;
878
879 if (child->i2c_pin)
880 *i2c_pin = child->i2c_pin;
881
882 /* However, we cannot trust the BIOS writers to populate
883 * the VBT correctly. Since LVDS requires additional
884 * information from AIM blocks, a non-zero addin offset is
885 * a good indicator that the LVDS is actually present.
886 */
887 if (child->addin_offset)
888 return true;
889
890 /* But even then some BIOS writers perform some black magic
891 * and instantiate the device without reference to any
892 * additional data. Trust that if the VBT was written into
893 * the OpRegion then they have validated the LVDS's existence.
894 */
895 if (dev_priv->opregion.vbt)
896 return true;
897 }
898
899 return false;
900 }
901
intel_lvds_supported(struct drm_device * dev)902 static bool intel_lvds_supported(struct drm_device *dev)
903 {
904 /* With the introduction of the PCH we gained a dedicated
905 * LVDS presence pin, use it. */
906 if (HAS_PCH_SPLIT(dev))
907 return true;
908
909 /* Otherwise LVDS was only attached to mobile products,
910 * except for the inglorious 830gm */
911 return IS_MOBILE(dev) && !IS_I830(dev);
912 }
913
914 /**
915 * intel_lvds_init - setup LVDS connectors on this device
916 * @dev: drm device
917 *
918 * Create the connector, register the LVDS DDC bus, and try to figure out what
919 * modes we can display on the LVDS panel (if present).
920 */
intel_lvds_init(struct drm_device * dev)921 bool intel_lvds_init(struct drm_device *dev)
922 {
923 struct drm_i915_private *dev_priv = dev->dev_private;
924 struct intel_lvds *intel_lvds;
925 struct intel_encoder *intel_encoder;
926 struct intel_connector *intel_connector;
927 struct drm_connector *connector;
928 struct drm_encoder *encoder;
929 struct drm_display_mode *scan; /* *modes, *bios_mode; */
930 struct drm_crtc *crtc;
931 u32 lvds;
932 int pipe;
933 u8 pin;
934
935 if (!intel_lvds_supported(dev))
936 return false;
937
938 /* Skip init on machines we know falsely report LVDS */
939 if (dmi_check_system(intel_no_lvds))
940 return false;
941
942 pin = GMBUS_PORT_PANEL;
943 if (!lvds_is_present_in_vbt(dev, &pin)) {
944 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
945 return false;
946 }
947
948 if (HAS_PCH_SPLIT(dev)) {
949 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
950 return false;
951 if (dev_priv->edp.support) {
952 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
953 return false;
954 }
955 }
956
957 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
958 if (!intel_lvds) {
959 return false;
960 }
961
962 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
963 if (!intel_connector) {
964 kfree(intel_lvds);
965 return false;
966 }
967
968 if (!HAS_PCH_SPLIT(dev)) {
969 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
970 }
971
972 intel_encoder = &intel_lvds->base;
973 encoder = &intel_encoder->base;
974 connector = &intel_connector->base;
975 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
976 DRM_MODE_CONNECTOR_LVDS);
977
978 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
979 DRM_MODE_ENCODER_LVDS);
980
981 intel_connector_attach_encoder(intel_connector, intel_encoder);
982 intel_encoder->type = INTEL_OUTPUT_LVDS;
983
984 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
985 if (HAS_PCH_SPLIT(dev))
986 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
987 else
988 intel_encoder->crtc_mask = (1 << 1);
989
990 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
991 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
992 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
993 connector->interlace_allowed = false;
994 connector->doublescan_allowed = false;
995
996 /* create the scaling mode property */
997 drm_mode_create_scaling_mode_property(dev);
998 /*
999 * the initial panel fitting mode will be FULL_SCREEN.
1000 */
1001
1002 drm_connector_attach_property(&intel_connector->base,
1003 dev->mode_config.scaling_mode_property,
1004 DRM_MODE_SCALE_ASPECT);
1005 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
1006 /*
1007 * LVDS discovery:
1008 * 1) check for EDID on DDC
1009 * 2) check for VBT data
1010 * 3) check to see if LVDS is already on
1011 * if none of the above, no panel
1012 * 4) make sure lid is open
1013 * if closed, act like it's not there for now
1014 */
1015
1016 /*
1017 * Attempt to get the fixed panel mode from DDC. Assume that the
1018 * preferred mode is the right one.
1019 */
1020 intel_lvds->edid = drm_get_edid(connector,
1021 &dev_priv->gmbus[pin].adapter);
1022 if (intel_lvds->edid) {
1023 if (drm_add_edid_modes(connector,
1024 intel_lvds->edid)) {
1025 drm_mode_connector_update_edid_property(connector,
1026 intel_lvds->edid);
1027 } else {
1028 kfree(intel_lvds->edid);
1029 intel_lvds->edid = NULL;
1030 }
1031 }
1032 if (!intel_lvds->edid) {
1033 /* Didn't get an EDID, so
1034 * Set wide sync ranges so we get all modes
1035 * handed to valid_mode for checking
1036 */
1037 connector->display_info.min_vfreq = 0;
1038 connector->display_info.max_vfreq = 200;
1039 connector->display_info.min_hfreq = 0;
1040 connector->display_info.max_hfreq = 200;
1041 }
1042
1043 list_for_each_entry(scan, &connector->probed_modes, head) {
1044 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1045 intel_lvds->fixed_mode =
1046 drm_mode_duplicate(dev, scan);
1047 intel_find_lvds_downclock(dev,
1048 intel_lvds->fixed_mode,
1049 connector);
1050 goto out;
1051 }
1052 }
1053
1054 /* Failed to get EDID, what about VBT? */
1055 if (dev_priv->lfp_lvds_vbt_mode) {
1056 intel_lvds->fixed_mode =
1057 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1058 if (intel_lvds->fixed_mode) {
1059 intel_lvds->fixed_mode->type |=
1060 DRM_MODE_TYPE_PREFERRED;
1061 goto out;
1062 }
1063 }
1064
1065 /*
1066 * If we didn't get EDID, try checking if the panel is already turned
1067 * on. If so, assume that whatever is currently programmed is the
1068 * correct mode.
1069 */
1070
1071 /* Ironlake: FIXME if still fail, not try pipe mode now */
1072 if (HAS_PCH_SPLIT(dev))
1073 goto failed;
1074
1075 lvds = I915_READ(LVDS);
1076 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1077 crtc = intel_get_crtc_for_pipe(dev, pipe);
1078
1079 if (crtc && (lvds & LVDS_PORT_EN)) {
1080 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1081 if (intel_lvds->fixed_mode) {
1082 intel_lvds->fixed_mode->type |=
1083 DRM_MODE_TYPE_PREFERRED;
1084 goto out;
1085 }
1086 }
1087
1088 /* If we still don't have a mode after all that, give up. */
1089 if (!intel_lvds->fixed_mode)
1090 goto failed;
1091
1092 out:
1093 if (HAS_PCH_SPLIT(dev) &&
1094 !(dev_priv->quirks & QUIRK_NO_PCH_PWM_ENABLE)) {
1095 u32 pwm;
1096
1097 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
1098
1099 /* make sure PWM is enabled and locked to the LVDS pipe */
1100 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1101 if (pipe == 0 && (pwm & PWM_PIPE_B))
1102 I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1103 if (pipe)
1104 pwm |= PWM_PIPE_B;
1105 else
1106 pwm &= ~PWM_PIPE_B;
1107 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1108
1109 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1110 pwm |= PWM_PCH_ENABLE;
1111 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1112 /*
1113 * Unlock registers and just
1114 * leave them unlocked
1115 */
1116 I915_WRITE(PCH_PP_CONTROL,
1117 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1118 } else {
1119 /*
1120 * Unlock registers and just
1121 * leave them unlocked
1122 */
1123 I915_WRITE(PP_CONTROL,
1124 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1125 }
1126 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1127 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1128 DRM_DEBUG_KMS("lid notifier registration failed\n");
1129 dev_priv->lid_notifier.notifier_call = NULL;
1130 }
1131 /* keep the LVDS connector */
1132 dev_priv->int_lvds_connector = connector;
1133 drm_sysfs_connector_add(connector);
1134
1135 intel_panel_setup_backlight(dev);
1136
1137 return true;
1138
1139 failed:
1140 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1141 drm_connector_cleanup(connector);
1142 drm_encoder_cleanup(encoder);
1143 kfree(intel_lvds);
1144 kfree(intel_connector);
1145 return false;
1146 }
1147