/linux-6.6.21/arch/arm/include/asm/hardware/ |
D | cp14.h | 12 #define dbg_write(val, reg) WCP14_##reg(val) argument 14 #define etm_write(val, reg) WCP14_##reg(val) argument 24 #define MCR14(val, op1, crn, crm, op2) \ argument 152 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0) argument 153 #define WCP14_DBGWFAR(val) MCR14(val, 0, c0, c6, 0) argument 154 #define WCP14_DBGVCR(val) MCR14(val, 0, c0, c7, 0) argument 155 #define WCP14_DBGECR(val) MCR14(val, 0, c0, c9, 0) argument 156 #define WCP14_DBGDSCCR(val) MCR14(val, 0, c0, c10, 0) argument 157 #define WCP14_DBGDSMCR(val) MCR14(val, 0, c0, c11, 0) argument 158 #define WCP14_DBGDTRRXext(val) MCR14(val, 0, c0, c0, 2) argument [all …]
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/linux-6.6.21/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
D | types.h | 133 #define CONF_HAS(config, val) ((config) & (1 << (val))) argument 138 #define CONF_IS(config, val) ((config) == (1 << (val))) argument 139 #define CONF_GE(config, val) ((config) & (0-(1 << (val)))) argument 140 #define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) argument 141 #define CONF_LT(config, val) ((config) & ((1 << (val))-1)) argument 142 #define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) argument 146 #define NCONF_HAS(val) CONF_HAS(NCONF, val) argument 148 #define NCONF_IS(val) CONF_IS(NCONF, val) argument 149 #define NCONF_GE(val) CONF_GE(NCONF, val) argument 150 #define NCONF_GT(val) CONF_GT(NCONF, val) argument [all …]
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/linux-6.6.21/drivers/net/wireless/realtek/rtw89/ |
D | fw.h | 341 static inline void RTW89_SET_FWCMD_SEC_IDX(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_IDX() 346 static inline void RTW89_SET_FWCMD_SEC_OFFSET(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_OFFSET() 351 static inline void RTW89_SET_FWCMD_SEC_LEN(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_LEN() 356 static inline void RTW89_SET_FWCMD_SEC_TYPE(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_TYPE() 361 static inline void RTW89_SET_FWCMD_SEC_EXT_KEY(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_EXT_KEY() 366 static inline void RTW89_SET_FWCMD_SEC_SPP_MODE(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_SPP_MODE() 371 static inline void RTW89_SET_FWCMD_SEC_KEY0(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY0() 376 static inline void RTW89_SET_FWCMD_SEC_KEY1(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY1() 381 static inline void RTW89_SET_FWCMD_SEC_KEY2(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY2() 386 static inline void RTW89_SET_FWCMD_SEC_KEY3(void *cmd, u32 val) in RTW89_SET_FWCMD_SEC_KEY3() [all …]
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/linux-6.6.21/drivers/gpu/drm/msm/adreno/ |
D | a6xx.xml.h | 1123 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_MRB_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_MRB_START() 1129 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_VSD_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_VSD_START() 1135 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB1_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB1_START() 1141 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_1_IB2_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_1_IB2_START() 1149 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_SDS_START(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_SDS_START() 1155 static inline uint32_t A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE(uint32_t val) in A6XX_CP_ROQ_THRESHOLDS_2_ROQ_SIZE() 1182 static inline uint32_t A6XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val) in A6XX_CP_PROTECT_REG_BASE_ADDR() 1188 static inline uint32_t A6XX_CP_PROTECT_REG_MASK_LEN(uint32_t val) in A6XX_CP_PROTECT_REG_MASK_LEN() 1257 static inline uint32_t A6XX_CP_ROQ_RB_STAT_RPTR(uint32_t val) in A6XX_CP_ROQ_RB_STAT_RPTR() 1263 static inline uint32_t A6XX_CP_ROQ_RB_STAT_WPTR(uint32_t val) in A6XX_CP_ROQ_RB_STAT_WPTR() [all …]
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D | adreno_pm4.xml.h | 526 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF() 532 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC() 538 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK() 544 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT() 552 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE() 558 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR() 566 static inline uint32_t CP_LOAD_STATE4_0_DST_OFF(uint32_t val) in CP_LOAD_STATE4_0_DST_OFF() 572 static inline uint32_t CP_LOAD_STATE4_0_STATE_SRC(enum a4xx_state_src val) in CP_LOAD_STATE4_0_STATE_SRC() 578 static inline uint32_t CP_LOAD_STATE4_0_STATE_BLOCK(enum a4xx_state_block val) in CP_LOAD_STATE4_0_STATE_BLOCK() 584 static inline uint32_t CP_LOAD_STATE4_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE4_0_NUM_UNIT() [all …]
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D | a3xx.xml.h | 947 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES() 955 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ() 961 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT() 969 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET() 977 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE() 985 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET() 993 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE() 1001 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET() 1009 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE() 1017 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A3XX_GRAS_SU_POINT_MINMAX_MIN() [all …]
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D | a4xx.xml.h | 845 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val) in A4XX_CGC_HLSQ_EARLY_CYC() 902 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH() 908 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT() 924 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val) in A4XX_RB_MODE_CONTROL_WIDTH() 930 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val) in A4XX_RB_MODE_CONTROL_HEIGHT() 944 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val) in A4XX_RB_MSAA_CONTROL_SAMPLES() 952 static inline uint32_t A4XX_RB_RENDER_CONTROL2_COORD_MASK(uint32_t val) in A4XX_RB_RENDER_CONTROL2_COORD_MASK() 961 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val) in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES() 980 static inline uint32_t A4XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val) in A4XX_RB_MRT_CONTROL_ROP_CODE() 986 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE() [all …]
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/linux-6.6.21/arch/s390/include/asm/ |
D | percpu.h | 27 #define arch_this_cpu_to_op_simple(pcp, val, op) \ argument 44 #define this_cpu_add_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument 45 #define this_cpu_add_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument 46 #define this_cpu_add_return_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument 47 #define this_cpu_add_return_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument 48 #define this_cpu_and_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument 49 #define this_cpu_and_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, &) argument 50 #define this_cpu_or_1(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument 51 #define this_cpu_or_2(pcp, val) arch_this_cpu_to_op_simple(pcp, val, |) argument 55 #define this_cpu_add_4(pcp, val) arch_this_cpu_to_op_simple(pcp, val, +) argument [all …]
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/linux-6.6.21/arch/loongarch/include/asm/ |
D | percpu.h | 103 static __always_inline void __percpu_write(void *ptr, unsigned long val, int size) in __percpu_write() 135 static __always_inline unsigned long __percpu_xchg(void *ptr, unsigned long val, in __percpu_xchg() 173 #define _percpu_write(pcp, val) \ argument 178 #define _pcp_protect(operation, pcp, val) \ argument 188 #define _percpu_add(pcp, val) \ argument 191 #define _percpu_add_return(pcp, val) _percpu_add(pcp, val) argument 193 #define _percpu_and(pcp, val) \ argument 196 #define _percpu_or(pcp, val) \ argument 199 #define _percpu_xchg(pcp, val) ((typeof(pcp)) \ argument 202 #define this_cpu_add_4(pcp, val) _percpu_add(pcp, val) argument [all …]
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/linux-6.6.21/drivers/gpu/drm/panel/ |
D | panel-abt-y030xx067a.c | 23 #define REG00_VBRT_CTRL(val) (val) argument 25 #define REG01_COM_DC(val) (val) argument 27 #define REG02_DA_CONTRAST(val) (val) argument 28 #define REG02_VESA_SEL(val) ((val) << 5) argument 31 #define REG03_VPOSITION(val) (val) argument 36 #define REG04_HPOSITION1(val) (val) argument 41 #define REG05_SLBRCHARGE(val) ((val) << 3) argument 42 #define REG05_PRECHARGE_LEVEL(val) ((val) << 6) argument 49 #define REG06_GAMMA_SEL(val) ((val) << 5) argument 58 #define REG07_AMPTST(val) ((val) << 6) argument [all …]
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/linux-6.6.21/arch/powerpc/lib/ |
D | qspinlock.c | 104 static inline int decode_tail_cpu(u32 val) in decode_tail_cpu() 109 static inline int get_owner_cpu(u32 val) in get_owner_cpu() 234 static __always_inline void seen_sleepy_owner(struct qspinlock *lock, u32 val) in seen_sleepy_owner() 250 static __always_inline void seen_sleepy_node(struct qspinlock *lock, u32 val) in seen_sleepy_node() 262 static struct qnode *get_tail_qnode(struct qspinlock *lock, u32 val) in get_tail_qnode() 287 static __always_inline bool __yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt,… in __yield_to_locked_owner() 340 static __always_inline bool yield_to_locked_owner(struct qspinlock *lock, u32 val, bool paravirt) in yield_to_locked_owner() 346 static __always_inline bool yield_head_to_locked_owner(struct qspinlock *lock, u32 val, bool paravi… in yield_head_to_locked_owner() 356 static __always_inline void propagate_yield_cpu(struct qnode *node, u32 val, int *set_yield_cpu, bo… in propagate_yield_cpu() 384 static __always_inline bool yield_to_prev(struct qspinlock *lock, struct qnode *node, u32 val, bool… in yield_to_prev() [all …]
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/linux-6.6.21/sound/synth/emux/ |
D | emux_nrpn.c | 41 int type, int val, int mode) in send_converted_effect() 128 static int fx_delay(int val) in fx_delay() 133 static int fx_attack(int val) in fx_attack() 138 static int fx_hold(int val) in fx_hold() 143 static int fx_decay(int val) in fx_decay() 148 static int fx_the_value(int val) in fx_the_value() 153 static int fx_twice_value(int val) in fx_twice_value() 158 static int fx_conv_pitch(int val) in fx_conv_pitch() 163 static int fx_conv_Q(int val) in fx_conv_Q() 209 static int gs_cutoff(int val) in gs_cutoff() [all …]
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/linux-6.6.21/arch/alpha/lib/ |
D | fpreg.c | 14 #define STT(reg,val) asm volatile ("ftoit $f"#reg",%0" : "=r"(val)); argument 16 #define STT(reg,val) asm volatile ("stt $f"#reg",%0" : "=m"(val)); argument 22 unsigned long val; in alpha_read_fp_reg() local 69 #define LDT(reg,val) asm volatile ("itoft %0,$f"#reg : : "r"(val)); argument 71 #define LDT(reg,val) asm volatile ("ldt $f"#reg",%0" : : "m"(val)); argument 75 alpha_write_fp_reg (unsigned long reg, unsigned long val) in alpha_write_fp_reg() 123 #define STS(reg,val) asm volatile ("ftois $f"#reg",%0" : "=r"(val)); argument 125 #define STS(reg,val) asm volatile ("sts $f"#reg",%0" : "=m"(val)); argument 131 unsigned long val; in alpha_read_fp_reg_s() local 180 #define LDS(reg,val) asm volatile ("itofs %0,$f"#reg : : "r"(val)); argument [all …]
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/linux-6.6.21/include/sound/ |
D | emu8000_reg.h | 108 #define EMU8000_CPF_WRITE(emu, chan, val) \ argument 110 #define EMU8000_PTRX_WRITE(emu, chan, val) \ argument 112 #define EMU8000_CVCF_WRITE(emu, chan, val) \ argument 114 #define EMU8000_VTFT_WRITE(emu, chan, val) \ argument 116 #define EMU8000_PSST_WRITE(emu, chan, val) \ argument 118 #define EMU8000_CSL_WRITE(emu, chan, val) \ argument 120 #define EMU8000_CCCA_WRITE(emu, chan, val) \ argument 122 #define EMU8000_HWCF4_WRITE(emu, val) \ argument 124 #define EMU8000_HWCF5_WRITE(emu, val) \ argument 126 #define EMU8000_HWCF6_WRITE(emu, val) \ argument [all …]
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/linux-6.6.21/arch/mips/include/asm/ |
D | mipsregs.h | 1383 #define write_r10k_perf_cntr(counter,val) \ argument 1402 #define write_r10k_perf_cntl(counter,val) \ argument 1509 #define __write_ulong_c0_register(reg, sel, val) \ argument 1568 #define __write_64bit_c0_split(source, sel, val) \ argument 1655 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val) argument 1658 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val) argument 1661 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) argument 1664 #define writex_c0_entrylo0(val) __writex_32bit_c0_register($2, 0, val) argument 1667 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) argument 1670 #define writex_c0_entrylo1(val) __writex_32bit_c0_register($3, 0, val) argument [all …]
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/linux-6.6.21/drivers/gpu/drm/msm/dsi/ |
D | dsi.xml.h | 146 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val) in DSI_6G_HW_VERSION_MAJOR() 152 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val) in DSI_6G_HW_VERSION_MINOR() 158 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val) in DSI_6G_HW_VERSION_STEP() 213 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val) in DSI_VID_CFG0_VIRT_CHANNEL() 219 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val) in DSI_VID_CFG0_DST_FORMAT() 225 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) in DSI_VID_CFG0_TRAFFIC_MODE() 242 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val) in DSI_VID_CFG1_RGB_SWAP() 250 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val) in DSI_ACTIVE_H_START() 256 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val) in DSI_ACTIVE_H_END() 264 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val) in DSI_ACTIVE_V_START() [all …]
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/linux-6.6.21/arch/alpha/include/uapi/asm/ |
D | compiler.h | 14 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument 15 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument 16 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument 17 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument 18 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument 19 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument 22 # define __kernel_insbl(val, shift) \ argument 26 # define __kernel_inswl(val, shift) \ argument 30 # define __kernel_insql(val, shift) \ argument 34 # define __kernel_inslh(val, shift) \ argument [all …]
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/linux-6.6.21/arch/arm64/include/asm/ |
D | percpu.h | 174 #define this_cpu_write_1(pcp, val) \ argument 176 #define this_cpu_write_2(pcp, val) \ argument 178 #define this_cpu_write_4(pcp, val) \ argument 180 #define this_cpu_write_8(pcp, val) \ argument 183 #define this_cpu_add_1(pcp, val) \ argument 185 #define this_cpu_add_2(pcp, val) \ argument 187 #define this_cpu_add_4(pcp, val) \ argument 189 #define this_cpu_add_8(pcp, val) \ argument 192 #define this_cpu_add_return_1(pcp, val) \ argument 194 #define this_cpu_add_return_2(pcp, val) \ argument [all …]
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/linux-6.6.21/include/linux/ |
D | iopoll.h | 36 #define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \ argument 84 #define read_poll_timeout_atomic(op, val, cond, delay_us, timeout_us, \ argument 134 #define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ argument 154 #define readx_poll_timeout_atomic(op, addr, val, cond, delay_us, timeout_us) \ argument 157 #define readb_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument 160 #define readb_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument 163 #define readw_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument 166 #define readw_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument 169 #define readl_poll_timeout(addr, val, cond, delay_us, timeout_us) \ argument 172 #define readl_poll_timeout_atomic(addr, val, cond, delay_us, timeout_us) \ argument [all …]
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/linux-6.6.21/drivers/gpu/drm/i915/soc/ |
D | intel_dram.c | 142 u32 val; in chv_detect_mem_freq() local 160 u32 val; in vlv_detect_mem_freq() local 201 static int skl_get_dimm_size(u16 val) in skl_get_dimm_size() 206 static int skl_get_dimm_width(u16 val) in skl_get_dimm_width() 223 static int skl_get_dimm_ranks(u16 val) in skl_get_dimm_ranks() 234 static int icl_get_dimm_size(u16 val) in icl_get_dimm_size() 239 static int icl_get_dimm_width(u16 val) in icl_get_dimm_width() 256 static int icl_get_dimm_ranks(u16 val) in icl_get_dimm_ranks() 276 int channel, char dimm_name, u16 val) in skl_dram_get_dimm_info() 297 int channel, u32 val) in skl_dram_get_channel_info() [all …]
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/linux-6.6.21/drivers/gpu/drm/msm/disp/mdp5/ |
D | mdp5.xml.h | 191 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP() 197 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR() 203 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR() 218 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP() 224 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t val) in MDP5_HW_VERSION_MINOR() 230 static inline uint32_t MDP5_HW_VERSION_MAJOR(uint32_t val) in MDP5_HW_VERSION_MAJOR() 238 static inline uint32_t MDP5_DISP_INTF_SEL_INTF0(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF0() 244 static inline uint32_t MDP5_DISP_INTF_SEL_INTF1(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF1() 250 static inline uint32_t MDP5_DISP_INTF_SEL_INTF2(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF2() 256 static inline uint32_t MDP5_DISP_INTF_SEL_INTF3(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF3() [all …]
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/linux-6.6.21/drivers/gpu/drm/msm/disp/mdp4/ |
D | mdp4.xml.h | 120 static inline uint32_t MDP4_VERSION_MINOR(uint32_t val) in MDP4_VERSION_MINOR() 126 static inline uint32_t MDP4_VERSION_MAJOR(uint32_t val) in MDP4_VERSION_MAJOR() 148 static inline uint32_t MDP4_DISP_INTF_SEL_PRIM(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_PRIM() 154 static inline uint32_t MDP4_DISP_INTF_SEL_SEC(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_SEC() 160 static inline uint32_t MDP4_DISP_INTF_SEL_EXT(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_EXT() 190 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE0(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE0() 197 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE1(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE1() 204 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE2(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE2() 211 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE3(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE3() 218 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE4(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE4() [all …]
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/linux-6.6.21/drivers/net/ethernet/chelsio/cxgb4/ |
D | cxgb4_tc_u32_parse.h | 41 int (*val)(struct ch_filter_specification *f, __be32 val, __be32 mask); member 46 __be32 val, __be32 mask) in cxgb4_fill_ipv4_tos() 55 __be32 val, __be32 mask) in cxgb4_fill_ipv4_frag() 77 __be32 val, __be32 mask) in cxgb4_fill_ipv4_proto() 86 __be32 val, __be32 mask) in cxgb4_fill_ipv4_src_ip() 95 __be32 val, __be32 mask) in cxgb4_fill_ipv4_dst_ip() 114 __be32 val, __be32 mask) in cxgb4_fill_ipv6_tos() 123 __be32 val, __be32 mask) in cxgb4_fill_ipv6_proto() 132 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip0() 141 __be32 val, __be32 mask) in cxgb4_fill_ipv6_src_ip1() [all …]
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/linux-6.6.21/arch/arm64/boot/dts/ti/ |
D | k3-pinctrl.h | 41 #define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 42 #define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 44 #define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 45 #define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 47 #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 48 #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 50 #define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 51 #define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 53 #define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument 54 #define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) argument [all …]
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/linux-6.6.21/drivers/gpu/drm/i915/ |
D | vlv_sideband.c | 79 u32 addr, u32 *val) in vlv_sideband_rw() 129 u32 val = 0; in vlv_punit_read() local 137 int vlv_punit_write(struct drm_i915_private *i915, u32 addr, u32 val) in vlv_punit_write() 145 u32 val = 0; in vlv_bunit_read() local 153 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_bunit_write() 161 u32 val = 0; in vlv_nc_read() local 171 u32 val = 0; in vlv_iosf_sb_read() local 180 u8 port, u32 reg, u32 val) in vlv_iosf_sb_write() 188 u32 val = 0; in vlv_cck_read() local 196 void vlv_cck_write(struct drm_i915_private *i915, u32 reg, u32 val) in vlv_cck_write() [all …]
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