Lines Matching refs:idx
25 uint32_t idx; member
47 GUEST_ASSERT(msr->idx); in guest_msr()
50 vector = wrmsr_safe(msr->idx, msr->write_val); in guest_msr()
52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx))) in guest_msr()
53 vector = rdmsr_safe(msr->idx, &msr_val); in guest_msr()
58 msr->idx, msr->write ? "WR" : "RD", vector); in guest_msr()
62 msr->idx, msr->write ? "WR" : "RD", vector); in guest_msr()
64 if (vector || is_write_only_msr(msr->idx)) in guest_msr()
70 msr->idx, msr->write_val, msr_val); in guest_msr()
73 if (msr->idx == HV_X64_MSR_TSC_INVARIANT_CONTROL) { in guest_msr()
171 msr->idx = HV_X64_MSR_GUEST_OS_ID; in guest_test_msrs_access()
176 msr->idx = HV_X64_MSR_HYPERCALL; in guest_test_msrs_access()
186 msr->idx = HV_X64_MSR_GUEST_OS_ID; in guest_test_msrs_access()
192 msr->idx = HV_X64_MSR_GUEST_OS_ID; in guest_test_msrs_access()
197 msr->idx = HV_X64_MSR_HYPERCALL; in guest_test_msrs_access()
203 msr->idx = HV_X64_MSR_VP_RUNTIME; in guest_test_msrs_access()
209 msr->idx = HV_X64_MSR_VP_RUNTIME; in guest_test_msrs_access()
215 msr->idx = HV_X64_MSR_VP_RUNTIME; in guest_test_msrs_access()
222 msr->idx = HV_X64_MSR_TIME_REF_COUNT; in guest_test_msrs_access()
228 msr->idx = HV_X64_MSR_TIME_REF_COUNT; in guest_test_msrs_access()
234 msr->idx = HV_X64_MSR_TIME_REF_COUNT; in guest_test_msrs_access()
241 msr->idx = HV_X64_MSR_VP_INDEX; in guest_test_msrs_access()
247 msr->idx = HV_X64_MSR_VP_INDEX; in guest_test_msrs_access()
253 msr->idx = HV_X64_MSR_VP_INDEX; in guest_test_msrs_access()
260 msr->idx = HV_X64_MSR_RESET; in guest_test_msrs_access()
266 msr->idx = HV_X64_MSR_RESET; in guest_test_msrs_access()
271 msr->idx = HV_X64_MSR_RESET; in guest_test_msrs_access()
284 msr->idx = HV_X64_MSR_REFERENCE_TSC; in guest_test_msrs_access()
290 msr->idx = HV_X64_MSR_REFERENCE_TSC; in guest_test_msrs_access()
295 msr->idx = HV_X64_MSR_REFERENCE_TSC; in guest_test_msrs_access()
302 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
311 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
317 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
322 msr->idx = HV_X64_MSR_EOM; in guest_test_msrs_access()
329 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
335 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
340 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
347 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
354 msr->idx = HV_X64_MSR_STIMER0_CONFIG; in guest_test_msrs_access()
361 msr->idx = HV_X64_MSR_EOI; in guest_test_msrs_access()
367 msr->idx = HV_X64_MSR_EOI; in guest_test_msrs_access()
374 msr->idx = HV_X64_MSR_TSC_FREQUENCY; in guest_test_msrs_access()
380 msr->idx = HV_X64_MSR_TSC_FREQUENCY; in guest_test_msrs_access()
386 msr->idx = HV_X64_MSR_TSC_FREQUENCY; in guest_test_msrs_access()
393 msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL; in guest_test_msrs_access()
399 msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL; in guest_test_msrs_access()
404 msr->idx = HV_X64_MSR_REENLIGHTENMENT_CONTROL; in guest_test_msrs_access()
411 msr->idx = HV_X64_MSR_TSC_EMULATION_STATUS; in guest_test_msrs_access()
418 msr->idx = HV_X64_MSR_CRASH_P0; in guest_test_msrs_access()
424 msr->idx = HV_X64_MSR_CRASH_P0; in guest_test_msrs_access()
429 msr->idx = HV_X64_MSR_CRASH_P0; in guest_test_msrs_access()
436 msr->idx = HV_X64_MSR_SYNDBG_STATUS; in guest_test_msrs_access()
443 msr->idx = HV_X64_MSR_SYNDBG_STATUS; in guest_test_msrs_access()
448 msr->idx = HV_X64_MSR_SYNDBG_STATUS; in guest_test_msrs_access()
458 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
467 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
475 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
484 msr->idx = HV_X64_MSR_TSC_INVARIANT_CONTROL; in guest_test_msrs_access()
500 msr->idx, msr->write ? "write" : "read"); in guest_test_msrs_access()