1148 	void __iomem *mem_base;  member
3653 	writew(gpio_data, spec->mem_base + 0x320);  in ca0113_mmio_gpio_set()
3670 	writel(0x0000007e, spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3671 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3672 	writel(0x0000005a, spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3673 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3674 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3676 	writel(0x00800005, spec->mem_base + 0x20c);  in ca0113_mmio_command_set()
3677 	writel(group, spec->mem_base + 0x804);  in ca0113_mmio_command_set()
3679 	writel(0x00800005, spec->mem_base + 0x20c);  in ca0113_mmio_command_set()
3684 	writel(write_val, spec->mem_base + 0x204);  in ca0113_mmio_command_set()
3690 	readl(spec->mem_base + 0x860);  in ca0113_mmio_command_set()
3691 	readl(spec->mem_base + 0x854);  in ca0113_mmio_command_set()
3692 	readl(spec->mem_base + 0x840);  in ca0113_mmio_command_set()
3694 	writel(0x00800004, spec->mem_base + 0x20c);  in ca0113_mmio_command_set()
3695 	writel(0x00000000, spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3696 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3697 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3709 	writel(0x0000007e, spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3710 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3711 	writel(0x0000005a, spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3712 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3713 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3715 	writel(0x00800003, spec->mem_base + 0x20c);  in ca0113_mmio_command_set_type2()
3716 	writel(group, spec->mem_base + 0x804);  in ca0113_mmio_command_set_type2()
3718 	writel(0x00800005, spec->mem_base + 0x20c);  in ca0113_mmio_command_set_type2()
3723 	writel(write_val, spec->mem_base + 0x204);  in ca0113_mmio_command_set_type2()
3725 	readl(spec->mem_base + 0x860);  in ca0113_mmio_command_set_type2()
3726 	readl(spec->mem_base + 0x854);  in ca0113_mmio_command_set_type2()
3727 	readl(spec->mem_base + 0x840);  in ca0113_mmio_command_set_type2()
3729 	writel(0x00800004, spec->mem_base + 0x20c);  in ca0113_mmio_command_set_type2()
3730 	writel(0x00000000, spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3731 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3732 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
7931 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7932 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7933 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7934 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7935 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7936 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7937 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7938 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7939 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7940 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7941 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7942 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
8875 		writeb(0x0, spec->mem_base + 0x100);  in sbz_region2_exit()
8877 		writeb(0xb3, spec->mem_base + 0x304);  in sbz_region2_exit()
9159 	writel(0x00820680, spec->mem_base + 0x01C);  in sbz_pre_dsp_setup()
9160 	writel(0x00820680, spec->mem_base + 0x01C);  in sbz_pre_dsp_setup()
9276 		writel(0x00000000, spec->mem_base + addr[i]);  in ca0132_mmio_init_sbz()
9299 		writel(tmp[i], spec->mem_base + addr[cur_addr + i]);  in ca0132_mmio_init_sbz()
9315 		writel(data[i], spec->mem_base + addr[cur_addr + i]);  in ca0132_mmio_init_sbz()
9329 		writel(0x00000680, spec->mem_base + 0x1c);  in ca0132_mmio_init_ae5()
9330 		writel(0x00880680, spec->mem_base + 0x1c);  in ca0132_mmio_init_ae5()
9339 			writel(0x00800001, spec->mem_base + addr[i]);  in ca0132_mmio_init_ae5()
9343 		writel(data[i], spec->mem_base + addr[i]);  in ca0132_mmio_init_ae5()
9347 		writel(0x00880680, spec->mem_base + 0x1c);  in ca0132_mmio_init_ae5()
9409 		writeb(tmp[i], spec->mem_base + addr[cur_addr]);  in ae5_register_set()
9416 		writeb(data[i], spec->mem_base + addr[cur_addr]);  in ae5_register_set()
9419 		writel(data[i], spec->mem_base + addr[cur_addr]);  in ae5_register_set()
9421 	writel(0x00800001, spec->mem_base + 0x20c);  in ae5_register_set()
9669 	if (spec->mem_base)  in ca0132_free()
9670 		pci_iounmap(codec->bus->pci, spec->mem_base);  in ca0132_free()
10073 		spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20);  in patch_ca0132()
10074 		if (spec->mem_base == NULL) {  in patch_ca0132()