Lines Matching refs:gc
39 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_reg() local
43 irq_gc_lock(gc); in irq_gc_mask_disable_reg()
44 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
46 irq_gc_unlock(gc); in irq_gc_mask_disable_reg()
59 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_set_bit() local
63 irq_gc_lock(gc); in irq_gc_mask_set_bit()
65 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
66 irq_gc_unlock(gc); in irq_gc_mask_set_bit()
79 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_clr_bit() local
83 irq_gc_lock(gc); in irq_gc_mask_clr_bit()
85 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_clr_bit()
86 irq_gc_unlock(gc); in irq_gc_mask_clr_bit()
99 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_unmask_enable_reg() local
103 irq_gc_lock(gc); in irq_gc_unmask_enable_reg()
104 irq_reg_writel(gc, mask, ct->regs.enable); in irq_gc_unmask_enable_reg()
106 irq_gc_unlock(gc); in irq_gc_unmask_enable_reg()
116 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_ack_set_bit() local
120 irq_gc_lock(gc); in irq_gc_ack_set_bit()
121 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_set_bit()
122 irq_gc_unlock(gc); in irq_gc_ack_set_bit()
132 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_ack_clr_bit() local
136 irq_gc_lock(gc); in irq_gc_ack_clr_bit()
137 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_clr_bit()
138 irq_gc_unlock(gc); in irq_gc_ack_clr_bit()
155 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_and_ack_set() local
159 irq_gc_lock(gc); in irq_gc_mask_disable_and_ack_set()
160 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_and_ack_set()
162 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_mask_disable_and_ack_set()
163 irq_gc_unlock(gc); in irq_gc_mask_disable_and_ack_set()
172 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_eoi() local
176 irq_gc_lock(gc); in irq_gc_eoi()
177 irq_reg_writel(gc, mask, ct->regs.eoi); in irq_gc_eoi()
178 irq_gc_unlock(gc); in irq_gc_eoi()
192 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_set_wake() local
195 if (!(mask & gc->wake_enabled)) in irq_gc_set_wake()
198 irq_gc_lock(gc); in irq_gc_set_wake()
200 gc->wake_active |= mask; in irq_gc_set_wake()
202 gc->wake_active &= ~mask; in irq_gc_set_wake()
203 irq_gc_unlock(gc); in irq_gc_set_wake()
218 void irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, in irq_init_generic_chip() argument
222 raw_spin_lock_init(&gc->lock); in irq_init_generic_chip()
223 gc->num_ct = num_ct; in irq_init_generic_chip()
224 gc->irq_base = irq_base; in irq_init_generic_chip()
225 gc->reg_base = reg_base; in irq_init_generic_chip()
226 gc->chip_types->chip.name = name; in irq_init_generic_chip()
227 gc->chip_types->handler = handler; in irq_init_generic_chip()
245 struct irq_chip_generic *gc; in irq_alloc_generic_chip() local
247 gc = kzalloc(struct_size(gc, chip_types, num_ct), GFP_KERNEL); in irq_alloc_generic_chip()
248 if (gc) { in irq_alloc_generic_chip()
249 irq_init_generic_chip(gc, name, num_ct, irq_base, reg_base, in irq_alloc_generic_chip()
252 return gc; in irq_alloc_generic_chip()
257 irq_gc_init_mask_cache(struct irq_chip_generic *gc, enum irq_gc_flags flags) in irq_gc_init_mask_cache() argument
259 struct irq_chip_type *ct = gc->chip_types; in irq_gc_init_mask_cache()
260 u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask; in irq_gc_init_mask_cache()
263 for (i = 0; i < gc->num_ct; i++) { in irq_gc_init_mask_cache()
270 *mskptr = irq_reg_readl(gc, mskreg); in irq_gc_init_mask_cache()
292 struct irq_chip_generic *gc; in __irq_alloc_domain_generic_chips() local
300 if (d->gc) in __irq_alloc_domain_generic_chips()
308 gc_sz = struct_size(gc, chip_types, num_ct); in __irq_alloc_domain_generic_chips()
309 dgc_sz = struct_size(dgc, gc, numchips); in __irq_alloc_domain_generic_chips()
320 d->gc = dgc; in __irq_alloc_domain_generic_chips()
326 dgc->gc[i] = gc = tmp; in __irq_alloc_domain_generic_chips()
327 irq_init_generic_chip(gc, name, num_ct, i * irqs_per_chip, in __irq_alloc_domain_generic_chips()
330 gc->domain = d; in __irq_alloc_domain_generic_chips()
332 gc->reg_readl = &irq_readl_be; in __irq_alloc_domain_generic_chips()
333 gc->reg_writel = &irq_writel_be; in __irq_alloc_domain_generic_chips()
337 list_add_tail(&gc->list, &gc_list); in __irq_alloc_domain_generic_chips()
349 struct irq_domain_chip_generic *dgc = d->gc; in __irq_get_domain_generic_chip()
357 return dgc->gc[idx]; in __irq_get_domain_generic_chip()
368 struct irq_chip_generic *gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_get_domain_generic_chip() local
370 return !IS_ERR(gc) ? gc : NULL; in irq_get_domain_generic_chip()
388 struct irq_domain_chip_generic *dgc = d->gc; in irq_map_generic_chip()
389 struct irq_chip_generic *gc; in irq_map_generic_chip() local
395 gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_map_generic_chip()
396 if (IS_ERR(gc)) in irq_map_generic_chip()
397 return PTR_ERR(gc); in irq_map_generic_chip()
401 if (test_bit(idx, &gc->unused)) in irq_map_generic_chip()
404 if (test_bit(idx, &gc->installed)) in irq_map_generic_chip()
407 ct = gc->chip_types; in irq_map_generic_chip()
411 if (!gc->installed) { in irq_map_generic_chip()
412 raw_spin_lock_irqsave(&gc->lock, flags); in irq_map_generic_chip()
413 irq_gc_init_mask_cache(gc, dgc->gc_flags); in irq_map_generic_chip()
414 raw_spin_unlock_irqrestore(&gc->lock, flags); in irq_map_generic_chip()
418 set_bit(idx, &gc->installed); in irq_map_generic_chip()
429 irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL); in irq_map_generic_chip()
437 struct irq_domain_chip_generic *dgc = d->gc; in irq_unmap_generic_chip()
439 struct irq_chip_generic *gc; in irq_unmap_generic_chip() local
442 gc = irq_get_domain_generic_chip(d, hw_irq); in irq_unmap_generic_chip()
443 if (!gc) in irq_unmap_generic_chip()
448 clear_bit(irq_idx, &gc->installed); in irq_unmap_generic_chip()
473 void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk, in irq_setup_generic_chip() argument
477 struct irq_chip_type *ct = gc->chip_types; in irq_setup_generic_chip()
482 list_add_tail(&gc->list, &gc_list); in irq_setup_generic_chip()
485 irq_gc_init_mask_cache(gc, flags); in irq_setup_generic_chip()
487 for (i = gc->irq_base; msk; msk >>= 1, i++) { in irq_setup_generic_chip()
501 d->mask = 1 << (i - gc->irq_base); in irq_setup_generic_chip()
504 irq_set_chip_data(i, gc); in irq_setup_generic_chip()
507 gc->irq_cnt = i - gc->irq_base; in irq_setup_generic_chip()
520 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_setup_alt_chip() local
521 struct irq_chip_type *ct = gc->chip_types; in irq_setup_alt_chip()
524 for (i = 0; i < gc->num_ct; i++, ct++) { in irq_setup_alt_chip()
544 void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk, in irq_remove_generic_chip() argument
550 list_del(&gc->list); in irq_remove_generic_chip()
562 if (gc->domain) { in irq_remove_generic_chip()
563 virq = irq_find_mapping(gc->domain, gc->irq_base + i); in irq_remove_generic_chip()
567 virq = gc->irq_base + i; in irq_remove_generic_chip()
579 static struct irq_data *irq_gc_get_irq_data(struct irq_chip_generic *gc) in irq_gc_get_irq_data() argument
583 if (!gc->domain) in irq_gc_get_irq_data()
584 return irq_get_irq_data(gc->irq_base); in irq_gc_get_irq_data()
590 if (!gc->installed) in irq_gc_get_irq_data()
593 virq = irq_find_mapping(gc->domain, gc->irq_base + __ffs(gc->installed)); in irq_gc_get_irq_data()
600 struct irq_chip_generic *gc; in irq_gc_suspend() local
602 list_for_each_entry(gc, &gc_list, list) { in irq_gc_suspend()
603 struct irq_chip_type *ct = gc->chip_types; in irq_gc_suspend()
606 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_suspend()
612 if (gc->suspend) in irq_gc_suspend()
613 gc->suspend(gc); in irq_gc_suspend()
620 struct irq_chip_generic *gc; in irq_gc_resume() local
622 list_for_each_entry(gc, &gc_list, list) { in irq_gc_resume()
623 struct irq_chip_type *ct = gc->chip_types; in irq_gc_resume()
625 if (gc->resume) in irq_gc_resume()
626 gc->resume(gc); in irq_gc_resume()
629 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_resume()
643 struct irq_chip_generic *gc; in irq_gc_shutdown() local
645 list_for_each_entry(gc, &gc_list, list) { in irq_gc_shutdown()
646 struct irq_chip_type *ct = gc->chip_types; in irq_gc_shutdown()
649 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_shutdown()