Lines Matching refs:ss

81 static void spi_sh_write(struct spi_sh_data *ss, unsigned long data,  in spi_sh_write()  argument
84 if (ss->width == 8) in spi_sh_write()
85 iowrite8(data, ss->addr + (offset >> 2)); in spi_sh_write()
86 else if (ss->width == 32) in spi_sh_write()
87 iowrite32(data, ss->addr + offset); in spi_sh_write()
90 static unsigned long spi_sh_read(struct spi_sh_data *ss, unsigned long offset) in spi_sh_read() argument
92 if (ss->width == 8) in spi_sh_read()
93 return ioread8(ss->addr + (offset >> 2)); in spi_sh_read()
94 else if (ss->width == 32) in spi_sh_read()
95 return ioread32(ss->addr + offset); in spi_sh_read()
100 static void spi_sh_set_bit(struct spi_sh_data *ss, unsigned long val, in spi_sh_set_bit() argument
105 tmp = spi_sh_read(ss, offset); in spi_sh_set_bit()
107 spi_sh_write(ss, tmp, offset); in spi_sh_set_bit()
110 static void spi_sh_clear_bit(struct spi_sh_data *ss, unsigned long val, in spi_sh_clear_bit() argument
115 tmp = spi_sh_read(ss, offset); in spi_sh_clear_bit()
117 spi_sh_write(ss, tmp, offset); in spi_sh_clear_bit()
120 static void clear_fifo(struct spi_sh_data *ss) in clear_fifo() argument
122 spi_sh_set_bit(ss, SPI_SH_RSTF, SPI_SH_CR2); in clear_fifo()
123 spi_sh_clear_bit(ss, SPI_SH_RSTF, SPI_SH_CR2); in clear_fifo()
126 static int spi_sh_wait_receive_buffer(struct spi_sh_data *ss) in spi_sh_wait_receive_buffer() argument
130 while (spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_RBE) { in spi_sh_wait_receive_buffer()
138 static int spi_sh_wait_write_buffer_empty(struct spi_sh_data *ss) in spi_sh_wait_write_buffer_empty() argument
142 while (!(spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_TBE)) { in spi_sh_wait_write_buffer_empty()
150 static int spi_sh_send(struct spi_sh_data *ss, struct spi_message *mesg, in spi_sh_send() argument
160 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_send()
166 !(spi_sh_read(ss, SPI_SH_CR4) & in spi_sh_send()
168 !(spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_TBF); in spi_sh_send()
170 spi_sh_write(ss, (unsigned long)data[i], SPI_SH_TBR); in spi_sh_send()
172 if (spi_sh_read(ss, SPI_SH_CR4) & SPI_SH_WPABRT) { in spi_sh_send()
174 spi_sh_set_bit(ss, SPI_SH_WPABRT, SPI_SH_CR4); in spi_sh_send()
185 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
186 spi_sh_set_bit(ss, SPI_SH_TBE, SPI_SH_CR4); in spi_sh_send()
187 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_send()
188 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
190 if (ret == 0 && !(ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
198 spi_sh_clear_bit(ss, SPI_SH_SSD | SPI_SH_SSDB, SPI_SH_CR1); in spi_sh_send()
199 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_send()
201 ss->cr1 &= ~SPI_SH_TBE; in spi_sh_send()
202 spi_sh_set_bit(ss, SPI_SH_TBE, SPI_SH_CR4); in spi_sh_send()
203 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_send()
204 ss->cr1 & SPI_SH_TBE, in spi_sh_send()
206 if (ret == 0 && (ss->cr1 & SPI_SH_TBE)) { in spi_sh_send()
215 static int spi_sh_receive(struct spi_sh_data *ss, struct spi_message *mesg, in spi_sh_receive() argument
225 spi_sh_write(ss, SPI_SH_MAX_BYTE, SPI_SH_CR3); in spi_sh_receive()
227 spi_sh_write(ss, t->len, SPI_SH_CR3); in spi_sh_receive()
229 spi_sh_clear_bit(ss, SPI_SH_SSD | SPI_SH_SSDB, SPI_SH_CR1); in spi_sh_receive()
230 spi_sh_set_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_receive()
232 spi_sh_wait_write_buffer_empty(ss); in spi_sh_receive()
237 ss->cr1 &= ~SPI_SH_RBF; in spi_sh_receive()
238 spi_sh_set_bit(ss, SPI_SH_RBF, SPI_SH_CR4); in spi_sh_receive()
239 ret = wait_event_interruptible_timeout(ss->wait, in spi_sh_receive()
240 ss->cr1 & SPI_SH_RBF, in spi_sh_receive()
243 spi_sh_read(ss, SPI_SH_CR1) & SPI_SH_RBE) { in spi_sh_receive()
251 if (spi_sh_wait_receive_buffer(ss)) in spi_sh_receive()
253 data[i] = (unsigned char)spi_sh_read(ss, SPI_SH_RBR); in spi_sh_receive()
262 clear_fifo(ss); in spi_sh_receive()
263 spi_sh_write(ss, 1, SPI_SH_CR3); in spi_sh_receive()
265 spi_sh_write(ss, 0, SPI_SH_CR3); in spi_sh_receive()
274 struct spi_sh_data *ss = spi_controller_get_devdata(ctlr); in spi_sh_transfer_one_message() local
280 spi_sh_clear_bit(ss, SPI_SH_SSA, SPI_SH_CR1); in spi_sh_transfer_one_message()
289 ret = spi_sh_send(ss, mesg, t); in spi_sh_transfer_one_message()
294 ret = spi_sh_receive(ss, mesg, t); in spi_sh_transfer_one_message()
304 clear_fifo(ss); in spi_sh_transfer_one_message()
305 spi_sh_set_bit(ss, SPI_SH_SSD, SPI_SH_CR1); in spi_sh_transfer_one_message()
308 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_transfer_one_message()
311 clear_fifo(ss); in spi_sh_transfer_one_message()
321 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_transfer_one_message()
323 clear_fifo(ss); in spi_sh_transfer_one_message()
330 struct spi_sh_data *ss = spi_controller_get_devdata(spi->controller); in spi_sh_setup() local
334 spi_sh_write(ss, 0xfe, SPI_SH_CR1); /* SPI sycle stop */ in spi_sh_setup()
335 spi_sh_write(ss, 0x00, SPI_SH_CR1); /* CR1 init */ in spi_sh_setup()
336 spi_sh_write(ss, 0x00, SPI_SH_CR3); /* CR3 init */ in spi_sh_setup()
338 clear_fifo(ss); in spi_sh_setup()
341 spi_sh_write(ss, spi_sh_read(ss, SPI_SH_CR2) | 0x07, SPI_SH_CR2); in spi_sh_setup()
349 struct spi_sh_data *ss = spi_controller_get_devdata(spi->controller); in spi_sh_cleanup() local
353 spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD, in spi_sh_cleanup()
359 struct spi_sh_data *ss = (struct spi_sh_data *)_ss; in spi_sh_irq() local
362 cr1 = spi_sh_read(ss, SPI_SH_CR1); in spi_sh_irq()
364 ss->cr1 |= SPI_SH_TBE; in spi_sh_irq()
366 ss->cr1 |= SPI_SH_TBF; in spi_sh_irq()
368 ss->cr1 |= SPI_SH_RBE; in spi_sh_irq()
370 ss->cr1 |= SPI_SH_RBF; in spi_sh_irq()
372 if (ss->cr1) { in spi_sh_irq()
373 spi_sh_clear_bit(ss, ss->cr1, SPI_SH_CR4); in spi_sh_irq()
374 wake_up(&ss->wait); in spi_sh_irq()
382 struct spi_sh_data *ss = platform_get_drvdata(pdev); in spi_sh_remove() local
384 spi_unregister_controller(ss->host); in spi_sh_remove()
385 free_irq(ss->irq, ss); in spi_sh_remove()
392 struct spi_sh_data *ss; in spi_sh_probe() local
412 ss = spi_controller_get_devdata(host); in spi_sh_probe()
413 platform_set_drvdata(pdev, ss); in spi_sh_probe()
417 ss->width = 8; in spi_sh_probe()
420 ss->width = 32; in spi_sh_probe()
426 ss->irq = irq; in spi_sh_probe()
427 ss->host = host; in spi_sh_probe()
428 ss->addr = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in spi_sh_probe()
429 if (ss->addr == NULL) { in spi_sh_probe()
433 init_waitqueue_head(&ss->wait); in spi_sh_probe()
435 ret = request_irq(irq, spi_sh_irq, 0, "spi_sh", ss); in spi_sh_probe()
456 free_irq(irq, ss); in spi_sh_probe()