Lines Matching refs:spi
156 int (*cfg_irq)(struct platform_device *pdev, struct lantiq_ssc_spi *spi);
189 static u32 lantiq_ssc_readl(const struct lantiq_ssc_spi *spi, u32 reg) in lantiq_ssc_readl() argument
191 return __raw_readl(spi->regbase + reg); in lantiq_ssc_readl()
194 static void lantiq_ssc_writel(const struct lantiq_ssc_spi *spi, u32 val, in lantiq_ssc_writel() argument
197 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_writel()
200 static void lantiq_ssc_maskl(const struct lantiq_ssc_spi *spi, u32 clr, in lantiq_ssc_maskl() argument
203 u32 val = __raw_readl(spi->regbase + reg); in lantiq_ssc_maskl()
207 __raw_writel(val, spi->regbase + reg); in lantiq_ssc_maskl()
210 static unsigned int tx_fifo_level(const struct lantiq_ssc_spi *spi) in tx_fifo_level() argument
212 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in tx_fifo_level()
213 u32 fstat = lantiq_ssc_readl(spi, LTQ_SPI_FSTAT); in tx_fifo_level()
218 static unsigned int rx_fifo_level(const struct lantiq_ssc_spi *spi) in rx_fifo_level() argument
220 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in rx_fifo_level()
221 u32 fstat = lantiq_ssc_readl(spi, LTQ_SPI_FSTAT); in rx_fifo_level()
226 static unsigned int tx_fifo_free(const struct lantiq_ssc_spi *spi) in tx_fifo_free() argument
228 return spi->tx_fifo_size - tx_fifo_level(spi); in tx_fifo_free()
231 static void rx_fifo_reset(const struct lantiq_ssc_spi *spi) in rx_fifo_reset() argument
233 u32 val = spi->rx_fifo_size << LTQ_SPI_RXFCON_RXFITL_S; in rx_fifo_reset()
236 lantiq_ssc_writel(spi, val, LTQ_SPI_RXFCON); in rx_fifo_reset()
239 static void tx_fifo_reset(const struct lantiq_ssc_spi *spi) in tx_fifo_reset() argument
244 lantiq_ssc_writel(spi, val, LTQ_SPI_TXFCON); in tx_fifo_reset()
247 static void rx_fifo_flush(const struct lantiq_ssc_spi *spi) in rx_fifo_flush() argument
249 lantiq_ssc_maskl(spi, 0, LTQ_SPI_RXFCON_RXFLU, LTQ_SPI_RXFCON); in rx_fifo_flush()
252 static void tx_fifo_flush(const struct lantiq_ssc_spi *spi) in tx_fifo_flush() argument
254 lantiq_ssc_maskl(spi, 0, LTQ_SPI_TXFCON_TXFLU, LTQ_SPI_TXFCON); in tx_fifo_flush()
257 static void hw_enter_config_mode(const struct lantiq_ssc_spi *spi) in hw_enter_config_mode() argument
259 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_CLREN, LTQ_SPI_WHBSTATE); in hw_enter_config_mode()
262 static void hw_enter_active_mode(const struct lantiq_ssc_spi *spi) in hw_enter_active_mode() argument
264 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETEN, LTQ_SPI_WHBSTATE); in hw_enter_active_mode()
267 static void hw_setup_speed_hz(const struct lantiq_ssc_spi *spi, in hw_setup_speed_hz() argument
280 spi_clk = clk_get_rate(spi->fpi_clk) / 2; in hw_setup_speed_hz()
290 dev_dbg(spi->dev, "spi_clk %u, max_speed_hz %u, brt %u\n", in hw_setup_speed_hz()
293 lantiq_ssc_writel(spi, brt, LTQ_SPI_BRT); in hw_setup_speed_hz()
296 static void hw_setup_bits_per_word(const struct lantiq_ssc_spi *spi, in hw_setup_bits_per_word() argument
304 lantiq_ssc_maskl(spi, LTQ_SPI_CON_BM_M, bm, LTQ_SPI_CON); in hw_setup_bits_per_word()
307 static void hw_setup_clock_mode(const struct lantiq_ssc_spi *spi, in hw_setup_clock_mode() argument
342 lantiq_ssc_maskl(spi, con_clr, con_set, LTQ_SPI_CON); in hw_setup_clock_mode()
345 static void lantiq_ssc_hw_init(const struct lantiq_ssc_spi *spi) in lantiq_ssc_hw_init() argument
347 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in lantiq_ssc_hw_init()
353 lantiq_ssc_writel(spi, 1 << LTQ_SPI_CLC_RMC_S, LTQ_SPI_CLC); in lantiq_ssc_hw_init()
356 hw_enter_config_mode(spi); in lantiq_ssc_hw_init()
359 lantiq_ssc_maskl(spi, 0, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); in lantiq_ssc_hw_init()
362 lantiq_ssc_writel(spi, LTQ_SPI_CON_RUEN | LTQ_SPI_CON_AEN | in lantiq_ssc_hw_init()
367 hw_setup_bits_per_word(spi, spi->bits_per_word); in lantiq_ssc_hw_init()
368 hw_setup_clock_mode(spi, SPI_MODE_0); in lantiq_ssc_hw_init()
371 lantiq_ssc_writel(spi, LTQ_SPI_WHBSTATE_SETMS | in lantiq_ssc_hw_init()
376 lantiq_ssc_writel(spi, 0, LTQ_SPI_GPOCON); in lantiq_ssc_hw_init()
377 lantiq_ssc_writel(spi, 0xFF00, LTQ_SPI_FPGO); in lantiq_ssc_hw_init()
380 rx_fifo_reset(spi); in lantiq_ssc_hw_init()
381 tx_fifo_reset(spi); in lantiq_ssc_hw_init()
384 lantiq_ssc_writel(spi, hwcfg->irnen_t | hwcfg->irnen_r | in lantiq_ssc_hw_init()
391 struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); in lantiq_ssc_setup() local
399 dev_dbg(spi->dev, "using internal chipselect %u\n", cs); in lantiq_ssc_setup()
401 if (cs < spi->base_cs) { in lantiq_ssc_setup()
402 dev_err(spi->dev, in lantiq_ssc_setup()
403 "chipselect %i too small (min %i)\n", cs, spi->base_cs); in lantiq_ssc_setup()
408 gpocon = 1 << ((cs - spi->base_cs) + LTQ_SPI_GPOCON_ISCSBN_S); in lantiq_ssc_setup()
412 gpocon |= 1 << (cs - spi->base_cs); in lantiq_ssc_setup()
414 lantiq_ssc_maskl(spi, 0, gpocon, LTQ_SPI_GPOCON); in lantiq_ssc_setup()
422 struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); in lantiq_ssc_prepare_message() local
424 hw_enter_config_mode(spi); in lantiq_ssc_prepare_message()
425 hw_setup_clock_mode(spi, message->spi->mode); in lantiq_ssc_prepare_message()
426 hw_enter_active_mode(spi); in lantiq_ssc_prepare_message()
431 static void hw_setup_transfer(struct lantiq_ssc_spi *spi, in hw_setup_transfer() argument
438 if (bits_per_word != spi->bits_per_word || in hw_setup_transfer()
439 speed_hz != spi->speed_hz) { in hw_setup_transfer()
440 hw_enter_config_mode(spi); in hw_setup_transfer()
441 hw_setup_speed_hz(spi, speed_hz); in hw_setup_transfer()
442 hw_setup_bits_per_word(spi, bits_per_word); in hw_setup_transfer()
443 hw_enter_active_mode(spi); in hw_setup_transfer()
445 spi->speed_hz = speed_hz; in hw_setup_transfer()
446 spi->bits_per_word = bits_per_word; in hw_setup_transfer()
450 con = lantiq_ssc_readl(spi, LTQ_SPI_CON); in hw_setup_transfer()
461 lantiq_ssc_writel(spi, con, LTQ_SPI_CON); in hw_setup_transfer()
467 struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); in lantiq_ssc_unprepare_message() local
469 flush_workqueue(spi->wq); in lantiq_ssc_unprepare_message()
472 lantiq_ssc_maskl(spi, 0, LTQ_SPI_CON_TXOFF | LTQ_SPI_CON_RXOFF, in lantiq_ssc_unprepare_message()
478 static void tx_fifo_write(struct lantiq_ssc_spi *spi) in tx_fifo_write() argument
484 unsigned int tx_free = tx_fifo_free(spi); in tx_fifo_write()
486 spi->fdx_tx_level = 0; in tx_fifo_write()
487 while (spi->tx_todo && tx_free) { in tx_fifo_write()
488 switch (spi->bits_per_word) { in tx_fifo_write()
490 tx8 = spi->tx; in tx_fifo_write()
492 spi->tx_todo--; in tx_fifo_write()
493 spi->tx++; in tx_fifo_write()
496 tx16 = (u16 *) spi->tx; in tx_fifo_write()
498 spi->tx_todo -= 2; in tx_fifo_write()
499 spi->tx += 2; in tx_fifo_write()
502 tx32 = (u32 *) spi->tx; in tx_fifo_write()
504 spi->tx_todo -= 4; in tx_fifo_write()
505 spi->tx += 4; in tx_fifo_write()
513 lantiq_ssc_writel(spi, data, LTQ_SPI_TB); in tx_fifo_write()
515 spi->fdx_tx_level++; in tx_fifo_write()
519 static void rx_fifo_read_full_duplex(struct lantiq_ssc_spi *spi) in rx_fifo_read_full_duplex() argument
525 unsigned int rx_fill = rx_fifo_level(spi); in rx_fifo_read_full_duplex()
531 while (rx_fill != spi->fdx_tx_level) in rx_fifo_read_full_duplex()
532 rx_fill = rx_fifo_level(spi); in rx_fifo_read_full_duplex()
535 data = lantiq_ssc_readl(spi, LTQ_SPI_RB); in rx_fifo_read_full_duplex()
537 switch (spi->bits_per_word) { in rx_fifo_read_full_duplex()
539 rx8 = spi->rx; in rx_fifo_read_full_duplex()
541 spi->rx_todo--; in rx_fifo_read_full_duplex()
542 spi->rx++; in rx_fifo_read_full_duplex()
545 rx16 = (u16 *) spi->rx; in rx_fifo_read_full_duplex()
547 spi->rx_todo -= 2; in rx_fifo_read_full_duplex()
548 spi->rx += 2; in rx_fifo_read_full_duplex()
551 rx32 = (u32 *) spi->rx; in rx_fifo_read_full_duplex()
553 spi->rx_todo -= 4; in rx_fifo_read_full_duplex()
554 spi->rx += 4; in rx_fifo_read_full_duplex()
565 static void rx_fifo_read_half_duplex(struct lantiq_ssc_spi *spi) in rx_fifo_read_half_duplex() argument
570 unsigned int rx_fill = rx_fifo_level(spi); in rx_fifo_read_half_duplex()
580 if (spi->rx_todo < 4) { in rx_fifo_read_half_duplex()
581 rxbv = (lantiq_ssc_readl(spi, LTQ_SPI_STAT) & in rx_fifo_read_half_duplex()
583 data = lantiq_ssc_readl(spi, LTQ_SPI_RB); in rx_fifo_read_half_duplex()
586 rx8 = spi->rx; in rx_fifo_read_half_duplex()
592 spi->rx_todo--; in rx_fifo_read_half_duplex()
593 spi->rx++; in rx_fifo_read_half_duplex()
596 data = lantiq_ssc_readl(spi, LTQ_SPI_RB); in rx_fifo_read_half_duplex()
597 rx32 = (u32 *) spi->rx; in rx_fifo_read_half_duplex()
600 spi->rx_todo -= 4; in rx_fifo_read_half_duplex()
601 spi->rx += 4; in rx_fifo_read_half_duplex()
607 static void rx_request(struct lantiq_ssc_spi *spi) in rx_request() argument
616 rxreq = spi->rx_todo; in rx_request()
617 rxreq_max = spi->rx_fifo_size * 4; in rx_request()
621 lantiq_ssc_writel(spi, rxreq, LTQ_SPI_RXREQ); in rx_request()
626 struct lantiq_ssc_spi *spi = data; in lantiq_ssc_xmit_interrupt() local
627 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in lantiq_ssc_xmit_interrupt()
628 u32 val = lantiq_ssc_readl(spi, hwcfg->irncr); in lantiq_ssc_xmit_interrupt()
630 spin_lock(&spi->lock); in lantiq_ssc_xmit_interrupt()
632 lantiq_ssc_writel(spi, val, hwcfg->irncr); in lantiq_ssc_xmit_interrupt()
634 if (spi->tx) { in lantiq_ssc_xmit_interrupt()
635 if (spi->rx && spi->rx_todo) in lantiq_ssc_xmit_interrupt()
636 rx_fifo_read_full_duplex(spi); in lantiq_ssc_xmit_interrupt()
638 if (spi->tx_todo) in lantiq_ssc_xmit_interrupt()
639 tx_fifo_write(spi); in lantiq_ssc_xmit_interrupt()
640 else if (!tx_fifo_level(spi)) in lantiq_ssc_xmit_interrupt()
642 } else if (spi->rx) { in lantiq_ssc_xmit_interrupt()
643 if (spi->rx_todo) { in lantiq_ssc_xmit_interrupt()
644 rx_fifo_read_half_duplex(spi); in lantiq_ssc_xmit_interrupt()
646 if (spi->rx_todo) in lantiq_ssc_xmit_interrupt()
647 rx_request(spi); in lantiq_ssc_xmit_interrupt()
655 spin_unlock(&spi->lock); in lantiq_ssc_xmit_interrupt()
659 queue_work(spi->wq, &spi->work); in lantiq_ssc_xmit_interrupt()
660 spin_unlock(&spi->lock); in lantiq_ssc_xmit_interrupt()
667 struct lantiq_ssc_spi *spi = data; in lantiq_ssc_err_interrupt() local
668 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in lantiq_ssc_err_interrupt()
669 u32 stat = lantiq_ssc_readl(spi, LTQ_SPI_STAT); in lantiq_ssc_err_interrupt()
670 u32 val = lantiq_ssc_readl(spi, hwcfg->irncr); in lantiq_ssc_err_interrupt()
675 spin_lock(&spi->lock); in lantiq_ssc_err_interrupt()
677 lantiq_ssc_writel(spi, val, hwcfg->irncr); in lantiq_ssc_err_interrupt()
680 dev_err(spi->dev, "receive underflow error\n"); in lantiq_ssc_err_interrupt()
682 dev_err(spi->dev, "transmit underflow error\n"); in lantiq_ssc_err_interrupt()
684 dev_err(spi->dev, "abort error\n"); in lantiq_ssc_err_interrupt()
686 dev_err(spi->dev, "receive overflow error\n"); in lantiq_ssc_err_interrupt()
688 dev_err(spi->dev, "transmit overflow error\n"); in lantiq_ssc_err_interrupt()
690 dev_err(spi->dev, "mode error\n"); in lantiq_ssc_err_interrupt()
693 lantiq_ssc_maskl(spi, 0, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); in lantiq_ssc_err_interrupt()
696 if (spi->host->cur_msg) in lantiq_ssc_err_interrupt()
697 spi->host->cur_msg->status = -EIO; in lantiq_ssc_err_interrupt()
698 queue_work(spi->wq, &spi->work); in lantiq_ssc_err_interrupt()
699 spin_unlock(&spi->lock); in lantiq_ssc_err_interrupt()
706 struct lantiq_ssc_spi *spi = data; in intel_lgm_ssc_isr() local
707 const struct lantiq_ssc_hwcfg *hwcfg = spi->hwcfg; in intel_lgm_ssc_isr()
708 u32 val = lantiq_ssc_readl(spi, hwcfg->irncr); in intel_lgm_ssc_isr()
722 static int transfer_start(struct lantiq_ssc_spi *spi, struct spi_device *spidev, in transfer_start() argument
727 spin_lock_irqsave(&spi->lock, flags); in transfer_start()
729 spi->tx = t->tx_buf; in transfer_start()
730 spi->rx = t->rx_buf; in transfer_start()
733 spi->tx_todo = t->len; in transfer_start()
736 tx_fifo_write(spi); in transfer_start()
739 if (spi->rx) { in transfer_start()
740 spi->rx_todo = t->len; in transfer_start()
743 if (!spi->tx) in transfer_start()
744 rx_request(spi); in transfer_start()
747 spin_unlock_irqrestore(&spi->lock, flags); in transfer_start()
761 struct lantiq_ssc_spi *spi; in lantiq_ssc_bussy_work() local
765 spi = container_of(work, typeof(*spi), work); in lantiq_ssc_bussy_work()
767 do_div(timeout, spi->speed_hz); in lantiq_ssc_bussy_work()
772 u32 stat = lantiq_ssc_readl(spi, LTQ_SPI_STAT); in lantiq_ssc_bussy_work()
775 spi_finalize_current_transfer(spi->host); in lantiq_ssc_bussy_work()
782 if (spi->host->cur_msg) in lantiq_ssc_bussy_work()
783 spi->host->cur_msg->status = -EIO; in lantiq_ssc_bussy_work()
784 spi_finalize_current_transfer(spi->host); in lantiq_ssc_bussy_work()
790 struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); in lantiq_ssc_handle_err() local
793 rx_fifo_flush(spi); in lantiq_ssc_handle_err()
794 tx_fifo_flush(spi); in lantiq_ssc_handle_err()
799 struct lantiq_ssc_spi *spi = spi_controller_get_devdata(spidev->controller); in lantiq_ssc_set_cs() local
804 fgpo = (1 << (cs - spi->base_cs)); in lantiq_ssc_set_cs()
806 fgpo = (1 << (cs - spi->base_cs + LTQ_SPI_FGPO_SETOUTN_S)); in lantiq_ssc_set_cs()
808 lantiq_ssc_writel(spi, fgpo, LTQ_SPI_FPGO); in lantiq_ssc_set_cs()
815 struct lantiq_ssc_spi *spi = spi_controller_get_devdata(host); in lantiq_ssc_transfer_one() local
817 hw_setup_transfer(spi, spidev, t); in lantiq_ssc_transfer_one()
819 return transfer_start(spi, spidev, t); in lantiq_ssc_transfer_one()
822 static int intel_lgm_cfg_irq(struct platform_device *pdev, struct lantiq_ssc_spi *spi) in intel_lgm_cfg_irq() argument
830 return devm_request_irq(&pdev->dev, irq, intel_lgm_ssc_isr, 0, "spi", spi); in intel_lgm_cfg_irq()
833 static int lantiq_cfg_irq(struct platform_device *pdev, struct lantiq_ssc_spi *spi) in lantiq_cfg_irq() argument
842 0, LTQ_SPI_RX_IRQ_NAME, spi); in lantiq_cfg_irq()
851 0, LTQ_SPI_TX_IRQ_NAME, spi); in lantiq_cfg_irq()
861 0, LTQ_SPI_ERR_IRQ_NAME, spi); in lantiq_cfg_irq()
908 struct lantiq_ssc_spi *spi; in lantiq_ssc_probe() local
920 spi = spi_controller_get_devdata(host); in lantiq_ssc_probe()
921 spi->host = host; in lantiq_ssc_probe()
922 spi->dev = dev; in lantiq_ssc_probe()
923 spi->hwcfg = hwcfg; in lantiq_ssc_probe()
924 platform_set_drvdata(pdev, spi); in lantiq_ssc_probe()
925 spi->regbase = devm_platform_ioremap_resource(pdev, 0); in lantiq_ssc_probe()
926 if (IS_ERR(spi->regbase)) { in lantiq_ssc_probe()
927 err = PTR_ERR(spi->regbase); in lantiq_ssc_probe()
931 err = hwcfg->cfg_irq(pdev, spi); in lantiq_ssc_probe()
935 spi->spi_clk = devm_clk_get(dev, "gate"); in lantiq_ssc_probe()
936 if (IS_ERR(spi->spi_clk)) { in lantiq_ssc_probe()
937 err = PTR_ERR(spi->spi_clk); in lantiq_ssc_probe()
940 err = clk_prepare_enable(spi->spi_clk); in lantiq_ssc_probe()
949 spi->fpi_clk = clk_get_fpi(); in lantiq_ssc_probe()
951 spi->fpi_clk = clk_get(dev, "freq"); in lantiq_ssc_probe()
953 if (IS_ERR(spi->fpi_clk)) { in lantiq_ssc_probe()
954 err = PTR_ERR(spi->fpi_clk); in lantiq_ssc_probe()
961 spi->base_cs = 1; in lantiq_ssc_probe()
962 of_property_read_u32(pdev->dev.of_node, "base-cs", &spi->base_cs); in lantiq_ssc_probe()
964 spin_lock_init(&spi->lock); in lantiq_ssc_probe()
965 spi->bits_per_word = 8; in lantiq_ssc_probe()
966 spi->speed_hz = 0; in lantiq_ssc_probe()
982 spi->wq = alloc_ordered_workqueue(dev_name(dev), WQ_MEM_RECLAIM); in lantiq_ssc_probe()
983 if (!spi->wq) { in lantiq_ssc_probe()
987 INIT_WORK(&spi->work, lantiq_ssc_bussy_work); in lantiq_ssc_probe()
989 id = lantiq_ssc_readl(spi, LTQ_SPI_ID); in lantiq_ssc_probe()
990 spi->tx_fifo_size = (id >> LTQ_SPI_ID_TXFS_S) & hwcfg->fifo_size_mask; in lantiq_ssc_probe()
991 spi->rx_fifo_size = (id >> LTQ_SPI_ID_RXFS_S) & hwcfg->fifo_size_mask; in lantiq_ssc_probe()
995 lantiq_ssc_hw_init(spi); in lantiq_ssc_probe()
999 revision, spi->tx_fifo_size, spi->rx_fifo_size, supports_dma); in lantiq_ssc_probe()
1010 destroy_workqueue(spi->wq); in lantiq_ssc_probe()
1012 clk_put(spi->fpi_clk); in lantiq_ssc_probe()
1014 clk_disable_unprepare(spi->spi_clk); in lantiq_ssc_probe()
1023 struct lantiq_ssc_spi *spi = platform_get_drvdata(pdev); in lantiq_ssc_remove() local
1025 lantiq_ssc_writel(spi, 0, LTQ_SPI_IRNEN); in lantiq_ssc_remove()
1026 lantiq_ssc_writel(spi, 0, LTQ_SPI_CLC); in lantiq_ssc_remove()
1027 rx_fifo_flush(spi); in lantiq_ssc_remove()
1028 tx_fifo_flush(spi); in lantiq_ssc_remove()
1029 hw_enter_config_mode(spi); in lantiq_ssc_remove()
1031 destroy_workqueue(spi->wq); in lantiq_ssc_remove()
1032 clk_disable_unprepare(spi->spi_clk); in lantiq_ssc_remove()
1033 clk_put(spi->fpi_clk); in lantiq_ssc_remove()