1290 	uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};  in qla82xx_pci_mem_write_2M()  local
1296 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_write_2M()
1298 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_write_2M()
1350 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_write_2M()
1352 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_write_2M()
1354 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);  in qla82xx_pci_mem_write_2M()
1356 		qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);  in qla82xx_pci_mem_write_2M()
1358 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1361 		qla82xx_wr_32(ha, mem_crb +  in qla82xx_pci_mem_write_2M()
1365 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1367 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_write_2M()
1370 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_write_2M()
1427 	uint64_t      off8, val, mem_crb, word[2] = {0, 0};  in qla82xx_pci_mem_read_2M()  local
1434 		mem_crb = QLA82XX_CRB_QDR_NET;  in qla82xx_pci_mem_read_2M()
1436 		mem_crb = QLA82XX_CRB_DDR_NET;  in qla82xx_pci_mem_read_2M()
1452 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);  in qla82xx_pci_mem_read_2M()
1454 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);  in qla82xx_pci_mem_read_2M()
1456 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1458 		qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);  in qla82xx_pci_mem_read_2M()
1461 			temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);  in qla82xx_pci_mem_read_2M()
1477 					mem_crb + MIU_TEST_AGT_RDDATA(k));  in qla82xx_pci_mem_read_2M()