Lines Matching refs:u_int
575 u_int sg_count;/* How full ahc_dma_seg is */
730 u_int sxfr_u2; /* Value of the SXFR parameter for Ultra2+ Chips */
731 u_int sxfr; /* Value of the SXFR parameter for <= Ultra Chips */
919 u_int untagged_queue_lock;
998 u_int num_critical_sections;
1031 u_int msgout_len; /* Length of message to send */
1032 u_int msgout_index; /* Current index in msgout */
1033 u_int msgin_index; /* Current index in msgin */
1052 u_int enabled_luns;
1055 u_int init_level;
1058 u_int pci_cachesize;
1065 u_int pci_target_perr_count;
1069 u_int instruction_ram_size;
1095 u_int target;
1096 u_int lun;
1141 u_int port);
1149 u_int tag, role_t role);
1173 char channel, int lun, u_int tag,
1182 char channel, int lun, u_int tag,
1190 u_int our_id, u_int target,
1191 u_int lun, char channel,
1194 const struct ahc_syncrate* ahc_find_syncrate(struct ahc_softc *ahc, u_int *period,
1195 u_int *ppr_options, u_int maxsync);
1196 u_int ahc_find_period(struct ahc_softc *ahc,
1197 u_int scsirate, u_int maxsync);
1214 u_int width, u_int type, int paused);
1218 u_int period, u_int offset,
1219 u_int ppr_options,
1220 u_int type, int paused);
1263 u_int num_entries,
1265 u_int address,
1266 u_int value,
1267 u_int *cur_column,
1268 u_int wrap_point);