Lines Matching refs:CONTROL_REG
22 #define CONTROL_REG 0x00 macro
65 ctrl = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_start()
68 writel(ctrl, rtcdev->base + CONTROL_REG); in mpfs_rtc_start()
73 u32 val = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_clear_irq()
77 writel(val, rtcdev->base + CONTROL_REG); in mpfs_rtc_clear_irq()
83 (void)readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_clear_irq()
110 ctrl = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_settime()
113 writel(ctrl, rtcdev->base + CONTROL_REG); in mpfs_rtc_settime()
116 false, rtcdev->base + CONTROL_REG); in mpfs_rtc_settime()
148 ctrl = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_setalarm()
150 writel(ctrl, rtcdev->base + CONTROL_REG); in mpfs_rtc_setalarm()
162 ctrl = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_setalarm()
172 writel(ctrl, rtcdev->base + CONTROL_REG); in mpfs_rtc_setalarm()
183 ctrl = readl(rtcdev->base + CONTROL_REG); in mpfs_rtc_alarm_irq_enable()
191 writel(ctrl, rtcdev->base + CONTROL_REG); in mpfs_rtc_alarm_irq_enable()