634 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_pin_dbg_show()
676 			raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_pinmux_set_mux()
716 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_pinmux_set_mux()
757 			raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_request_enable()
792 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_request_enable()
809 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_disable_free()
829 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_set_direction()
857 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_config_get()
958 			raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_config_set_pull()
976 			raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_config_set_pull()
984 		raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_config_set_pull()
989 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_config_set_pull()
1009 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_config_set_oden()
1124 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_get()
1151 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_set()
1162 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_get_direction()
1232 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_irq_mask_unmask()
1292 		raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_irq_startup()
1365 		raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_irq_type()
1408 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_irq_type()
1440 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_gpio_irq_handler()
1641 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_pinctrl_mmio_access_handler()
1768 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_pinctrl_suspend_noirq()
1822 	raw_spin_unlock_irqrestore(&chv_lock, flags);  in chv_pinctrl_resume_noirq()