151 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_ctr_get_width_mask()  local
153 	if (hwc->idx == -1)  in riscv_pmu_ctr_get_width_mask()
157 		cwidth = rvpmu->ctr_get_width(hwc->idx);  in riscv_pmu_ctr_get_width_mask()
165 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_event_update()  local
176 		prev_raw_count = local64_read(&hwc->prev_count);  in riscv_pmu_event_update()
178 		oldval = local64_cmpxchg(&hwc->prev_count, prev_raw_count,  in riscv_pmu_event_update()
184 	local64_sub(delta, &hwc->period_left);  in riscv_pmu_event_update()
191 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_stop()  local
194 	WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);  in riscv_pmu_stop()
196 	if (!(hwc->state & PERF_HES_STOPPED)) {  in riscv_pmu_stop()
199 			hwc->state |= PERF_HES_STOPPED;  in riscv_pmu_stop()
202 		hwc->state |= PERF_HES_UPTODATE;  in riscv_pmu_stop()
208 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_event_set_period()  local
209 	s64 left = local64_read(&hwc->period_left);  in riscv_pmu_event_set_period()
210 	s64 period = hwc->sample_period;  in riscv_pmu_event_set_period()
216 		local64_set(&hwc->period_left, left);  in riscv_pmu_event_set_period()
217 		hwc->last_period = period;  in riscv_pmu_event_set_period()
223 		local64_set(&hwc->period_left, left);  in riscv_pmu_event_set_period()
224 		hwc->last_period = period;  in riscv_pmu_event_set_period()
237 	local64_set(&hwc->prev_count, (u64)-left);  in riscv_pmu_event_set_period()
246 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_start()  local
254 	hwc->state = 0;  in riscv_pmu_start()
256 	init_val = local64_read(&hwc->prev_count) & max_period;  in riscv_pmu_start()
265 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_add()  local
272 	hwc->idx = idx;  in riscv_pmu_add()
275 	hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;  in riscv_pmu_add()
289 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_del()  local
292 	cpuc->events[hwc->idx] = NULL;  in riscv_pmu_del()
300 	hwc->idx = -1;  in riscv_pmu_del()
310 	struct hw_perf_event *hwc = &event->hw;  in riscv_pmu_event_init()  local
316 	hwc->flags = 0;  in riscv_pmu_event_init()
330 	hwc->config = event_config;  in riscv_pmu_event_init()
331 	hwc->idx = -1;  in riscv_pmu_event_init()
332 	hwc->event_base = mapped_event;  in riscv_pmu_event_init()
345 		hwc->sample_period  =  cmask >> 1;  in riscv_pmu_event_init()
346 		hwc->last_period    = hwc->sample_period;  in riscv_pmu_event_init()
347 		local64_set(&hwc->period_left, hwc->sample_period);  in riscv_pmu_event_init()