Lines Matching refs:td
33 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_tx_pending() local
36 struct sk_buff *skb = td->tx_skb; in mt76_testmode_tx_pending()
41 if (!skb || !td->tx_pending) in mt76_testmode_tx_pending()
47 tx_queued_limit = td->tx_queued_limit ? td->tx_queued_limit : 1000; in mt76_testmode_tx_pending()
51 while (td->tx_pending > 0 && in mt76_testmode_tx_pending()
52 td->tx_queued - td->tx_done < tx_queued_limit && in mt76_testmode_tx_pending()
61 td->tx_pending--; in mt76_testmode_tx_pending()
62 td->tx_queued++; in mt76_testmode_tx_pending()
95 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_free_skb() local
97 dev_kfree_skb(td->tx_skb); in mt76_testmode_free_skb()
98 td->tx_skb = NULL; in mt76_testmode_free_skb()
106 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_alloc_skb() local
113 max_len = mt76_testmode_max_mpdu_len(phy, td->tx_rate_mode); in mt76_testmode_alloc_skb()
131 memcpy(hdr->addr1, td->addr[0], ETH_ALEN); in mt76_testmode_alloc_skb()
132 memcpy(hdr->addr2, td->addr[1], ETH_ALEN); in mt76_testmode_alloc_skb()
133 memcpy(hdr->addr3, td->addr[2], ETH_ALEN); in mt76_testmode_alloc_skb()
171 td->tx_skb = head; in mt76_testmode_alloc_skb()
180 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_tx_init() local
186 ret = mt76_testmode_alloc_skb(phy, td->tx_mpdu_len); in mt76_testmode_tx_init()
190 if (td->tx_rate_mode > MT76_TM_TX_MODE_VHT) in mt76_testmode_tx_init()
193 if (td->tx_antenna_mask) in mt76_testmode_tx_init()
194 max_nss = min_t(u8, max_nss, hweight8(td->tx_antenna_mask)); in mt76_testmode_tx_init()
196 info = IEEE80211_SKB_CB(td->tx_skb); in mt76_testmode_tx_init()
199 rate->idx = td->tx_rate_idx; in mt76_testmode_tx_init()
201 switch (td->tx_rate_mode) { in mt76_testmode_tx_init()
230 if (td->tx_rate_nss > max_nss) in mt76_testmode_tx_init()
233 ieee80211_rate_set_vht(rate, td->tx_rate_idx, td->tx_rate_nss); in mt76_testmode_tx_init()
240 if (td->tx_rate_sgi) in mt76_testmode_tx_init()
243 if (td->tx_rate_ldpc) in mt76_testmode_tx_init()
246 if (td->tx_rate_stbc) in mt76_testmode_tx_init()
249 if (td->tx_rate_mode >= MT76_TM_TX_MODE_HT) { in mt76_testmode_tx_init()
272 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_tx_start() local
275 td->tx_queued = 0; in mt76_testmode_tx_start()
276 td->tx_done = 0; in mt76_testmode_tx_start()
277 td->tx_pending = td->tx_count; in mt76_testmode_tx_start()
284 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_tx_stop() local
289 td->tx_pending = 0; in mt76_testmode_tx_stop()
293 wait_event_timeout(dev->tx_wait, td->tx_done == td->tx_queued, in mt76_testmode_tx_stop()
300 mt76_testmode_param_set(struct mt76_testmode_data *td, u16 idx) in mt76_testmode_param_set() argument
302 td->param_set[idx / 32] |= BIT(idx % 32); in mt76_testmode_param_set()
306 mt76_testmode_param_present(struct mt76_testmode_data *td, u16 idx) in mt76_testmode_param_present() argument
308 return td->param_set[idx / 32] & BIT(idx % 32); in mt76_testmode_param_present()
314 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_init_defaults() local
316 if (td->tx_mpdu_len > 0) in mt76_testmode_init_defaults()
319 td->tx_mpdu_len = 1024; in mt76_testmode_init_defaults()
320 td->tx_count = 1; in mt76_testmode_init_defaults()
321 td->tx_rate_mode = MT76_TM_TX_MODE_OFDM; in mt76_testmode_init_defaults()
322 td->tx_rate_nss = 1; in mt76_testmode_init_defaults()
324 memcpy(td->addr[0], phy->macaddr, ETH_ALEN); in mt76_testmode_init_defaults()
325 memcpy(td->addr[1], phy->macaddr, ETH_ALEN); in mt76_testmode_init_defaults()
326 memcpy(td->addr[2], phy->macaddr, ETH_ALEN); in mt76_testmode_init_defaults()
366 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_set_state() local
369 if (state == td->state && state == MT76_TM_STATE_OFF) in mt76_testmode_set_state()
378 td->state != MT76_TM_STATE_IDLE) { in mt76_testmode_set_state()
412 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_cmd() local
432 memset(td, 0, sizeof(*td)); in mt76_testmode_cmd()
438 td->tx_count = nla_get_u32(tb[MT76_TM_ATTR_TX_COUNT]); in mt76_testmode_cmd()
441 td->tx_rate_idx = nla_get_u8(tb[MT76_TM_ATTR_TX_RATE_IDX]); in mt76_testmode_cmd()
443 if (mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_MODE], &td->tx_rate_mode, in mt76_testmode_cmd()
445 mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_NSS], &td->tx_rate_nss, in mt76_testmode_cmd()
447 mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_SGI], &td->tx_rate_sgi, 0, 2) || in mt76_testmode_cmd()
448 mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_LDPC], &td->tx_rate_ldpc, 0, 1) || in mt76_testmode_cmd()
449 mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_STBC], &td->tx_rate_stbc, 0, 1) || in mt76_testmode_cmd()
450 mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_LTF], &td->tx_ltf, 0, 2) || in mt76_testmode_cmd()
452 &td->tx_antenna_mask, 0, 0xff) || in mt76_testmode_cmd()
453 mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_SPE_IDX], &td->tx_spe_idx, 0, 27) || in mt76_testmode_cmd()
455 &td->tx_duty_cycle, 0, 99) || in mt76_testmode_cmd()
457 &td->tx_power_control, 0, 1)) in mt76_testmode_cmd()
463 if (val > mt76_testmode_max_mpdu_len(phy, td->tx_rate_mode) || in mt76_testmode_cmd()
467 td->tx_mpdu_len = val; in mt76_testmode_cmd()
471 td->tx_ipg = nla_get_u32(tb[MT76_TM_ATTR_TX_IPG]); in mt76_testmode_cmd()
474 td->tx_time = nla_get_u32(tb[MT76_TM_ATTR_TX_TIME]); in mt76_testmode_cmd()
477 td->freq_offset = nla_get_u32(tb[MT76_TM_ATTR_FREQ_OFFSET]); in mt76_testmode_cmd()
484 state = td->state; in mt76_testmode_cmd()
494 idx >= ARRAY_SIZE(td->tx_power)) in mt76_testmode_cmd()
497 td->tx_power[idx++] = nla_get_u8(cur); in mt76_testmode_cmd()
510 memcpy(td->addr[idx], nla_data(cur), ETH_ALEN); in mt76_testmode_cmd()
523 mt76_testmode_param_set(td, i); in mt76_testmode_cmd()
539 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_dump_stats() local
553 for (i = 0; i < ARRAY_SIZE(td->rx_stats.packets); i++) { in mt76_testmode_dump_stats()
554 rx_packets += td->rx_stats.packets[i]; in mt76_testmode_dump_stats()
555 rx_fcs_error += td->rx_stats.fcs_error[i]; in mt76_testmode_dump_stats()
558 if (nla_put_u32(msg, MT76_TM_STATS_ATTR_TX_PENDING, td->tx_pending) || in mt76_testmode_dump_stats()
559 nla_put_u32(msg, MT76_TM_STATS_ATTR_TX_QUEUED, td->tx_queued) || in mt76_testmode_dump_stats()
560 nla_put_u32(msg, MT76_TM_STATS_ATTR_TX_DONE, td->tx_done) || in mt76_testmode_dump_stats()
575 struct mt76_testmode_data *td = &phy->test; in mt76_testmode_dump() local
611 if (nla_put_u32(msg, MT76_TM_ATTR_STATE, td->state)) in mt76_testmode_dump()
619 if (nla_put_u32(msg, MT76_TM_ATTR_TX_COUNT, td->tx_count) || in mt76_testmode_dump()
620 nla_put_u32(msg, MT76_TM_ATTR_TX_LENGTH, td->tx_mpdu_len) || in mt76_testmode_dump()
621 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_MODE, td->tx_rate_mode) || in mt76_testmode_dump()
622 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_NSS, td->tx_rate_nss) || in mt76_testmode_dump()
623 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, td->tx_rate_idx) || in mt76_testmode_dump()
624 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, td->tx_rate_sgi) || in mt76_testmode_dump()
625 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, td->tx_rate_ldpc) || in mt76_testmode_dump()
626 nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_STBC, td->tx_rate_stbc) || in mt76_testmode_dump()
627 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_LTF) && in mt76_testmode_dump()
628 nla_put_u8(msg, MT76_TM_ATTR_TX_LTF, td->tx_ltf)) || in mt76_testmode_dump()
629 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_ANTENNA) && in mt76_testmode_dump()
630 nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, td->tx_antenna_mask)) || in mt76_testmode_dump()
631 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_SPE_IDX) && in mt76_testmode_dump()
632 nla_put_u8(msg, MT76_TM_ATTR_TX_SPE_IDX, td->tx_spe_idx)) || in mt76_testmode_dump()
633 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_DUTY_CYCLE) && in mt76_testmode_dump()
634 nla_put_u8(msg, MT76_TM_ATTR_TX_DUTY_CYCLE, td->tx_duty_cycle)) || in mt76_testmode_dump()
635 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_IPG) && in mt76_testmode_dump()
636 nla_put_u32(msg, MT76_TM_ATTR_TX_IPG, td->tx_ipg)) || in mt76_testmode_dump()
637 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_TIME) && in mt76_testmode_dump()
638 nla_put_u32(msg, MT76_TM_ATTR_TX_TIME, td->tx_time)) || in mt76_testmode_dump()
639 (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER_CONTROL) && in mt76_testmode_dump()
640 nla_put_u8(msg, MT76_TM_ATTR_TX_POWER_CONTROL, td->tx_power_control)) || in mt76_testmode_dump()
641 (mt76_testmode_param_present(td, MT76_TM_ATTR_FREQ_OFFSET) && in mt76_testmode_dump()
642 nla_put_u8(msg, MT76_TM_ATTR_FREQ_OFFSET, td->freq_offset))) in mt76_testmode_dump()
645 if (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER)) { in mt76_testmode_dump()
650 for (i = 0; i < ARRAY_SIZE(td->tx_power); i++) in mt76_testmode_dump()
651 if (nla_put_u8(msg, i, td->tx_power[i])) in mt76_testmode_dump()
657 if (mt76_testmode_param_present(td, MT76_TM_ATTR_MAC_ADDRS)) { in mt76_testmode_dump()
663 if (nla_put(msg, i, ETH_ALEN, td->addr[i])) in mt76_testmode_dump()