Lines Matching refs:pi
79 #define wlc_lcnphy_enable_tx_gain_override(pi) \ argument
80 wlc_lcnphy_set_tx_gain_override(pi, true)
81 #define wlc_lcnphy_disable_tx_gain_override(pi) \ argument
82 wlc_lcnphy_set_tx_gain_override(pi, false)
84 #define wlc_lcnphy_iqcal_active(pi) \ argument
85 (read_phy_reg((pi), 0x451) & \
88 #define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13)) argument
89 #define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \ argument
90 (pi->temppwrctrl_capable)
91 #define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \ argument
92 (pi->hwpwrctrl_capable)
134 #define wlc_lcnphy_tx_gain_override_enabled(pi) \ argument
135 (0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6)))
137 #define wlc_lcnphy_total_tx_frames(pi) \ argument
138 wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + \
864 #define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \ argument
865 mod_phy_reg(pi, 0x4a4, \
869 #define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \ argument
870 mod_phy_reg(pi, 0x4a5, \
874 #define wlc_lcnphy_get_tx_pwr_ctrl(pi) \ argument
875 (read_phy_reg((pi), 0x4a4) & \
880 #define wlc_lcnphy_get_tx_pwr_npt(pi) \ argument
881 ((read_phy_reg(pi, 0x4a5) & \
885 #define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \ argument
886 (read_phy_reg(pi, 0x473) & 0x1ff)
888 #define wlc_lcnphy_get_target_tx_pwr(pi) \ argument
889 ((read_phy_reg(pi, 0x4a7) & \
893 #define wlc_lcnphy_set_target_tx_pwr(pi, target) \ argument
894 mod_phy_reg(pi, 0x4a7, \
898 #define wlc_radio_2064_rcal_done(pi) \ argument
899 (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20))
901 #define tempsense_done(pi) \ argument
902 (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000))
910 void wlc_lcnphy_write_table(struct brcms_phy *pi, const struct phytbl_info *pti) in wlc_lcnphy_write_table() argument
912 wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456); in wlc_lcnphy_write_table()
915 void wlc_lcnphy_read_table(struct brcms_phy *pi, struct phytbl_info *pti) in wlc_lcnphy_read_table() argument
917 wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456); in wlc_lcnphy_read_table()
921 wlc_lcnphy_common_read_table(struct brcms_phy *pi, u32 tbl_id, in wlc_lcnphy_common_read_table() argument
931 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_common_read_table()
935 wlc_lcnphy_common_write_table(struct brcms_phy *pi, u32 tbl_id, in wlc_lcnphy_common_write_table() argument
946 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_common_write_table()
996 wlc_lcnphy_get_tx_gain(struct brcms_phy *pi, struct lcnphy_txgains *gains) in wlc_lcnphy_get_tx_gain() argument
1000 dac_gain = read_phy_reg(pi, 0x439) >> 0; in wlc_lcnphy_get_tx_gain()
1003 rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0; in wlc_lcnphy_get_tx_gain()
1004 rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0; in wlc_lcnphy_get_tx_gain()
1012 static void wlc_lcnphy_set_dac_gain(struct brcms_phy *pi, u16 dac_gain) in wlc_lcnphy_set_dac_gain() argument
1016 dac_ctrl = (read_phy_reg(pi, 0x439) >> 0); in wlc_lcnphy_set_dac_gain()
1019 mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0); in wlc_lcnphy_set_dac_gain()
1023 static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable) in wlc_lcnphy_set_tx_gain_override() argument
1027 mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7); in wlc_lcnphy_set_tx_gain_override()
1029 mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14); in wlc_lcnphy_set_tx_gain_override()
1031 mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6); in wlc_lcnphy_set_tx_gain_override()
1035 wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi, bool enable) in wlc_lcnphy_rx_gain_override_enable() argument
1039 mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8); in wlc_lcnphy_rx_gain_override_enable()
1041 mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0); in wlc_lcnphy_rx_gain_override_enable()
1043 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_rx_gain_override_enable()
1044 mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4); in wlc_lcnphy_rx_gain_override_enable()
1045 mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6); in wlc_lcnphy_rx_gain_override_enable()
1046 mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5); in wlc_lcnphy_rx_gain_override_enable()
1047 mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6); in wlc_lcnphy_rx_gain_override_enable()
1049 mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12); in wlc_lcnphy_rx_gain_override_enable()
1050 mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13); in wlc_lcnphy_rx_gain_override_enable()
1051 mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5); in wlc_lcnphy_rx_gain_override_enable()
1054 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_rx_gain_override_enable()
1055 mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10); in wlc_lcnphy_rx_gain_override_enable()
1056 mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3); in wlc_lcnphy_rx_gain_override_enable()
1061 wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi, in wlc_lcnphy_set_rx_gain_by_distribution() argument
1078 mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0); in wlc_lcnphy_set_rx_gain_by_distribution()
1079 mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0); in wlc_lcnphy_set_rx_gain_by_distribution()
1080 mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); in wlc_lcnphy_set_rx_gain_by_distribution()
1082 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_set_rx_gain_by_distribution()
1083 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); in wlc_lcnphy_set_rx_gain_by_distribution()
1084 mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10); in wlc_lcnphy_set_rx_gain_by_distribution()
1086 mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10); in wlc_lcnphy_set_rx_gain_by_distribution()
1088 mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15); in wlc_lcnphy_set_rx_gain_by_distribution()
1090 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); in wlc_lcnphy_set_rx_gain_by_distribution()
1093 mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0); in wlc_lcnphy_set_rx_gain_by_distribution()
1097 static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx, bool rx) in wlc_lcnphy_set_trsw_override() argument
1100 mod_phy_reg(pi, 0x44d, in wlc_lcnphy_set_trsw_override()
1104 or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0)); in wlc_lcnphy_set_trsw_override()
1107 static void wlc_lcnphy_clear_trsw_override(struct brcms_phy *pi) in wlc_lcnphy_clear_trsw_override() argument
1110 and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0))); in wlc_lcnphy_clear_trsw_override()
1113 static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b) in wlc_lcnphy_set_rx_iq_comp() argument
1115 mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0); in wlc_lcnphy_set_rx_iq_comp()
1117 mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0); in wlc_lcnphy_set_rx_iq_comp()
1119 mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0); in wlc_lcnphy_set_rx_iq_comp()
1121 mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0); in wlc_lcnphy_set_rx_iq_comp()
1123 mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0); in wlc_lcnphy_set_rx_iq_comp()
1125 mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0); in wlc_lcnphy_set_rx_iq_comp()
1130 wlc_lcnphy_rx_iq_est(struct brcms_phy *pi, in wlc_lcnphy_rx_iq_est() argument
1137 mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5); in wlc_lcnphy_rx_iq_est()
1139 mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3); in wlc_lcnphy_rx_iq_est()
1141 mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0); in wlc_lcnphy_rx_iq_est()
1143 mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0); in wlc_lcnphy_rx_iq_est()
1145 mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8); in wlc_lcnphy_rx_iq_est()
1147 mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9); in wlc_lcnphy_rx_iq_est()
1149 while (read_phy_reg(pi, 0x481) & (0x1 << 9)) { in wlc_lcnphy_rx_iq_est()
1159 iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) | in wlc_lcnphy_rx_iq_est()
1160 (u32) read_phy_reg(pi, 0x484); in wlc_lcnphy_rx_iq_est()
1161 iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) | in wlc_lcnphy_rx_iq_est()
1162 (u32) read_phy_reg(pi, 0x486); in wlc_lcnphy_rx_iq_est()
1163 iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) | in wlc_lcnphy_rx_iq_est()
1164 (u32) read_phy_reg(pi, 0x488); in wlc_lcnphy_rx_iq_est()
1167 mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3); in wlc_lcnphy_rx_iq_est()
1169 mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5); in wlc_lcnphy_rx_iq_est()
1174 static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps) in wlc_lcnphy_calc_rx_iq_comp() argument
1184 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_calc_rx_iq_comp()
1186 a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0); in wlc_lcnphy_calc_rx_iq_comp()
1187 b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0); in wlc_lcnphy_calc_rx_iq_comp()
1188 mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2); in wlc_lcnphy_calc_rx_iq_comp()
1190 mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6); in wlc_lcnphy_calc_rx_iq_comp()
1192 wlc_lcnphy_set_rx_iq_comp(pi, 0, 0); in wlc_lcnphy_calc_rx_iq_comp()
1194 result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est); in wlc_lcnphy_calc_rx_iq_comp()
1243 wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new); in wlc_lcnphy_calc_rx_iq_comp()
1245 mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0); in wlc_lcnphy_calc_rx_iq_comp()
1247 mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3); in wlc_lcnphy_calc_rx_iq_comp()
1255 static u32 wlc_lcnphy_measure_digital_power(struct brcms_phy *pi, u16 nsamples) in wlc_lcnphy_measure_digital_power() argument
1259 if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est)) in wlc_lcnphy_measure_digital_power()
1264 static bool wlc_lcnphy_rx_iq_cal_gain(struct brcms_phy *pi, u16 biq1_gain, in wlc_lcnphy_rx_iq_cal_gain() argument
1271 wlc_lcnphy_set_rx_gain_by_distribution(pi, 0, 0, 0, biq1_gain, tia_gain, in wlc_lcnphy_rx_iq_cal_gain()
1274 wlc_lcnphy_rx_gain_override_enable(pi, true); in wlc_lcnphy_rx_iq_cal_gain()
1275 wlc_lcnphy_start_tx_tone(pi, 2000, (40 >> 1), 0); in wlc_lcnphy_rx_iq_cal_gain()
1277 write_radio_reg(pi, RADIO_2064_REG112, 0); in wlc_lcnphy_rx_iq_cal_gain()
1278 if (!wlc_lcnphy_rx_iq_est(pi, 1024, 32, &iq_est_l)) in wlc_lcnphy_rx_iq_cal_gain()
1281 wlc_lcnphy_start_tx_tone(pi, 2000, 40, 0); in wlc_lcnphy_rx_iq_cal_gain()
1283 write_radio_reg(pi, RADIO_2064_REG112, 0); in wlc_lcnphy_rx_iq_cal_gain()
1284 if (!wlc_lcnphy_rx_iq_est(pi, 1024, 32, &iq_est_h)) in wlc_lcnphy_rx_iq_cal_gain()
1302 wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi, in wlc_lcnphy_rx_iq_cal() argument
1320 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_rx_iq_cal()
1328 CHSPEC_CHANNEL(pi->radio_chanspec)) { in wlc_lcnphy_rx_iq_cal()
1329 wlc_lcnphy_set_rx_iq_comp(pi, in wlc_lcnphy_rx_iq_cal()
1342 tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_rx_iq_cal()
1343 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_lcnphy_rx_iq_cal()
1347 read_radio_reg(pi, rxiq_cal_rf_reg[i]); in wlc_lcnphy_rx_iq_cal()
1348 Core1TxControl_old = read_phy_reg(pi, 0x631); in wlc_lcnphy_rx_iq_cal()
1350 or_phy_reg(pi, 0x631, 0x0015); in wlc_lcnphy_rx_iq_cal()
1352 read_phy_reg(pi, 0x44c); /* RFOverride0_old */ in wlc_lcnphy_rx_iq_cal()
1353 RFOverrideVal0_old = read_phy_reg(pi, 0x44d); in wlc_lcnphy_rx_iq_cal()
1354 rfoverride2_old = read_phy_reg(pi, 0x4b0); in wlc_lcnphy_rx_iq_cal()
1355 rfoverride2val_old = read_phy_reg(pi, 0x4b1); in wlc_lcnphy_rx_iq_cal()
1356 rfoverride3_old = read_phy_reg(pi, 0x4f9); in wlc_lcnphy_rx_iq_cal()
1357 rfoverride3val_old = read_phy_reg(pi, 0x4fa); in wlc_lcnphy_rx_iq_cal()
1358 rfoverride4_old = read_phy_reg(pi, 0x938); in wlc_lcnphy_rx_iq_cal()
1359 rfoverride4val_old = read_phy_reg(pi, 0x939); in wlc_lcnphy_rx_iq_cal()
1360 afectrlovr_old = read_phy_reg(pi, 0x43b); in wlc_lcnphy_rx_iq_cal()
1361 afectrlovrval_old = read_phy_reg(pi, 0x43c); in wlc_lcnphy_rx_iq_cal()
1362 old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); in wlc_lcnphy_rx_iq_cal()
1363 old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db); in wlc_lcnphy_rx_iq_cal()
1365 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); in wlc_lcnphy_rx_iq_cal()
1367 wlc_lcnphy_get_tx_gain(pi, &old_gains); in wlc_lcnphy_rx_iq_cal()
1371 wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx); in wlc_lcnphy_rx_iq_cal()
1373 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); in wlc_lcnphy_rx_iq_cal()
1374 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0); in wlc_lcnphy_rx_iq_cal()
1376 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); in wlc_lcnphy_rx_iq_cal()
1377 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); in wlc_lcnphy_rx_iq_cal()
1379 write_radio_reg(pi, RADIO_2064_REG116, 0x06); in wlc_lcnphy_rx_iq_cal()
1380 write_radio_reg(pi, RADIO_2064_REG12C, 0x07); in wlc_lcnphy_rx_iq_cal()
1381 write_radio_reg(pi, RADIO_2064_REG06A, 0xd3); in wlc_lcnphy_rx_iq_cal()
1382 write_radio_reg(pi, RADIO_2064_REG098, 0x03); in wlc_lcnphy_rx_iq_cal()
1383 write_radio_reg(pi, RADIO_2064_REG00B, 0x7); in wlc_lcnphy_rx_iq_cal()
1384 mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4); in wlc_lcnphy_rx_iq_cal()
1385 write_radio_reg(pi, RADIO_2064_REG01D, 0x01); in wlc_lcnphy_rx_iq_cal()
1386 write_radio_reg(pi, RADIO_2064_REG114, 0x01); in wlc_lcnphy_rx_iq_cal()
1387 write_radio_reg(pi, RADIO_2064_REG02E, 0x10); in wlc_lcnphy_rx_iq_cal()
1388 write_radio_reg(pi, RADIO_2064_REG12A, 0x08); in wlc_lcnphy_rx_iq_cal()
1390 mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0); in wlc_lcnphy_rx_iq_cal()
1391 mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0); in wlc_lcnphy_rx_iq_cal()
1392 mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1); in wlc_lcnphy_rx_iq_cal()
1393 mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1); in wlc_lcnphy_rx_iq_cal()
1394 mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2); in wlc_lcnphy_rx_iq_cal()
1395 mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2); in wlc_lcnphy_rx_iq_cal()
1396 mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3); in wlc_lcnphy_rx_iq_cal()
1397 mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3); in wlc_lcnphy_rx_iq_cal()
1398 mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5); in wlc_lcnphy_rx_iq_cal()
1399 mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5); in wlc_lcnphy_rx_iq_cal()
1401 mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0); in wlc_lcnphy_rx_iq_cal()
1402 mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0); in wlc_lcnphy_rx_iq_cal()
1404 write_phy_reg(pi, 0x6da, 0xffff); in wlc_lcnphy_rx_iq_cal()
1405 or_phy_reg(pi, 0x6db, 0x3); in wlc_lcnphy_rx_iq_cal()
1407 wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch); in wlc_lcnphy_rx_iq_cal()
1411 set_gain = wlc_lcnphy_rx_iq_cal_gain(pi, in wlc_lcnphy_rx_iq_cal()
1421 result = wlc_lcnphy_calc_rx_iq_comp(pi, 1024); in wlc_lcnphy_rx_iq_cal()
1428 wlc_lcnphy_stop_tx_tone(pi); in wlc_lcnphy_rx_iq_cal()
1430 write_phy_reg(pi, 0x631, Core1TxControl_old); in wlc_lcnphy_rx_iq_cal()
1432 write_phy_reg(pi, 0x44c, RFOverrideVal0_old); in wlc_lcnphy_rx_iq_cal()
1433 write_phy_reg(pi, 0x44d, RFOverrideVal0_old); in wlc_lcnphy_rx_iq_cal()
1434 write_phy_reg(pi, 0x4b0, rfoverride2_old); in wlc_lcnphy_rx_iq_cal()
1435 write_phy_reg(pi, 0x4b1, rfoverride2val_old); in wlc_lcnphy_rx_iq_cal()
1436 write_phy_reg(pi, 0x4f9, rfoverride3_old); in wlc_lcnphy_rx_iq_cal()
1437 write_phy_reg(pi, 0x4fa, rfoverride3val_old); in wlc_lcnphy_rx_iq_cal()
1438 write_phy_reg(pi, 0x938, rfoverride4_old); in wlc_lcnphy_rx_iq_cal()
1439 write_phy_reg(pi, 0x939, rfoverride4val_old); in wlc_lcnphy_rx_iq_cal()
1440 write_phy_reg(pi, 0x43b, afectrlovr_old); in wlc_lcnphy_rx_iq_cal()
1441 write_phy_reg(pi, 0x43c, afectrlovrval_old); in wlc_lcnphy_rx_iq_cal()
1442 write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl); in wlc_lcnphy_rx_iq_cal()
1443 write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl); in wlc_lcnphy_rx_iq_cal()
1445 wlc_lcnphy_clear_trsw_override(pi); in wlc_lcnphy_rx_iq_cal()
1447 mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2); in wlc_lcnphy_rx_iq_cal()
1450 write_radio_reg(pi, rxiq_cal_rf_reg[i], in wlc_lcnphy_rx_iq_cal()
1454 wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old); in wlc_lcnphy_rx_iq_cal()
1456 wlc_lcnphy_disable_tx_gain_override(pi); in wlc_lcnphy_rx_iq_cal()
1458 wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl); in wlc_lcnphy_rx_iq_cal()
1459 wlc_lcnphy_rx_gain_override_enable(pi, false); in wlc_lcnphy_rx_iq_cal()
1466 s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi) in wlc_lcnphy_get_current_tx_pwr_idx() argument
1469 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_get_current_tx_pwr_idx()
1471 if (txpwrctrl_off(pi)) in wlc_lcnphy_get_current_tx_pwr_idx()
1473 else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_get_current_tx_pwr_idx()
1475 pi) / 2); in wlc_lcnphy_get_current_tx_pwr_idx()
1481 void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel) in wlc_lcnphy_crsuprs() argument
1484 afectrlovr = read_phy_reg(pi, 0x43b); in wlc_lcnphy_crsuprs()
1485 afectrlovrval = read_phy_reg(pi, 0x43c); in wlc_lcnphy_crsuprs()
1487 mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1); in wlc_lcnphy_crsuprs()
1489 mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1); in wlc_lcnphy_crsuprs()
1491 mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4); in wlc_lcnphy_crsuprs()
1493 mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6); in wlc_lcnphy_crsuprs()
1495 write_phy_reg(pi, 0x44b, 0xffff); in wlc_lcnphy_crsuprs()
1496 wlc_lcnphy_tx_pu(pi, 1); in wlc_lcnphy_crsuprs()
1498 mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8); in wlc_lcnphy_crsuprs()
1500 or_phy_reg(pi, 0x6da, 0x0080); in wlc_lcnphy_crsuprs()
1502 or_phy_reg(pi, 0x00a, 0x228); in wlc_lcnphy_crsuprs()
1504 and_phy_reg(pi, 0x00a, ~(0x228)); in wlc_lcnphy_crsuprs()
1506 and_phy_reg(pi, 0x6da, 0xFF7F); in wlc_lcnphy_crsuprs()
1507 write_phy_reg(pi, 0x43b, afectrlovr); in wlc_lcnphy_crsuprs()
1508 write_phy_reg(pi, 0x43c, afectrlovrval); in wlc_lcnphy_crsuprs()
1512 static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi) in wlc_lcnphy_toggle_afe_pwdn() argument
1516 save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c); in wlc_lcnphy_toggle_afe_pwdn()
1517 save_AfeCtrlOvr = read_phy_reg(pi, 0x43b); in wlc_lcnphy_toggle_afe_pwdn()
1519 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1); in wlc_lcnphy_toggle_afe_pwdn()
1520 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1); in wlc_lcnphy_toggle_afe_pwdn()
1522 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe); in wlc_lcnphy_toggle_afe_pwdn()
1523 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe); in wlc_lcnphy_toggle_afe_pwdn()
1525 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal); in wlc_lcnphy_toggle_afe_pwdn()
1526 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr); in wlc_lcnphy_toggle_afe_pwdn()
1530 wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi, bool enable) in wlc_lcnphy_txrx_spur_avoidance_mode() argument
1533 write_phy_reg(pi, 0x942, 0x7); in wlc_lcnphy_txrx_spur_avoidance_mode()
1534 write_phy_reg(pi, 0x93b, ((1 << 13) + 23)); in wlc_lcnphy_txrx_spur_avoidance_mode()
1535 write_phy_reg(pi, 0x93c, ((1 << 13) + 1989)); in wlc_lcnphy_txrx_spur_avoidance_mode()
1537 write_phy_reg(pi, 0x44a, 0x084); in wlc_lcnphy_txrx_spur_avoidance_mode()
1538 write_phy_reg(pi, 0x44a, 0x080); in wlc_lcnphy_txrx_spur_avoidance_mode()
1539 write_phy_reg(pi, 0x6d3, 0x2222); in wlc_lcnphy_txrx_spur_avoidance_mode()
1540 write_phy_reg(pi, 0x6d3, 0x2220); in wlc_lcnphy_txrx_spur_avoidance_mode()
1542 write_phy_reg(pi, 0x942, 0x0); in wlc_lcnphy_txrx_spur_avoidance_mode()
1543 write_phy_reg(pi, 0x93b, ((0 << 13) + 23)); in wlc_lcnphy_txrx_spur_avoidance_mode()
1544 write_phy_reg(pi, 0x93c, ((0 << 13) + 1989)); in wlc_lcnphy_txrx_spur_avoidance_mode()
1546 wlapi_switch_macfreq(pi->sh->physhim, enable); in wlc_lcnphy_txrx_spur_avoidance_mode()
1550 wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi, u16 chanspec) in wlc_lcnphy_set_chanspec_tweaks() argument
1553 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_set_chanspec_tweaks()
1556 mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8); in wlc_lcnphy_set_chanspec_tweaks()
1558 mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8); in wlc_lcnphy_set_chanspec_tweaks()
1567 bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x2, in wlc_lcnphy_set_chanspec_tweaks()
1569 bcma_chipco_pll_maskset(&pi->d11core->bus->drv_cc, 0x3, in wlc_lcnphy_set_chanspec_tweaks()
1571 bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x4, in wlc_lcnphy_set_chanspec_tweaks()
1574 bcma_cc_set32(&pi->d11core->bus->drv_cc, BCMA_CC_PMU_CTL, in wlc_lcnphy_set_chanspec_tweaks()
1576 write_phy_reg(pi, 0x942, 0); in wlc_lcnphy_set_chanspec_tweaks()
1577 wlc_lcnphy_txrx_spur_avoidance_mode(pi, false); in wlc_lcnphy_set_chanspec_tweaks()
1579 mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8); in wlc_lcnphy_set_chanspec_tweaks()
1581 write_phy_reg(pi, 0x425, 0x5907); in wlc_lcnphy_set_chanspec_tweaks()
1583 bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x2, in wlc_lcnphy_set_chanspec_tweaks()
1585 bcma_chipco_pll_maskset(&pi->d11core->bus->drv_cc, 0x3, in wlc_lcnphy_set_chanspec_tweaks()
1587 bcma_chipco_pll_write(&pi->d11core->bus->drv_cc, 0x4, in wlc_lcnphy_set_chanspec_tweaks()
1590 bcma_cc_set32(&pi->d11core->bus->drv_cc, BCMA_CC_PMU_CTL, in wlc_lcnphy_set_chanspec_tweaks()
1592 write_phy_reg(pi, 0x942, 0); in wlc_lcnphy_set_chanspec_tweaks()
1593 wlc_lcnphy_txrx_spur_avoidance_mode(pi, true); in wlc_lcnphy_set_chanspec_tweaks()
1596 mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8); in wlc_lcnphy_set_chanspec_tweaks()
1598 write_phy_reg(pi, 0x425, 0x590a); in wlc_lcnphy_set_chanspec_tweaks()
1601 or_phy_reg(pi, 0x44a, 0x44); in wlc_lcnphy_set_chanspec_tweaks()
1602 write_phy_reg(pi, 0x44a, 0x80); in wlc_lcnphy_set_chanspec_tweaks()
1606 wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel) in wlc_lcnphy_radio_2064_channel_tune_4313() argument
1623 mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2); in wlc_lcnphy_radio_2064_channel_tune_4313()
1625 write_radio_reg(pi, RADIO_2064_REG09E, 0xf); in wlc_lcnphy_radio_2064_channel_tune_4313()
1634 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_radio_2064_channel_tune_4313()
1645 write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune); in wlc_lcnphy_radio_2064_channel_tune_4313()
1647 mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx); in wlc_lcnphy_radio_2064_channel_tune_4313()
1649 mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl); in wlc_lcnphy_radio_2064_channel_tune_4313()
1651 mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g); in wlc_lcnphy_radio_2064_channel_tune_4313()
1653 mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2, in wlc_lcnphy_radio_2064_channel_tune_4313()
1656 mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune); in wlc_lcnphy_radio_2064_channel_tune_4313()
1658 mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4, in wlc_lcnphy_radio_2064_channel_tune_4313()
1661 write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1); in wlc_lcnphy_radio_2064_channel_tune_4313()
1663 pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044); in wlc_lcnphy_radio_2064_channel_tune_4313()
1664 pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B); in wlc_lcnphy_radio_2064_channel_tune_4313()
1666 or_radio_reg(pi, RADIO_2064_REG044, 0x07); in wlc_lcnphy_radio_2064_channel_tune_4313()
1668 or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1); in wlc_lcnphy_radio_2064_channel_tune_4313()
1672 fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq); in wlc_lcnphy_radio_2064_channel_tune_4313()
1673 if (pi->xtalfreq > 26000000) in wlc_lcnphy_radio_2064_channel_tune_4313()
1675 if (pi->xtalfreq > 52000000) in wlc_lcnphy_radio_2064_channel_tune_4313()
1686 qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ; in wlc_lcnphy_radio_2064_channel_tune_4313()
1688 write_radio_reg(pi, RADIO_2064_REG04F, 0x02); in wlc_lcnphy_radio_2064_channel_tune_4313()
1690 d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1; in wlc_lcnphy_radio_2064_channel_tune_4313()
1691 write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2))); in wlc_lcnphy_radio_2064_channel_tune_4313()
1692 write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5); in wlc_lcnphy_radio_2064_channel_tune_4313()
1695 write_radio_reg(pi, RADIO_2064_REG051, d16); in wlc_lcnphy_radio_2064_channel_tune_4313()
1699 mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0), in wlc_lcnphy_radio_2064_channel_tune_4313()
1702 or_radio_reg(pi, RADIO_2064_REG053, 0x10); in wlc_lcnphy_radio_2064_channel_tune_4313()
1703 write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff)); in wlc_lcnphy_radio_2064_channel_tune_4313()
1714 mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0), in wlc_lcnphy_radio_2064_channel_tune_4313()
1716 mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4), in wlc_lcnphy_radio_2064_channel_tune_4313()
1718 mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0), in wlc_lcnphy_radio_2064_channel_tune_4313()
1720 write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff); in wlc_lcnphy_radio_2064_channel_tune_4313()
1721 write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff); in wlc_lcnphy_radio_2064_channel_tune_4313()
1723 write_radio_reg(pi, RADIO_2064_REG040, 0xfb); in wlc_lcnphy_radio_2064_channel_tune_4313()
1725 write_radio_reg(pi, RADIO_2064_REG041, 0x9A); in wlc_lcnphy_radio_2064_channel_tune_4313()
1726 write_radio_reg(pi, RADIO_2064_REG042, 0xA3); in wlc_lcnphy_radio_2064_channel_tune_4313()
1727 write_radio_reg(pi, RADIO_2064_REG043, 0x0C); in wlc_lcnphy_radio_2064_channel_tune_4313()
1739 mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current); in wlc_lcnphy_radio_2064_channel_tune_4313()
1742 write_radio_reg(pi, RADIO_2064_REG03C, 0x8); in wlc_lcnphy_radio_2064_channel_tune_4313()
1744 write_radio_reg(pi, RADIO_2064_REG03C, 0x7); in wlc_lcnphy_radio_2064_channel_tune_4313()
1745 write_radio_reg(pi, RADIO_2064_REG03D, 0x3); in wlc_lcnphy_radio_2064_channel_tune_4313()
1747 mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c); in wlc_lcnphy_radio_2064_channel_tune_4313()
1750 wlc_2064_vco_cal(pi); in wlc_lcnphy_radio_2064_channel_tune_4313()
1752 write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup); in wlc_lcnphy_radio_2064_channel_tune_4313()
1753 write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr); in wlc_lcnphy_radio_2064_channel_tune_4313()
1754 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { in wlc_lcnphy_radio_2064_channel_tune_4313()
1755 write_radio_reg(pi, RADIO_2064_REG038, 3); in wlc_lcnphy_radio_2064_channel_tune_4313()
1756 write_radio_reg(pi, RADIO_2064_REG091, 7); in wlc_lcnphy_radio_2064_channel_tune_4313()
1759 if (!(pi->sh->boardflags & BFL_FEM)) { in wlc_lcnphy_radio_2064_channel_tune_4313()
1765 write_radio_reg(pi, RADIO_2064_REG02A, 0xf); in wlc_lcnphy_radio_2064_channel_tune_4313()
1766 write_radio_reg(pi, RADIO_2064_REG091, 0x3); in wlc_lcnphy_radio_2064_channel_tune_4313()
1767 write_radio_reg(pi, RADIO_2064_REG038, 0x3); in wlc_lcnphy_radio_2064_channel_tune_4313()
1769 write_radio_reg(pi, RADIO_2064_REG038, reg038[channel - 1]); in wlc_lcnphy_radio_2064_channel_tune_4313()
1774 wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm, s16 filt_type) in wlc_lcnphy_load_tx_iir_filter() argument
1827 write_phy_reg(pi, addr[j], in wlc_lcnphy_load_tx_iir_filter()
1841 write_phy_reg(pi, addr_ofdm[j], in wlc_lcnphy_load_tx_iir_filter()
1850 static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi) in wlc_lcnphy_get_pa_gain() argument
1854 pa_gain = (read_phy_reg(pi, 0x4fb) & in wlc_lcnphy_get_pa_gain()
1861 static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi, in wlc_lcnphy_set_tx_gain() argument
1864 u16 pa_gain = wlc_lcnphy_get_pa_gain(pi); in wlc_lcnphy_set_tx_gain()
1867 pi, 0x4b5, in wlc_lcnphy_set_tx_gain()
1872 mod_phy_reg(pi, 0x4fb, in wlc_lcnphy_set_tx_gain()
1877 pi, 0x4fc, in wlc_lcnphy_set_tx_gain()
1882 mod_phy_reg(pi, 0x4fd, in wlc_lcnphy_set_tx_gain()
1886 wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain); in wlc_lcnphy_set_tx_gain()
1888 wlc_lcnphy_enable_tx_gain_override(pi); in wlc_lcnphy_set_tx_gain()
1891 static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi) in wlc_lcnphy_get_bbmult() argument
1901 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_get_bbmult()
1906 static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0) in wlc_lcnphy_set_bbmult() argument
1916 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_set_bbmult()
1919 static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi) in wlc_lcnphy_clear_tx_power_offsets() argument
1930 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { in wlc_lcnphy_clear_tx_power_offsets()
1934 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_clear_tx_power_offsets()
1939 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_clear_tx_power_offsets()
1949 wlc_lcnphy_set_tssi_mux(struct brcms_phy *pi, enum lcnphy_tssi_mode pos) in wlc_lcnphy_set_tssi_mux() argument
1951 mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0); in wlc_lcnphy_set_tssi_mux()
1953 mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6); in wlc_lcnphy_set_tssi_mux()
1956 mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2); in wlc_lcnphy_set_tssi_mux()
1958 mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3); in wlc_lcnphy_set_tssi_mux()
1960 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_set_tssi_mux()
1961 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); in wlc_lcnphy_set_tssi_mux()
1963 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1); in wlc_lcnphy_set_tssi_mux()
1964 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); in wlc_lcnphy_set_tssi_mux()
1965 mod_radio_reg(pi, RADIO_2064_REG028, 0x1, 0x0); in wlc_lcnphy_set_tssi_mux()
1966 mod_radio_reg(pi, RADIO_2064_REG11A, 0x4, 1<<2); in wlc_lcnphy_set_tssi_mux()
1967 mod_radio_reg(pi, RADIO_2064_REG036, 0x10, 0x0); in wlc_lcnphy_set_tssi_mux()
1968 mod_radio_reg(pi, RADIO_2064_REG11A, 0x10, 1<<4); in wlc_lcnphy_set_tssi_mux()
1969 mod_radio_reg(pi, RADIO_2064_REG036, 0x3, 0x0); in wlc_lcnphy_set_tssi_mux()
1970 mod_radio_reg(pi, RADIO_2064_REG035, 0xff, 0x77); in wlc_lcnphy_set_tssi_mux()
1971 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0xe<<1); in wlc_lcnphy_set_tssi_mux()
1972 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1<<7); in wlc_lcnphy_set_tssi_mux()
1973 mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 1<<1); in wlc_lcnphy_set_tssi_mux()
1974 mod_radio_reg(pi, RADIO_2064_REG029, 0xf0, 0<<4); in wlc_lcnphy_set_tssi_mux()
1977 mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2); in wlc_lcnphy_set_tssi_mux()
1979 mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3); in wlc_lcnphy_set_tssi_mux()
1981 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_set_tssi_mux()
1982 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); in wlc_lcnphy_set_tssi_mux()
1984 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0); in wlc_lcnphy_set_tssi_mux()
1985 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); in wlc_lcnphy_set_tssi_mux()
1988 mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14); in wlc_lcnphy_set_tssi_mux()
1991 write_radio_reg(pi, RADIO_2064_REG07F, 1); in wlc_lcnphy_set_tssi_mux()
1992 mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2); in wlc_lcnphy_set_tssi_mux()
1993 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7); in wlc_lcnphy_set_tssi_mux()
1994 mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3); in wlc_lcnphy_set_tssi_mux()
1998 static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(struct brcms_phy *pi) in wlc_lcnphy_rfseq_tbl_adc_pwrup() argument
2001 N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2003 N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2005 N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2007 N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2009 N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2011 N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8)) in wlc_lcnphy_rfseq_tbl_adc_pwrup()
2019 static void wlc_lcnphy_pwrctrl_rssiparams(struct brcms_phy *pi) in wlc_lcnphy_pwrctrl_rssiparams() argument
2022 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_pwrctrl_rssiparams()
2029 mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0); in wlc_lcnphy_pwrctrl_rssiparams()
2031 mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1); in wlc_lcnphy_pwrctrl_rssiparams()
2033 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3); in wlc_lcnphy_pwrctrl_rssiparams()
2035 mod_phy_reg(pi, 0x4db, in wlc_lcnphy_pwrctrl_rssiparams()
2040 mod_phy_reg(pi, 0x4dc, in wlc_lcnphy_pwrctrl_rssiparams()
2045 mod_phy_reg(pi, 0x40a, in wlc_lcnphy_pwrctrl_rssiparams()
2050 mod_phy_reg(pi, 0x40b, in wlc_lcnphy_pwrctrl_rssiparams()
2055 mod_phy_reg(pi, 0x40c, in wlc_lcnphy_pwrctrl_rssiparams()
2060 mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5)); in wlc_lcnphy_pwrctrl_rssiparams()
2061 mod_radio_reg(pi, RADIO_2064_REG07C, (1 << 0), (1 << 0)); in wlc_lcnphy_pwrctrl_rssiparams()
2064 static void wlc_lcnphy_tssi_setup(struct brcms_phy *pi) in wlc_lcnphy_tssi_setup() argument
2071 if (pi->sh->boardflags & BFL_FEM) { in wlc_lcnphy_tssi_setup()
2084 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tssi_setup()
2089 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tssi_setup()
2092 mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0); in wlc_lcnphy_tssi_setup()
2094 mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2); in wlc_lcnphy_tssi_setup()
2096 mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4); in wlc_lcnphy_tssi_setup()
2098 wlc_lcnphy_set_tssi_mux(pi, mode); in wlc_lcnphy_tssi_setup()
2099 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14); in wlc_lcnphy_tssi_setup()
2101 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15); in wlc_lcnphy_tssi_setup()
2103 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5); in wlc_lcnphy_tssi_setup()
2105 mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0); in wlc_lcnphy_tssi_setup()
2107 mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0); in wlc_lcnphy_tssi_setup()
2109 mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12); in wlc_lcnphy_tssi_setup()
2111 mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8); in wlc_lcnphy_tssi_setup()
2113 mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0); in wlc_lcnphy_tssi_setup()
2115 mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8); in wlc_lcnphy_tssi_setup()
2117 mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0); in wlc_lcnphy_tssi_setup()
2119 mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8); in wlc_lcnphy_tssi_setup()
2121 mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6); in wlc_lcnphy_tssi_setup()
2123 mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0); in wlc_lcnphy_tssi_setup()
2125 wlc_lcnphy_clear_tx_power_offsets(pi); in wlc_lcnphy_tssi_setup()
2127 mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15); in wlc_lcnphy_tssi_setup()
2129 mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0); in wlc_lcnphy_tssi_setup()
2131 mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0); in wlc_lcnphy_tssi_setup()
2133 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_tssi_setup()
2134 mod_radio_reg(pi, RADIO_2064_REG028, 0xf, tssi_sel); in wlc_lcnphy_tssi_setup()
2135 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4); in wlc_lcnphy_tssi_setup()
2137 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, tssi_sel << 1); in wlc_lcnphy_tssi_setup()
2138 mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1); in wlc_lcnphy_tssi_setup()
2139 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3); in wlc_lcnphy_tssi_setup()
2142 write_radio_reg(pi, RADIO_2064_REG025, 0xc); in wlc_lcnphy_tssi_setup()
2144 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_tssi_setup()
2145 mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1); in wlc_lcnphy_tssi_setup()
2147 if (CHSPEC_IS2G(pi->radio_chanspec)) in wlc_lcnphy_tssi_setup()
2148 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1); in wlc_lcnphy_tssi_setup()
2150 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1); in wlc_lcnphy_tssi_setup()
2153 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) in wlc_lcnphy_tssi_setup()
2154 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1); in wlc_lcnphy_tssi_setup()
2156 mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2); in wlc_lcnphy_tssi_setup()
2158 mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0); in wlc_lcnphy_tssi_setup()
2160 mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3); in wlc_lcnphy_tssi_setup()
2162 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_tssi_setup()
2163 mod_phy_reg(pi, 0x4d7, in wlc_lcnphy_tssi_setup()
2166 rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi); in wlc_lcnphy_tssi_setup()
2172 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tssi_setup()
2174 mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2); in wlc_lcnphy_tssi_setup()
2176 mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2); in wlc_lcnphy_tssi_setup()
2178 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); in wlc_lcnphy_tssi_setup()
2180 mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2); in wlc_lcnphy_tssi_setup()
2182 mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8); in wlc_lcnphy_tssi_setup()
2184 mod_radio_reg(pi, RADIO_2064_REG035, 0xff, 0x0); in wlc_lcnphy_tssi_setup()
2185 mod_radio_reg(pi, RADIO_2064_REG036, 0x3, 0x0); in wlc_lcnphy_tssi_setup()
2186 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8); in wlc_lcnphy_tssi_setup()
2188 wlc_lcnphy_pwrctrl_rssiparams(pi); in wlc_lcnphy_tssi_setup()
2191 void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi) in wlc_lcnphy_tx_pwr_update_npt() argument
2194 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_tx_pwr_update_npt()
2196 tx_total = wlc_lcnphy_total_tx_frames(pi); in wlc_lcnphy_tx_pwr_update_npt()
2198 npt = wlc_lcnphy_get_tx_pwr_npt(pi); in wlc_lcnphy_tx_pwr_update_npt()
2204 pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi); in wlc_lcnphy_tx_pwr_update_npt()
2221 static void wlc_lcnphy_txpower_reset_npt(struct brcms_phy *pi) in wlc_lcnphy_txpower_reset_npt() argument
2223 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_txpower_reset_npt()
2224 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_txpower_reset_npt()
2231 void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi) in wlc_lcnphy_txpower_recalc_target() argument
2237 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_txpower_recalc_target()
2245 rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j])); in wlc_lcnphy_txpower_recalc_target()
2253 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_txpower_recalc_target()
2255 if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) { in wlc_lcnphy_txpower_recalc_target()
2256 wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min); in wlc_lcnphy_txpower_recalc_target()
2258 wlc_lcnphy_txpower_reset_npt(pi); in wlc_lcnphy_txpower_recalc_target()
2262 static void wlc_lcnphy_set_tx_pwr_soft_ctrl(struct brcms_phy *pi, s8 index) in wlc_lcnphy_set_tx_pwr_soft_ctrl() argument
2270 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2273 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2275 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2277 or_phy_reg(pi, 0x6da, 0x0040); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2287 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2293 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2296 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2298 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2300 mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2302 mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2304 mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2306 mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2309 mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2311 mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4); in wlc_lcnphy_set_tx_pwr_soft_ctrl()
2315 static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi) in wlc_lcnphy_tempcompensated_txpwrctrl() argument
2321 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_tempcompensated_txpwrctrl()
2323 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_tempcompensated_txpwrctrl()
2331 temp = (u16) wlc_lcnphy_tempsense(pi, 0); in wlc_lcnphy_tempcompensated_txpwrctrl()
2334 if (pi->tx_power_min != 0) in wlc_lcnphy_tempcompensated_txpwrctrl()
2335 delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min); in wlc_lcnphy_tempcompensated_txpwrctrl()
2354 && LCNREV_IS(pi->pubpi.phy_rev, 0)) in wlc_lcnphy_tempcompensated_txpwrctrl()
2360 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) in wlc_lcnphy_tempcompensated_txpwrctrl()
2366 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) in wlc_lcnphy_tempcompensated_txpwrctrl()
2375 static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(struct brcms_phy *pi, u16 mode) in wlc_lcnphy_set_tx_pwr_ctrl_mode() argument
2379 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && in wlc_lcnphy_set_tx_pwr_ctrl_mode()
2382 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) && in wlc_lcnphy_set_tx_pwr_ctrl_mode()
2388 void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode) in wlc_lcnphy_set_tx_pwr_ctrl() argument
2390 u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2392 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_set_tx_pwr_ctrl()
2394 mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode); in wlc_lcnphy_set_tx_pwr_ctrl()
2395 old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode); in wlc_lcnphy_set_tx_pwr_ctrl()
2397 mod_phy_reg(pi, 0x6da, (0x1 << 6), in wlc_lcnphy_set_tx_pwr_ctrl()
2400 mod_phy_reg(pi, 0x6a3, (0x1 << 4), in wlc_lcnphy_set_tx_pwr_ctrl()
2406 wlc_lcnphy_tx_pwr_update_npt(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2408 wlc_lcnphy_clear_tx_power_offsets(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2412 wlc_lcnphy_txpower_recalc_target(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2414 wlc_lcnphy_set_start_tx_pwr_idx(pi, in wlc_lcnphy_set_tx_pwr_ctrl()
2417 wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt); in wlc_lcnphy_set_tx_pwr_ctrl()
2418 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0); in wlc_lcnphy_set_tx_pwr_ctrl()
2421 wlc_lcnphy_total_tx_frames(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2423 wlc_lcnphy_disable_tx_gain_override(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2426 wlc_lcnphy_enable_tx_gain_override(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2428 mod_phy_reg(pi, 0x4a4, in wlc_lcnphy_set_tx_pwr_ctrl()
2431 index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); in wlc_lcnphy_set_tx_pwr_ctrl()
2432 wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index); in wlc_lcnphy_set_tx_pwr_ctrl()
2434 ((read_phy_reg(pi, in wlc_lcnphy_set_tx_pwr_ctrl()
2442 wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save) in wlc_lcnphy_tx_iqlo_loopback() argument
2448 read_radio_reg(pi, iqlo_loopback_rf_regs[i]); in wlc_lcnphy_tx_iqlo_loopback()
2450 mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); in wlc_lcnphy_tx_iqlo_loopback()
2451 mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); in wlc_lcnphy_tx_iqlo_loopback()
2453 mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11); in wlc_lcnphy_tx_iqlo_loopback()
2454 mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13); in wlc_lcnphy_tx_iqlo_loopback()
2456 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); in wlc_lcnphy_tx_iqlo_loopback()
2457 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); in wlc_lcnphy_tx_iqlo_loopback()
2459 mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0); in wlc_lcnphy_tx_iqlo_loopback()
2460 mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0); in wlc_lcnphy_tx_iqlo_loopback()
2462 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) in wlc_lcnphy_tx_iqlo_loopback()
2463 and_radio_reg(pi, RADIO_2064_REG03A, 0xFD); in wlc_lcnphy_tx_iqlo_loopback()
2465 and_radio_reg(pi, RADIO_2064_REG03A, 0xF9); in wlc_lcnphy_tx_iqlo_loopback()
2466 or_radio_reg(pi, RADIO_2064_REG11A, 0x1); in wlc_lcnphy_tx_iqlo_loopback()
2468 or_radio_reg(pi, RADIO_2064_REG036, 0x01); in wlc_lcnphy_tx_iqlo_loopback()
2469 or_radio_reg(pi, RADIO_2064_REG11A, 0x18); in wlc_lcnphy_tx_iqlo_loopback()
2472 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_tx_iqlo_loopback()
2473 if (CHSPEC_IS5G(pi->radio_chanspec)) in wlc_lcnphy_tx_iqlo_loopback()
2474 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0); in wlc_lcnphy_tx_iqlo_loopback()
2476 or_radio_reg(pi, RADIO_2064_REG03A, 1); in wlc_lcnphy_tx_iqlo_loopback()
2478 if (CHSPEC_IS5G(pi->radio_chanspec)) in wlc_lcnphy_tx_iqlo_loopback()
2479 mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1); in wlc_lcnphy_tx_iqlo_loopback()
2481 or_radio_reg(pi, RADIO_2064_REG03A, 0x3); in wlc_lcnphy_tx_iqlo_loopback()
2486 write_radio_reg(pi, RADIO_2064_REG025, 0xF); in wlc_lcnphy_tx_iqlo_loopback()
2487 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_tx_iqlo_loopback()
2488 if (CHSPEC_IS5G(pi->radio_chanspec)) in wlc_lcnphy_tx_iqlo_loopback()
2489 mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4); in wlc_lcnphy_tx_iqlo_loopback()
2491 mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6); in wlc_lcnphy_tx_iqlo_loopback()
2493 if (CHSPEC_IS5G(pi->radio_chanspec)) in wlc_lcnphy_tx_iqlo_loopback()
2494 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1); in wlc_lcnphy_tx_iqlo_loopback()
2496 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1); in wlc_lcnphy_tx_iqlo_loopback()
2501 write_radio_reg(pi, RADIO_2064_REG005, 0x8); in wlc_lcnphy_tx_iqlo_loopback()
2502 or_radio_reg(pi, RADIO_2064_REG112, 0x80); in wlc_lcnphy_tx_iqlo_loopback()
2505 or_radio_reg(pi, RADIO_2064_REG0FF, 0x10); in wlc_lcnphy_tx_iqlo_loopback()
2506 or_radio_reg(pi, RADIO_2064_REG11F, 0x44); in wlc_lcnphy_tx_iqlo_loopback()
2509 or_radio_reg(pi, RADIO_2064_REG00B, 0x7); in wlc_lcnphy_tx_iqlo_loopback()
2510 or_radio_reg(pi, RADIO_2064_REG113, 0x10); in wlc_lcnphy_tx_iqlo_loopback()
2513 write_radio_reg(pi, RADIO_2064_REG007, 0x1); in wlc_lcnphy_tx_iqlo_loopback()
2517 mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3); in wlc_lcnphy_tx_iqlo_loopback()
2518 write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff)); in wlc_lcnphy_tx_iqlo_loopback()
2519 or_radio_reg(pi, RADIO_2064_REG11F, 0x44); in wlc_lcnphy_tx_iqlo_loopback()
2522 or_radio_reg(pi, RADIO_2064_REG0FF, 0x10); in wlc_lcnphy_tx_iqlo_loopback()
2524 write_radio_reg(pi, RADIO_2064_REG012, 0x02); in wlc_lcnphy_tx_iqlo_loopback()
2525 or_radio_reg(pi, RADIO_2064_REG112, 0x06); in wlc_lcnphy_tx_iqlo_loopback()
2526 write_radio_reg(pi, RADIO_2064_REG036, 0x11); in wlc_lcnphy_tx_iqlo_loopback()
2527 write_radio_reg(pi, RADIO_2064_REG059, 0xcc); in wlc_lcnphy_tx_iqlo_loopback()
2528 write_radio_reg(pi, RADIO_2064_REG05C, 0x2e); in wlc_lcnphy_tx_iqlo_loopback()
2529 write_radio_reg(pi, RADIO_2064_REG078, 0xd7); in wlc_lcnphy_tx_iqlo_loopback()
2530 write_radio_reg(pi, RADIO_2064_REG092, 0x15); in wlc_lcnphy_tx_iqlo_loopback()
2533 static bool wlc_lcnphy_iqcal_wait(struct brcms_phy *pi) in wlc_lcnphy_iqcal_wait() argument
2537 while (wlc_lcnphy_iqcal_active(pi)) { in wlc_lcnphy_iqcal_wait()
2545 return (0 == wlc_lcnphy_iqcal_active(pi)); in wlc_lcnphy_iqcal_wait()
2549 wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save) in wlc_lcnphy_tx_iqlo_loopback_cleanup() argument
2553 and_phy_reg(pi, 0x44c, 0x0 >> 11); in wlc_lcnphy_tx_iqlo_loopback_cleanup()
2555 and_phy_reg(pi, 0x43b, 0xC); in wlc_lcnphy_tx_iqlo_loopback_cleanup()
2558 write_radio_reg(pi, iqlo_loopback_rf_regs[i], in wlc_lcnphy_tx_iqlo_loopback_cleanup()
2563 wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi, in wlc_lcnphy_tx_iqlo_cal() argument
2600 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_tx_iqlo_cal()
2606 save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db); in wlc_lcnphy_tx_iqlo_cal()
2607 save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); in wlc_lcnphy_tx_iqlo_cal()
2609 or_phy_reg(pi, 0x6da, 0x40); in wlc_lcnphy_tx_iqlo_cal()
2610 or_phy_reg(pi, 0x6db, 0x3); in wlc_lcnphy_tx_iqlo_cal()
2630 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2633 write_phy_reg(pi, 0x6da, 0xffff); in wlc_lcnphy_tx_iqlo_cal()
2634 mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3); in wlc_lcnphy_tx_iqlo_cal()
2636 tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_tx_iqlo_cal()
2638 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); in wlc_lcnphy_tx_iqlo_cal()
2640 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_lcnphy_tx_iqlo_cal()
2642 save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db); in wlc_lcnphy_tx_iqlo_cal()
2644 mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0); in wlc_lcnphy_tx_iqlo_cal()
2646 mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12); in wlc_lcnphy_tx_iqlo_cal()
2648 wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save); in wlc_lcnphy_tx_iqlo_cal()
2650 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); in wlc_lcnphy_tx_iqlo_cal()
2652 wlc_lcnphy_get_tx_gain(pi, &old_gains); in wlc_lcnphy_tx_iqlo_cal()
2656 wlc_lcnphy_set_tx_pwr_by_index(pi, in wlc_lcnphy_tx_iqlo_cal()
2658 wlc_lcnphy_get_tx_gain(pi, &temp_gains); in wlc_lcnphy_tx_iqlo_cal()
2665 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); in wlc_lcnphy_tx_iqlo_cal()
2684 wlc_lcnphy_set_tx_gain(pi, &cal_gains); in wlc_lcnphy_tx_iqlo_cal()
2686 write_phy_reg(pi, 0x453, 0xaa9); in wlc_lcnphy_tx_iqlo_cal()
2687 write_phy_reg(pi, 0x93d, 0xc0); in wlc_lcnphy_tx_iqlo_cal()
2689 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2694 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2700 if (pi->phy_tx_tone_freq) { in wlc_lcnphy_tx_iqlo_cal()
2702 wlc_lcnphy_stop_tx_tone(pi); in wlc_lcnphy_tx_iqlo_cal()
2704 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1); in wlc_lcnphy_tx_iqlo_cal()
2706 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1); in wlc_lcnphy_tx_iqlo_cal()
2709 write_phy_reg(pi, 0x6da, 0xffff); in wlc_lcnphy_tx_iqlo_cal()
2724 write_phy_reg(pi, 0x452, command_num); in wlc_lcnphy_tx_iqlo_cal()
2727 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2730 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2734 write_phy_reg(pi, 0x451, cal_cmds[i]); in wlc_lcnphy_tx_iqlo_cal()
2736 if (!wlc_lcnphy_iqcal_wait(pi)) in wlc_lcnphy_tx_iqlo_cal()
2739 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2742 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2747 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2749 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2758 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2765 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2769 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL, in wlc_lcnphy_tx_iqlo_cal()
2774 wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save); in wlc_lcnphy_tx_iqlo_cal()
2778 wlc_lcnphy_stop_tx_tone(pi); in wlc_lcnphy_tx_iqlo_cal()
2780 write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2); in wlc_lcnphy_tx_iqlo_cal()
2782 write_phy_reg(pi, 0x453, 0); in wlc_lcnphy_tx_iqlo_cal()
2785 wlc_lcnphy_set_tx_gain(pi, &old_gains); in wlc_lcnphy_tx_iqlo_cal()
2786 wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old); in wlc_lcnphy_tx_iqlo_cal()
2788 write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl); in wlc_lcnphy_tx_iqlo_cal()
2789 write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl); in wlc_lcnphy_tx_iqlo_cal()
2797 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_lcnphy_idle_tssi_est() local
2800 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_idle_tssi_est()
2801 u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112); in wlc_lcnphy_idle_tssi_est()
2803 read_radio_reg(pi, RADIO_2064_REG007) & 1; in wlc_lcnphy_idle_tssi_est()
2804 u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10; in wlc_lcnphy_idle_tssi_est()
2805 u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4; in wlc_lcnphy_idle_tssi_est()
2806 u8 SAVE_bbmult = wlc_lcnphy_get_bbmult(pi); in wlc_lcnphy_idle_tssi_est()
2808 read_phy_reg(pi, 0x4ab); /* idleTssi */ in wlc_lcnphy_idle_tssi_est()
2809 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & in wlc_lcnphy_idle_tssi_est()
2812 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_idle_tssi_est()
2813 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_lcnphy_idle_tssi_est()
2815 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi); in wlc_lcnphy_idle_tssi_est()
2816 wlc_lcnphy_get_tx_gain(pi, &old_gains); in wlc_lcnphy_idle_tssi_est()
2818 wlc_lcnphy_enable_tx_gain_override(pi); in wlc_lcnphy_idle_tssi_est()
2819 wlc_lcnphy_set_tx_pwr_by_index(pi, 127); in wlc_lcnphy_idle_tssi_est()
2820 write_radio_reg(pi, RADIO_2064_REG112, 0x6); in wlc_lcnphy_idle_tssi_est()
2821 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1); in wlc_lcnphy_idle_tssi_est()
2822 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4); in wlc_lcnphy_idle_tssi_est()
2823 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2); in wlc_lcnphy_idle_tssi_est()
2824 wlc_lcnphy_tssi_setup(pi); in wlc_lcnphy_idle_tssi_est()
2826 mod_phy_reg(pi, 0x4d7, (0x1 << 0), (1 << 0)); in wlc_lcnphy_idle_tssi_est()
2827 mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1 << 6)); in wlc_lcnphy_idle_tssi_est()
2829 wlc_lcnphy_set_bbmult(pi, 0x0); in wlc_lcnphy_idle_tssi_est()
2831 wlc_phy_do_dummy_tx(pi, true, OFF); in wlc_lcnphy_idle_tssi_est()
2832 read_phy_reg(pi, 0x4ab); /* idleTssi */ in wlc_lcnphy_idle_tssi_est()
2834 idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0)) in wlc_lcnphy_idle_tssi_est()
2847 mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0); in wlc_lcnphy_idle_tssi_est()
2849 mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12); in wlc_lcnphy_idle_tssi_est()
2851 wlc_lcnphy_set_bbmult(pi, SAVE_bbmult); in wlc_lcnphy_idle_tssi_est()
2852 wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old); in wlc_lcnphy_idle_tssi_est()
2853 wlc_lcnphy_set_tx_gain(pi, &old_gains); in wlc_lcnphy_idle_tssi_est()
2854 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); in wlc_lcnphy_idle_tssi_est()
2856 write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain); in wlc_lcnphy_idle_tssi_est()
2857 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch); in wlc_lcnphy_idle_tssi_est()
2858 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga); in wlc_lcnphy_idle_tssi_est()
2859 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en); in wlc_lcnphy_idle_tssi_est()
2860 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7); in wlc_lcnphy_idle_tssi_est()
2862 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_idle_tssi_est()
2865 static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode) in wlc_lcnphy_vbat_temp_sense_setup() argument
2878 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_vbat_temp_sense_setup()
2881 save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007); in wlc_lcnphy_vbat_temp_sense_setup()
2882 save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF); in wlc_lcnphy_vbat_temp_sense_setup()
2883 save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F); in wlc_lcnphy_vbat_temp_sense_setup()
2884 save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005); in wlc_lcnphy_vbat_temp_sense_setup()
2885 save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025); in wlc_lcnphy_vbat_temp_sense_setup()
2886 save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112); in wlc_lcnphy_vbat_temp_sense_setup()
2889 values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]); in wlc_lcnphy_vbat_temp_sense_setup()
2890 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & in wlc_lcnphy_vbat_temp_sense_setup()
2893 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_vbat_temp_sense_setup()
2894 save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4); in wlc_lcnphy_vbat_temp_sense_setup()
2896 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_lcnphy_vbat_temp_sense_setup()
2898 wlc_lcnphy_set_tx_pwr_by_index(pi, 127); in wlc_lcnphy_vbat_temp_sense_setup()
2899 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1); in wlc_lcnphy_vbat_temp_sense_setup()
2900 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4); in wlc_lcnphy_vbat_temp_sense_setup()
2901 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2); in wlc_lcnphy_vbat_temp_sense_setup()
2902 mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0); in wlc_lcnphy_vbat_temp_sense_setup()
2904 mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2); in wlc_lcnphy_vbat_temp_sense_setup()
2906 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14); in wlc_lcnphy_vbat_temp_sense_setup()
2908 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15); in wlc_lcnphy_vbat_temp_sense_setup()
2910 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5); in wlc_lcnphy_vbat_temp_sense_setup()
2912 mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0); in wlc_lcnphy_vbat_temp_sense_setup()
2914 mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2916 mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8); in wlc_lcnphy_vbat_temp_sense_setup()
2918 mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0); in wlc_lcnphy_vbat_temp_sense_setup()
2920 mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8); in wlc_lcnphy_vbat_temp_sense_setup()
2922 mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0); in wlc_lcnphy_vbat_temp_sense_setup()
2924 mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8); in wlc_lcnphy_vbat_temp_sense_setup()
2926 mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4); in wlc_lcnphy_vbat_temp_sense_setup()
2928 mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8); in wlc_lcnphy_vbat_temp_sense_setup()
2930 mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2932 mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2934 mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13); in wlc_lcnphy_vbat_temp_sense_setup()
2936 mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15); in wlc_lcnphy_vbat_temp_sense_setup()
2938 write_radio_reg(pi, RADIO_2064_REG025, 0xC); in wlc_lcnphy_vbat_temp_sense_setup()
2940 mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3); in wlc_lcnphy_vbat_temp_sense_setup()
2942 mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2); in wlc_lcnphy_vbat_temp_sense_setup()
2944 mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2); in wlc_lcnphy_vbat_temp_sense_setup()
2946 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2948 val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi); in wlc_lcnphy_vbat_temp_sense_setup()
2954 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_vbat_temp_sense_setup()
2956 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3); in wlc_lcnphy_vbat_temp_sense_setup()
2958 mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2963 mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5); in wlc_lcnphy_vbat_temp_sense_setup()
2965 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3); in wlc_lcnphy_vbat_temp_sense_setup()
2967 mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2975 mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0); in wlc_lcnphy_vbat_temp_sense_setup()
2977 mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2); in wlc_lcnphy_vbat_temp_sense_setup()
2979 mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1); in wlc_lcnphy_vbat_temp_sense_setup()
2981 mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12); in wlc_lcnphy_vbat_temp_sense_setup()
2983 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5); in wlc_lcnphy_vbat_temp_sense_setup()
2985 write_radio_reg(pi, RADIO_2064_REG112, 0x6); in wlc_lcnphy_vbat_temp_sense_setup()
2987 wlc_phy_do_dummy_tx(pi, true, OFF); in wlc_lcnphy_vbat_temp_sense_setup()
2988 if (!tempsense_done(pi)) in wlc_lcnphy_vbat_temp_sense_setup()
2991 write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007); in wlc_lcnphy_vbat_temp_sense_setup()
2992 write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF); in wlc_lcnphy_vbat_temp_sense_setup()
2993 write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F); in wlc_lcnphy_vbat_temp_sense_setup()
2994 write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005); in wlc_lcnphy_vbat_temp_sense_setup()
2995 write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025); in wlc_lcnphy_vbat_temp_sense_setup()
2996 write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112); in wlc_lcnphy_vbat_temp_sense_setup()
2998 write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]); in wlc_lcnphy_vbat_temp_sense_setup()
2999 wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index); in wlc_lcnphy_vbat_temp_sense_setup()
3001 write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn); in wlc_lcnphy_vbat_temp_sense_setup()
3003 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_vbat_temp_sense_setup()
3015 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_lcnphy_tx_pwr_ctrl_init() local
3017 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & in wlc_lcnphy_tx_pwr_ctrl_init()
3020 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_tx_pwr_ctrl_init()
3022 if (!pi->hwpwrctrl_capable) { in wlc_lcnphy_tx_pwr_ctrl_init()
3023 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_tx_pwr_ctrl_init()
3038 wlc_lcnphy_set_tx_gain(pi, &tx_gains); in wlc_lcnphy_tx_pwr_ctrl_init()
3039 wlc_lcnphy_set_bbmult(pi, bbmult); in wlc_lcnphy_tx_pwr_ctrl_init()
3040 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); in wlc_lcnphy_tx_pwr_ctrl_init()
3045 wlc_lcnphy_clear_tx_power_offsets(pi); in wlc_lcnphy_tx_pwr_ctrl_init()
3047 b0 = pi->txpa_2g[0]; in wlc_lcnphy_tx_pwr_ctrl_init()
3048 b1 = pi->txpa_2g[1]; in wlc_lcnphy_tx_pwr_ctrl_init()
3049 a1 = pi->txpa_2g[2]; in wlc_lcnphy_tx_pwr_ctrl_init()
3061 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tx_pwr_ctrl_init()
3064 mod_phy_reg(pi, 0x4d0, (0x1 << 0), (0) << 0); in wlc_lcnphy_tx_pwr_ctrl_init()
3065 mod_phy_reg(pi, 0x4d3, (0xff << 0), (0) << 0); in wlc_lcnphy_tx_pwr_ctrl_init()
3066 mod_phy_reg(pi, 0x4d3, (0xff << 8), (0) << 8); in wlc_lcnphy_tx_pwr_ctrl_init()
3067 mod_phy_reg(pi, 0x4d0, (0x1 << 4), (0) << 4); in wlc_lcnphy_tx_pwr_ctrl_init()
3068 mod_phy_reg(pi, 0x4d0, (0x1 << 2), (0) << 2); in wlc_lcnphy_tx_pwr_ctrl_init()
3070 mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7); in wlc_lcnphy_tx_pwr_ctrl_init()
3072 write_phy_reg(pi, 0x4a8, 10); in wlc_lcnphy_tx_pwr_ctrl_init()
3074 wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR); in wlc_lcnphy_tx_pwr_ctrl_init()
3076 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW); in wlc_lcnphy_tx_pwr_ctrl_init()
3079 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_tx_pwr_ctrl_init()
3082 static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain) in wlc_lcnphy_set_pa_gain() argument
3084 mod_phy_reg(pi, 0x4fb, in wlc_lcnphy_set_pa_gain()
3087 mod_phy_reg(pi, 0x4fd, in wlc_lcnphy_set_pa_gain()
3093 wlc_lcnphy_get_radio_loft(struct brcms_phy *pi, in wlc_lcnphy_get_radio_loft() argument
3096 *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089)); in wlc_lcnphy_get_radio_loft()
3097 *eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A)); in wlc_lcnphy_get_radio_loft()
3098 *fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B)); in wlc_lcnphy_get_radio_loft()
3099 *fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C)); in wlc_lcnphy_get_radio_loft()
3102 void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b) in wlc_lcnphy_set_tx_iqcc() argument
3115 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_set_tx_iqcc()
3118 void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq) in wlc_lcnphy_set_tx_locc() argument
3127 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_set_tx_locc()
3130 void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index) in wlc_lcnphy_set_tx_pwr_by_index() argument
3137 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_set_tx_pwr_by_index()
3146 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_lcnphy_set_tx_pwr_by_index()
3150 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_set_tx_pwr_by_index()
3155 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_set_tx_pwr_by_index()
3161 wlc_lcnphy_set_tx_gain(pi, &gains); in wlc_lcnphy_set_tx_pwr_by_index()
3162 wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f); in wlc_lcnphy_set_tx_pwr_by_index()
3165 wlc_lcnphy_set_bbmult(pi, bb_mult); in wlc_lcnphy_set_tx_pwr_by_index()
3167 wlc_lcnphy_enable_tx_gain_override(pi); in wlc_lcnphy_set_tx_pwr_by_index()
3169 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { in wlc_lcnphy_set_tx_pwr_by_index()
3173 wlc_lcnphy_set_tx_iqcc(pi, a, b); in wlc_lcnphy_set_tx_pwr_by_index()
3177 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_set_tx_pwr_by_index()
3179 wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs); in wlc_lcnphy_set_tx_pwr_by_index()
3183 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_set_tx_pwr_by_index()
3184 mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0); in wlc_lcnphy_set_tx_pwr_by_index()
3189 static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi) in wlc_lcnphy_clear_papd_comptable() argument
3204 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_clear_papd_comptable()
3208 void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable) in wlc_lcnphy_tx_pu() argument
3212 and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4))); in wlc_lcnphy_tx_pu()
3214 mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1); in wlc_lcnphy_tx_pu()
3216 and_phy_reg(pi, 0x44c, in wlc_lcnphy_tx_pu()
3222 and_phy_reg(pi, 0x44d, in wlc_lcnphy_tx_pu()
3224 mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2); in wlc_lcnphy_tx_pu()
3226 mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0)); in wlc_lcnphy_tx_pu()
3228 and_phy_reg(pi, 0x4f9, in wlc_lcnphy_tx_pu()
3231 and_phy_reg(pi, 0x4fa, in wlc_lcnphy_tx_pu()
3235 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1); in wlc_lcnphy_tx_pu()
3236 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1); in wlc_lcnphy_tx_pu()
3238 mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4); in wlc_lcnphy_tx_pu()
3239 mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6); in wlc_lcnphy_tx_pu()
3241 mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12); in wlc_lcnphy_tx_pu()
3242 mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14); in wlc_lcnphy_tx_pu()
3244 wlc_lcnphy_set_trsw_override(pi, true, false); in wlc_lcnphy_tx_pu()
3246 mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2); in wlc_lcnphy_tx_pu()
3247 mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2); in wlc_lcnphy_tx_pu()
3249 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_tx_pu()
3251 mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3); in wlc_lcnphy_tx_pu()
3252 mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3); in wlc_lcnphy_tx_pu()
3254 mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5); in wlc_lcnphy_tx_pu()
3255 mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5); in wlc_lcnphy_tx_pu()
3257 mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1); in wlc_lcnphy_tx_pu()
3258 mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1); in wlc_lcnphy_tx_pu()
3260 mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2); in wlc_lcnphy_tx_pu()
3261 mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2); in wlc_lcnphy_tx_pu()
3263 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); in wlc_lcnphy_tx_pu()
3264 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0); in wlc_lcnphy_tx_pu()
3267 mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3); in wlc_lcnphy_tx_pu()
3268 mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3); in wlc_lcnphy_tx_pu()
3270 mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5); in wlc_lcnphy_tx_pu()
3271 mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5); in wlc_lcnphy_tx_pu()
3273 mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1); in wlc_lcnphy_tx_pu()
3274 mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1); in wlc_lcnphy_tx_pu()
3276 mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2); in wlc_lcnphy_tx_pu()
3277 mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2); in wlc_lcnphy_tx_pu()
3279 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0); in wlc_lcnphy_tx_pu()
3280 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0); in wlc_lcnphy_tx_pu()
3286 wlc_lcnphy_run_samples(struct brcms_phy *pi, in wlc_lcnphy_run_samples() argument
3291 or_phy_reg(pi, 0x6da, 0x8080); in wlc_lcnphy_run_samples()
3293 mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0); in wlc_lcnphy_run_samples()
3296 mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0); in wlc_lcnphy_run_samples()
3298 mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0); in wlc_lcnphy_run_samples()
3302 and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15)); in wlc_lcnphy_run_samples()
3303 or_phy_reg(pi, 0x453, (0x1 << 15)); in wlc_lcnphy_run_samples()
3305 write_phy_reg(pi, 0x63f, 1); in wlc_lcnphy_run_samples()
3306 wlc_lcnphy_tx_pu(pi, 1); in wlc_lcnphy_run_samples()
3309 or_radio_reg(pi, RADIO_2064_REG112, 0x6); in wlc_lcnphy_run_samples()
3312 void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode) in wlc_lcnphy_deaf_mode() argument
3316 phybw40 = CHSPEC_IS40(pi->radio_chanspec); in wlc_lcnphy_deaf_mode()
3318 mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5); in wlc_lcnphy_deaf_mode()
3319 mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9); in wlc_lcnphy_deaf_mode()
3322 mod_phy_reg((pi), 0x410, in wlc_lcnphy_deaf_mode()
3326 pi->radio_chanspec)) ? (!mode) : 0) << in wlc_lcnphy_deaf_mode()
3328 mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7); in wlc_lcnphy_deaf_mode()
3333 wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val, in wlc_lcnphy_start_tx_tone() argument
3344 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_start_tx_tone()
3346 pi->phy_tx_tone_freq = f_kHz; in wlc_lcnphy_start_tx_tone()
3348 wlc_lcnphy_deaf_mode(pi, true); in wlc_lcnphy_start_tx_tone()
3352 write_phy_reg(pi, 0x942, 0x2); in wlc_lcnphy_start_tx_tone()
3353 write_phy_reg(pi, 0x93b, 0x0); in wlc_lcnphy_start_tx_tone()
3354 write_phy_reg(pi, 0x93c, 0x0); in wlc_lcnphy_start_tx_tone()
3355 wlc_lcnphy_txrx_spur_avoidance_mode(pi, false); in wlc_lcnphy_start_tx_tone()
3382 mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0); in wlc_lcnphy_start_tx_tone()
3384 mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3); in wlc_lcnphy_start_tx_tone()
3391 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_start_tx_tone()
3393 wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode); in wlc_lcnphy_start_tx_tone()
3396 void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi) in wlc_lcnphy_stop_tx_tone() argument
3399 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_stop_tx_tone()
3401 pi->phy_tx_tone_freq = 0; in wlc_lcnphy_stop_tx_tone()
3403 write_phy_reg(pi, 0x942, 0x7); in wlc_lcnphy_stop_tx_tone()
3404 write_phy_reg(pi, 0x93b, 0x2017); in wlc_lcnphy_stop_tx_tone()
3405 write_phy_reg(pi, 0x93c, 0x27c5); in wlc_lcnphy_stop_tx_tone()
3406 wlc_lcnphy_txrx_spur_avoidance_mode(pi, true); in wlc_lcnphy_stop_tx_tone()
3409 playback_status = read_phy_reg(pi, 0x644); in wlc_lcnphy_stop_tx_tone()
3411 wlc_lcnphy_tx_pu(pi, 0); in wlc_lcnphy_stop_tx_tone()
3412 mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1); in wlc_lcnphy_stop_tx_tone()
3414 mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15); in wlc_lcnphy_stop_tx_tone()
3416 mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0); in wlc_lcnphy_stop_tx_tone()
3418 mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3); in wlc_lcnphy_stop_tx_tone()
3420 mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7); in wlc_lcnphy_stop_tx_tone()
3422 and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9); in wlc_lcnphy_stop_tx_tone()
3424 wlc_lcnphy_deaf_mode(pi, false); in wlc_lcnphy_stop_tx_tone()
3428 wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x, s16 coeff_y) in wlc_lcnphy_set_cc() argument
3435 wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y); in wlc_lcnphy_set_cc()
3439 wlc_lcnphy_set_tx_locc(pi, di0dq0); in wlc_lcnphy_set_cc()
3447 write_radio_reg(pi, RADIO_2064_REG089, data_rf); in wlc_lcnphy_set_cc()
3453 write_radio_reg(pi, RADIO_2064_REG08A, data_rf); in wlc_lcnphy_set_cc()
3461 write_radio_reg(pi, RADIO_2064_REG08B, data_rf); in wlc_lcnphy_set_cc()
3467 write_radio_reg(pi, RADIO_2064_REG08C, data_rf); in wlc_lcnphy_set_cc()
3473 wlc_lcnphy_get_cc(struct brcms_phy *pi, int cal_type) in wlc_lcnphy_get_cc() argument
3482 wlc_lcnphy_get_tx_iqcc(pi, &a, &b); in wlc_lcnphy_get_cc()
3487 didq = wlc_lcnphy_get_tx_locc(pi); in wlc_lcnphy_get_cc()
3494 wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq); in wlc_lcnphy_get_cc()
3499 wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq); in wlc_lcnphy_get_cc()
3508 wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo, u16 thresh, in wlc_lcnphy_samp_cap() argument
3515 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_samp_cap()
3518 old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); in wlc_lcnphy_samp_cap()
3520 curval1 = bcma_read16(pi->d11core, D11REGOFFS(psm_corectlsts)); in wlc_lcnphy_samp_cap()
3522 bcma_write16(pi->d11core, D11REGOFFS(psm_corectlsts), in wlc_lcnphy_samp_cap()
3525 bcma_write16(pi->d11core, D11REGOFFS(smpl_clct_strptr), 0x7E00); in wlc_lcnphy_samp_cap()
3526 bcma_write16(pi->d11core, D11REGOFFS(smpl_clct_stpptr), 0x8000); in wlc_lcnphy_samp_cap()
3528 curval2 = bcma_read16(pi->d11core, D11REGOFFS(psm_phy_hdr_param)); in wlc_lcnphy_samp_cap()
3529 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), in wlc_lcnphy_samp_cap()
3532 write_phy_reg(pi, 0x555, 0x0); in wlc_lcnphy_samp_cap()
3533 write_phy_reg(pi, 0x5a6, 0x5); in wlc_lcnphy_samp_cap()
3535 write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6)); in wlc_lcnphy_samp_cap()
3536 write_phy_reg(pi, 0x5cf, 3); in wlc_lcnphy_samp_cap()
3537 write_phy_reg(pi, 0x5a5, 0x3); in wlc_lcnphy_samp_cap()
3538 write_phy_reg(pi, 0x583, 0x0); in wlc_lcnphy_samp_cap()
3539 write_phy_reg(pi, 0x584, 0x0); in wlc_lcnphy_samp_cap()
3540 write_phy_reg(pi, 0x585, 0x0fff); in wlc_lcnphy_samp_cap()
3541 write_phy_reg(pi, 0x586, 0x0000); in wlc_lcnphy_samp_cap()
3543 write_phy_reg(pi, 0x580, 0x4501); in wlc_lcnphy_samp_cap()
3545 sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); in wlc_lcnphy_samp_cap()
3546 write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008)); in wlc_lcnphy_samp_cap()
3547 stpptr = bcma_read16(pi->d11core, D11REGOFFS(smpl_clct_stpptr)); in wlc_lcnphy_samp_cap()
3548 curptr = bcma_read16(pi->d11core, D11REGOFFS(smpl_clct_curptr)); in wlc_lcnphy_samp_cap()
3551 curptr = bcma_read16(pi->d11core, D11REGOFFS(smpl_clct_curptr)); in wlc_lcnphy_samp_cap()
3555 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), 0x2); in wlc_lcnphy_samp_cap()
3557 bcma_write32(pi->d11core, D11REGOFFS(tplatewrptr), strptr); in wlc_lcnphy_samp_cap()
3559 val = bcma_read32(pi->d11core, D11REGOFFS(tplatewrdata)); in wlc_lcnphy_samp_cap()
3583 write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl); in wlc_lcnphy_samp_cap()
3584 bcma_write16(pi->d11core, D11REGOFFS(psm_phy_hdr_param), curval2); in wlc_lcnphy_samp_cap()
3585 bcma_write16(pi->d11core, D11REGOFFS(psm_corectlsts), curval1); in wlc_lcnphy_samp_cap()
3589 wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels, in wlc_lcnphy_a1() argument
3617 phy_c26 = read_phy_reg(pi, 0x6da); in wlc_lcnphy_a1()
3618 phy_c27 = read_phy_reg(pi, 0x6db); in wlc_lcnphy_a1()
3619 phy_c31 = read_radio_reg(pi, RADIO_2064_REG026); in wlc_lcnphy_a1()
3620 write_phy_reg(pi, 0x93d, 0xC0); in wlc_lcnphy_a1()
3622 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0); in wlc_lcnphy_a1()
3623 write_phy_reg(pi, 0x6da, 0xffff); in wlc_lcnphy_a1()
3624 or_phy_reg(pi, 0x6db, 0x3); in wlc_lcnphy_a1()
3626 wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32); in wlc_lcnphy_a1()
3628 phy_c28 = read_phy_reg(pi, 0x938); in wlc_lcnphy_a1()
3629 phy_c29 = read_phy_reg(pi, 0x4d7); in wlc_lcnphy_a1()
3630 phy_c30 = read_phy_reg(pi, 0x4d8); in wlc_lcnphy_a1()
3631 or_phy_reg(pi, 0x938, 0x1 << 2); in wlc_lcnphy_a1()
3632 or_phy_reg(pi, 0x4d7, 0x1 << 2); in wlc_lcnphy_a1()
3633 or_phy_reg(pi, 0x4d7, 0x1 << 3); in wlc_lcnphy_a1()
3634 mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12); in wlc_lcnphy_a1()
3635 or_phy_reg(pi, 0x4d8, 1 << 0); in wlc_lcnphy_a1()
3636 or_phy_reg(pi, 0x4d8, 1 << 1); in wlc_lcnphy_a1()
3637 mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2); in wlc_lcnphy_a1()
3638 mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12); in wlc_lcnphy_a1()
3656 phy_c3 = wlc_lcnphy_get_cc(pi, cal_type); in wlc_lcnphy_a1()
3665 wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16); in wlc_lcnphy_a1()
3685 phy_c9 = read_phy_reg(pi, 0x93d); in wlc_lcnphy_a1()
3691 write_radio_reg(pi, RADIO_2064_REG026, in wlc_lcnphy_a1()
3696 wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2); in wlc_lcnphy_a1()
3729 wlc_lcnphy_set_cc(pi, cal_type, phy_c11, in wlc_lcnphy_a1()
3732 wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2); in wlc_lcnphy_a1()
3766 wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16); in wlc_lcnphy_a1()
3771 wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32); in wlc_lcnphy_a1()
3772 wlc_lcnphy_stop_tx_tone(pi); in wlc_lcnphy_a1()
3773 write_phy_reg(pi, 0x6da, phy_c26); in wlc_lcnphy_a1()
3774 write_phy_reg(pi, 0x6db, phy_c27); in wlc_lcnphy_a1()
3775 write_phy_reg(pi, 0x938, phy_c28); in wlc_lcnphy_a1()
3776 write_phy_reg(pi, 0x4d7, phy_c29); in wlc_lcnphy_a1()
3777 write_phy_reg(pi, 0x4d8, phy_c30); in wlc_lcnphy_a1()
3778 write_radio_reg(pi, RADIO_2064_REG026, phy_c31); in wlc_lcnphy_a1()
3784 void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b) in wlc_lcnphy_get_tx_iqcc() argument
3794 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_get_tx_iqcc()
3800 static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi) in wlc_lcnphy_tx_iqlo_soft_cal_full() argument
3802 wlc_lcnphy_set_cc(pi, 0, 0, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3803 wlc_lcnphy_set_cc(pi, 2, 0, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3804 wlc_lcnphy_set_cc(pi, 3, 0, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3805 wlc_lcnphy_set_cc(pi, 4, 0, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3807 wlc_lcnphy_a1(pi, 4, 0, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3808 wlc_lcnphy_a1(pi, 3, 0, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3809 wlc_lcnphy_a1(pi, 2, 3, 2); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3810 wlc_lcnphy_a1(pi, 0, 5, 8); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3811 wlc_lcnphy_a1(pi, 2, 2, 1); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3812 wlc_lcnphy_a1(pi, 0, 4, 3); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3814 wlc_lcnphy_get_cc(pi, 0); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3815 wlc_lcnphy_get_cc(pi, 2); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3816 wlc_lcnphy_get_cc(pi, 3); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3817 wlc_lcnphy_get_cc(pi, 4); in wlc_lcnphy_tx_iqlo_soft_cal_full()
3820 u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi) in wlc_lcnphy_get_tx_locc() argument
3830 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_get_tx_locc()
3835 static void wlc_lcnphy_txpwrtbl_iqlo_cal(struct brcms_phy *pi) in wlc_lcnphy_txpwrtbl_iqlo_cal() argument
3843 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3846 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_txpwrtbl_iqlo_cal()
3848 wlc_lcnphy_get_tx_gain(pi, &old_gains); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3849 save_pa_gain = wlc_lcnphy_get_pa_gain(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3851 save_bb_mult = wlc_lcnphy_get_bbmult(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3854 SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3856 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3862 wlc_lcnphy_set_tx_gain(pi, &target_gains); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3864 if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) { in wlc_lcnphy_txpwrtbl_iqlo_cal()
3866 wlc_lcnphy_set_tx_pwr_by_index(pi, 30); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3868 wlc_lcnphy_tx_iqlo_cal(pi, &target_gains, in wlc_lcnphy_txpwrtbl_iqlo_cal()
3873 wlc_lcnphy_set_tx_pwr_by_index(pi, 16); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3874 wlc_lcnphy_tx_iqlo_soft_cal_full(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3877 wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3879 if (CHSPEC_IS5G(pi->radio_chanspec)) { in wlc_lcnphy_txpwrtbl_iqlo_cal()
3891 if (LCNREV_IS(pi->pubpi.phy_rev, 1) in wlc_lcnphy_txpwrtbl_iqlo_cal()
3896 wlc_lcnphy_set_tx_pwr_by_index(pi, 16); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3897 wlc_lcnphy_tx_iqlo_cal(pi, &target_gains, in wlc_lcnphy_txpwrtbl_iqlo_cal()
3900 wlc_lcnphy_tx_iqlo_soft_cal_full(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3904 wlc_lcnphy_get_tx_iqcc(pi, &a, &b); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3906 didq = wlc_lcnphy_get_tx_locc(pi); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3918 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3921 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3925 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3936 wlc_lcnphy_set_bbmult(pi, save_bb_mult); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3937 wlc_lcnphy_set_pa_gain(pi, save_pa_gain); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3938 wlc_lcnphy_set_tx_gain(pi, &old_gains); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3941 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3943 wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex); in wlc_lcnphy_txpwrtbl_iqlo_cal()
3946 s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode) in wlc_lcnphy_tempsense_new() argument
3953 suspend = (0 == (bcma_read32(pi->d11core, in wlc_lcnphy_tempsense_new()
3957 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_tempsense_new()
3958 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); in wlc_lcnphy_tempsense_new()
3960 tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF; in wlc_lcnphy_tempsense_new()
3961 tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF; in wlc_lcnphy_tempsense_new()
3977 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); in wlc_lcnphy_tempsense_new()
3980 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); in wlc_lcnphy_tempsense_new()
3983 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_tempsense_new()
3988 u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode) in wlc_lcnphy_tempsense() argument
3993 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_tempsense()
3994 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_tempsense()
3997 suspend = (0 == (bcma_read32(pi->d11core, in wlc_lcnphy_tempsense()
4001 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_tempsense()
4002 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE); in wlc_lcnphy_tempsense()
4004 tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF; in wlc_lcnphy_tempsense()
4005 tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF; in wlc_lcnphy_tempsense()
4012 if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) { in wlc_lcnphy_tempsense()
4031 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl); in wlc_lcnphy_tempsense()
4035 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); in wlc_lcnphy_tempsense()
4038 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); in wlc_lcnphy_tempsense()
4041 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_tempsense()
4046 s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode) in wlc_lcnphy_tempsense_degree() argument
4048 s32 degree = wlc_lcnphy_tempsense_new(pi, mode); in wlc_lcnphy_tempsense_degree()
4056 s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode) in wlc_lcnphy_vbatsense() argument
4063 suspend = (0 == (bcma_read32(pi->d11core, in wlc_lcnphy_vbatsense()
4067 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_vbatsense()
4068 wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE); in wlc_lcnphy_vbatsense()
4071 vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF; in wlc_lcnphy_vbatsense()
4083 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_vbatsense()
4088 static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode) in wlc_lcnphy_afe_clk_init() argument
4091 phybw40 = CHSPEC_IS40(pi->radio_chanspec); in wlc_lcnphy_afe_clk_init()
4093 mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7); in wlc_lcnphy_afe_clk_init()
4097 write_phy_reg(pi, 0x6d0, 0x7); in wlc_lcnphy_afe_clk_init()
4099 wlc_lcnphy_toggle_afe_pwdn(pi); in wlc_lcnphy_afe_clk_init()
4102 static void wlc_lcnphy_temp_adj(struct brcms_phy *pi) in wlc_lcnphy_temp_adj() argument
4106 static void wlc_lcnphy_glacial_timer_based_cal(struct brcms_phy *pi) in wlc_lcnphy_glacial_timer_based_cal() argument
4110 u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_glacial_timer_based_cal()
4111 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_glacial_timer_based_cal()
4112 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & in wlc_lcnphy_glacial_timer_based_cal()
4115 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_glacial_timer_based_cal()
4116 wlc_lcnphy_deaf_mode(pi, true); in wlc_lcnphy_glacial_timer_based_cal()
4117 pi->phy_lastcal = pi->sh->now; in wlc_lcnphy_glacial_timer_based_cal()
4118 pi->phy_forcecal = false; in wlc_lcnphy_glacial_timer_based_cal()
4121 wlc_lcnphy_txpwrtbl_iqlo_cal(pi); in wlc_lcnphy_glacial_timer_based_cal()
4123 wlc_lcnphy_set_tx_pwr_by_index(pi, index); in wlc_lcnphy_glacial_timer_based_cal()
4124 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl); in wlc_lcnphy_glacial_timer_based_cal()
4125 wlc_lcnphy_deaf_mode(pi, false); in wlc_lcnphy_glacial_timer_based_cal()
4127 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_glacial_timer_based_cal()
4131 static void wlc_lcnphy_periodic_cal(struct brcms_phy *pi) in wlc_lcnphy_periodic_cal() argument
4134 u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_periodic_cal()
4139 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_periodic_cal()
4141 pi->phy_lastcal = pi->sh->now; in wlc_lcnphy_periodic_cal()
4142 pi->phy_forcecal = false; in wlc_lcnphy_periodic_cal()
4143 pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec); in wlc_lcnphy_periodic_cal()
4146 suspend = (0 == (bcma_read32(pi->d11core, D11REGOFFS(maccontrol)) & in wlc_lcnphy_periodic_cal()
4149 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); in wlc_lcnphy_periodic_cal()
4150 wlapi_suspend_mac_and_wait(pi->sh->physhim); in wlc_lcnphy_periodic_cal()
4153 wlc_lcnphy_deaf_mode(pi, true); in wlc_lcnphy_periodic_cal()
4155 wlc_lcnphy_txpwrtbl_iqlo_cal(pi); in wlc_lcnphy_periodic_cal()
4157 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) in wlc_lcnphy_periodic_cal()
4158 wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40); in wlc_lcnphy_periodic_cal()
4160 wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127); in wlc_lcnphy_periodic_cal()
4162 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { in wlc_lcnphy_periodic_cal()
4164 wlc_lcnphy_idle_tssi_est((struct brcms_phy_pub *) pi); in wlc_lcnphy_periodic_cal()
4166 b0 = pi->txpa_2g[0]; in wlc_lcnphy_periodic_cal()
4167 b1 = pi->txpa_2g[1]; in wlc_lcnphy_periodic_cal()
4168 a1 = pi->txpa_2g[2]; in wlc_lcnphy_periodic_cal()
4179 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_periodic_cal()
4184 wlc_lcnphy_set_tx_pwr_by_index(pi, index); in wlc_lcnphy_periodic_cal()
4185 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl); in wlc_lcnphy_periodic_cal()
4186 wlc_lcnphy_deaf_mode(pi, false); in wlc_lcnphy_periodic_cal()
4188 wlapi_enable_mac(pi->sh->physhim); in wlc_lcnphy_periodic_cal()
4191 void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode) in wlc_lcnphy_calib_modes() argument
4195 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_calib_modes()
4201 wlc_lcnphy_periodic_cal(pi); in wlc_lcnphy_calib_modes()
4204 wlc_lcnphy_periodic_cal(pi); in wlc_lcnphy_calib_modes()
4207 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { in wlc_lcnphy_calib_modes()
4208 temp_new = wlc_lcnphy_tempsense(pi, 0); in wlc_lcnphy_calib_modes()
4214 wlc_lcnphy_glacial_timer_based_cal(pi); in wlc_lcnphy_calib_modes()
4215 wlc_2064_vco_cal(pi); in wlc_lcnphy_calib_modes()
4223 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) in wlc_lcnphy_calib_modes()
4225 (struct brcms_phy_pub *) pi); in wlc_lcnphy_calib_modes()
4230 void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr) in wlc_lcnphy_get_tssi() argument
4234 status = (read_phy_reg(pi, 0x4ab)); in wlc_lcnphy_get_tssi()
4235 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) && in wlc_lcnphy_get_tssi()
4237 *ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0)) in wlc_lcnphy_get_tssi()
4240 if (wlc_phy_tpc_isenabled_lcnphy(pi)) in wlc_lcnphy_get_tssi()
4241 cck_offset = pi->tx_power_offset[TXP_FIRST_CCK]; in wlc_lcnphy_get_tssi()
4252 void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi) in wlc_phy_cal_init_lcnphy() argument
4262 struct brcms_phy *pi = container_of(ppi, struct brcms_phy, pubpi_ro); in wlc_lcnphy_tx_power_adjustment() local
4263 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_tx_power_adjustment()
4264 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_lcnphy_tx_power_adjustment()
4265 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && in wlc_lcnphy_tx_power_adjustment()
4267 index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); in wlc_lcnphy_tx_power_adjustment()
4269 mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0); in wlc_lcnphy_tx_power_adjustment()
4272 (s8)((read_phy_reg(pi, 0x4a9) & 0xFF) / 2); in wlc_lcnphy_tx_power_adjustment()
4277 wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi, in wlc_lcnphy_load_tx_gain_table() argument
4286 if (pi->sh->boardflags & BFL_FEM) in wlc_lcnphy_load_tx_gain_table()
4298 if (pi->sh->boardflags & BFL_FEM) in wlc_lcnphy_load_tx_gain_table()
4305 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_load_tx_gain_table()
4309 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_load_tx_gain_table()
4313 static void wlc_lcnphy_load_rfpower(struct brcms_phy *pi) in wlc_lcnphy_load_rfpower() argument
4328 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_load_rfpower()
4333 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_load_rfpower()
4358 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_load_rfpower()
4362 static void wlc_lcnphy_bu_tweaks(struct brcms_phy *pi) in wlc_lcnphy_bu_tweaks() argument
4364 or_phy_reg(pi, 0x805, 0x1); in wlc_lcnphy_bu_tweaks()
4366 mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0); in wlc_lcnphy_bu_tweaks()
4368 mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0); in wlc_lcnphy_bu_tweaks()
4370 write_phy_reg(pi, 0x414, 0x1e10); in wlc_lcnphy_bu_tweaks()
4371 write_phy_reg(pi, 0x415, 0x0640); in wlc_lcnphy_bu_tweaks()
4373 mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8); in wlc_lcnphy_bu_tweaks()
4375 or_phy_reg(pi, 0x44a, 0x44); in wlc_lcnphy_bu_tweaks()
4376 write_phy_reg(pi, 0x44a, 0x80); in wlc_lcnphy_bu_tweaks()
4377 mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0); in wlc_lcnphy_bu_tweaks()
4379 mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0); in wlc_lcnphy_bu_tweaks()
4381 if (!(pi->sh->boardrev < 0x1204)) in wlc_lcnphy_bu_tweaks()
4382 mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0); in wlc_lcnphy_bu_tweaks()
4384 write_phy_reg(pi, 0x7d6, 0x0902); in wlc_lcnphy_bu_tweaks()
4385 mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0); in wlc_lcnphy_bu_tweaks()
4387 mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4); in wlc_lcnphy_bu_tweaks()
4389 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { in wlc_lcnphy_bu_tweaks()
4390 mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0); in wlc_lcnphy_bu_tweaks()
4392 mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0); in wlc_lcnphy_bu_tweaks()
4394 mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0); in wlc_lcnphy_bu_tweaks()
4396 mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0); in wlc_lcnphy_bu_tweaks()
4398 mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2); in wlc_lcnphy_bu_tweaks()
4400 mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4); in wlc_lcnphy_bu_tweaks()
4401 mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0); in wlc_lcnphy_bu_tweaks()
4402 mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90); in wlc_lcnphy_bu_tweaks()
4403 mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2); in wlc_lcnphy_bu_tweaks()
4404 mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0); in wlc_lcnphy_bu_tweaks()
4406 mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2); in wlc_lcnphy_bu_tweaks()
4408 wlc_lcnphy_clear_tx_power_offsets(pi); in wlc_lcnphy_bu_tweaks()
4409 mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6); in wlc_lcnphy_bu_tweaks()
4414 static void wlc_lcnphy_rcal(struct brcms_phy *pi) in wlc_lcnphy_rcal() argument
4418 and_radio_reg(pi, RADIO_2064_REG05B, 0xfD); in wlc_lcnphy_rcal()
4420 or_radio_reg(pi, RADIO_2064_REG004, 0x40); in wlc_lcnphy_rcal()
4421 or_radio_reg(pi, RADIO_2064_REG120, 0x10); in wlc_lcnphy_rcal()
4423 or_radio_reg(pi, RADIO_2064_REG078, 0x80); in wlc_lcnphy_rcal()
4424 or_radio_reg(pi, RADIO_2064_REG129, 0x02); in wlc_lcnphy_rcal()
4426 or_radio_reg(pi, RADIO_2064_REG057, 0x01); in wlc_lcnphy_rcal()
4428 or_radio_reg(pi, RADIO_2064_REG05B, 0x02); in wlc_lcnphy_rcal()
4430 SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000); in wlc_lcnphy_rcal()
4432 if (wlc_radio_2064_rcal_done(pi)) { in wlc_lcnphy_rcal()
4433 rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C); in wlc_lcnphy_rcal()
4437 and_radio_reg(pi, RADIO_2064_REG05B, 0xfD); in wlc_lcnphy_rcal()
4439 and_radio_reg(pi, RADIO_2064_REG057, 0xFE); in wlc_lcnphy_rcal()
4442 static void wlc_lcnphy_rc_cal(struct brcms_phy *pi) in wlc_lcnphy_rc_cal() argument
4448 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) in wlc_lcnphy_rc_cal()
4453 write_phy_reg(pi, 0x933, flt_val); in wlc_lcnphy_rc_cal()
4454 write_phy_reg(pi, 0x934, flt_val); in wlc_lcnphy_rc_cal()
4455 write_phy_reg(pi, 0x935, flt_val); in wlc_lcnphy_rc_cal()
4456 write_phy_reg(pi, 0x936, flt_val); in wlc_lcnphy_rc_cal()
4457 write_phy_reg(pi, 0x937, (flt_val & 0x1FF)); in wlc_lcnphy_rc_cal()
4462 static void wlc_radio_2064_init(struct brcms_phy *pi) in wlc_radio_2064_init() argument
4470 if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a) in wlc_radio_2064_init()
4471 write_radio_reg(pi, in wlc_radio_2064_init()
4476 write_radio_reg(pi, in wlc_radio_2064_init()
4481 write_radio_reg(pi, RADIO_2064_REG032, 0x62); in wlc_radio_2064_init()
4482 write_radio_reg(pi, RADIO_2064_REG033, 0x19); in wlc_radio_2064_init()
4484 write_radio_reg(pi, RADIO_2064_REG090, 0x10); in wlc_radio_2064_init()
4486 write_radio_reg(pi, RADIO_2064_REG010, 0x00); in wlc_radio_2064_init()
4488 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { in wlc_radio_2064_init()
4490 write_radio_reg(pi, RADIO_2064_REG060, 0x7f); in wlc_radio_2064_init()
4491 write_radio_reg(pi, RADIO_2064_REG061, 0x72); in wlc_radio_2064_init()
4492 write_radio_reg(pi, RADIO_2064_REG062, 0x7f); in wlc_radio_2064_init()
4495 write_radio_reg(pi, RADIO_2064_REG01D, 0x02); in wlc_radio_2064_init()
4496 write_radio_reg(pi, RADIO_2064_REG01E, 0x06); in wlc_radio_2064_init()
4498 mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0); in wlc_radio_2064_init()
4500 mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3); in wlc_radio_2064_init()
4502 mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6); in wlc_radio_2064_init()
4504 mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9); in wlc_radio_2064_init()
4506 mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12); in wlc_radio_2064_init()
4508 write_phy_reg(pi, 0x4ea, 0x4688); in wlc_radio_2064_init()
4510 if (pi->sh->boardflags & BFL_FEM) in wlc_radio_2064_init()
4511 mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0); in wlc_radio_2064_init()
4513 mod_phy_reg(pi, 0x4eb, (0x7 << 0), 3 << 0); in wlc_radio_2064_init()
4515 mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6); in wlc_radio_2064_init()
4517 mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0); in wlc_radio_2064_init()
4519 wlc_lcnphy_set_tx_locc(pi, 0); in wlc_radio_2064_init()
4521 wlc_lcnphy_rcal(pi); in wlc_radio_2064_init()
4523 wlc_lcnphy_rc_cal(pi); in wlc_radio_2064_init()
4525 if (!(pi->sh->boardflags & BFL_FEM)) { in wlc_radio_2064_init()
4526 write_radio_reg(pi, RADIO_2064_REG032, 0x6f); in wlc_radio_2064_init()
4527 write_radio_reg(pi, RADIO_2064_REG033, 0x19); in wlc_radio_2064_init()
4528 write_radio_reg(pi, RADIO_2064_REG039, 0xe); in wlc_radio_2064_init()
4533 static void wlc_lcnphy_radio_init(struct brcms_phy *pi) in wlc_lcnphy_radio_init() argument
4535 wlc_radio_2064_init(pi); in wlc_lcnphy_radio_init()
4538 static void wlc_lcnphy_tbl_init(struct brcms_phy *pi) in wlc_lcnphy_tbl_init() argument
4546 wlc_lcnphy_write_table(pi, &dot11lcnphytbl_info_rev0[idx]); in wlc_lcnphy_tbl_init()
4548 if (pi->sh->boardflags & BFL_FEM_BT) { in wlc_lcnphy_tbl_init()
4555 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tbl_init()
4558 if (!(pi->sh->boardflags & BFL_FEM)) { in wlc_lcnphy_tbl_init()
4566 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tbl_init()
4570 wlc_lcnphy_write_table(pi, &tab); in wlc_lcnphy_tbl_init()
4573 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_tbl_init()
4574 if (pi->sh->boardflags & BFL_FEM) in wlc_lcnphy_tbl_init()
4576 pi, in wlc_lcnphy_tbl_init()
4580 pi, in wlc_lcnphy_tbl_init()
4584 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) { in wlc_lcnphy_tbl_init()
4587 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_tbl_init()
4589 if (pi->sh->boardflags & BFL_EXTLNA) in wlc_lcnphy_tbl_init()
4595 if (pi->sh->boardflags & BFL_EXTLNA_5GHz) in wlc_lcnphy_tbl_init()
4602 wlc_lcnphy_write_table(pi, &tb[idx]); in wlc_lcnphy_tbl_init()
4605 if (pi->sh->boardflags & BFL_FEM) { in wlc_lcnphy_tbl_init()
4606 if (pi->sh->boardflags & BFL_FEM_BT) { in wlc_lcnphy_tbl_init()
4607 if (pi->sh->boardrev < 0x1250) in wlc_lcnphy_tbl_init()
4615 if (pi->sh->boardflags & BFL_FEM_BT) in wlc_lcnphy_tbl_init()
4620 wlc_lcnphy_write_table(pi, tb); in wlc_lcnphy_tbl_init()
4621 wlc_lcnphy_load_rfpower(pi); in wlc_lcnphy_tbl_init()
4623 wlc_lcnphy_clear_papd_comptable(pi); in wlc_lcnphy_tbl_init()
4626 static void wlc_lcnphy_rev0_baseband_init(struct brcms_phy *pi) in wlc_lcnphy_rev0_baseband_init() argument
4629 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_rev0_baseband_init()
4631 write_radio_reg(pi, RADIO_2064_REG11C, 0x0); in wlc_lcnphy_rev0_baseband_init()
4633 write_phy_reg(pi, 0x43b, 0x0); in wlc_lcnphy_rev0_baseband_init()
4634 write_phy_reg(pi, 0x43c, 0x0); in wlc_lcnphy_rev0_baseband_init()
4635 write_phy_reg(pi, 0x44c, 0x0); in wlc_lcnphy_rev0_baseband_init()
4636 write_phy_reg(pi, 0x4e6, 0x0); in wlc_lcnphy_rev0_baseband_init()
4637 write_phy_reg(pi, 0x4f9, 0x0); in wlc_lcnphy_rev0_baseband_init()
4638 write_phy_reg(pi, 0x4b0, 0x0); in wlc_lcnphy_rev0_baseband_init()
4639 write_phy_reg(pi, 0x938, 0x0); in wlc_lcnphy_rev0_baseband_init()
4640 write_phy_reg(pi, 0x4b0, 0x0); in wlc_lcnphy_rev0_baseband_init()
4641 write_phy_reg(pi, 0x44e, 0); in wlc_lcnphy_rev0_baseband_init()
4643 or_phy_reg(pi, 0x567, 0x03); in wlc_lcnphy_rev0_baseband_init()
4645 or_phy_reg(pi, 0x44a, 0x44); in wlc_lcnphy_rev0_baseband_init()
4646 write_phy_reg(pi, 0x44a, 0x80); in wlc_lcnphy_rev0_baseband_init()
4648 if (!(pi->sh->boardflags & BFL_FEM)) in wlc_lcnphy_rev0_baseband_init()
4649 wlc_lcnphy_set_tx_pwr_by_index(pi, 52); in wlc_lcnphy_rev0_baseband_init()
4656 write_phy_reg(pi, 0x43e, afectrl1); in wlc_lcnphy_rev0_baseband_init()
4659 mod_phy_reg(pi, 0x634, (0xff << 0), 0xC << 0); in wlc_lcnphy_rev0_baseband_init()
4660 if (pi->sh->boardflags & BFL_FEM) { in wlc_lcnphy_rev0_baseband_init()
4661 mod_phy_reg(pi, 0x634, (0xff << 0), 0xA << 0); in wlc_lcnphy_rev0_baseband_init()
4663 write_phy_reg(pi, 0x910, 0x1); in wlc_lcnphy_rev0_baseband_init()
4666 mod_phy_reg(pi, 0x448, (0x3 << 8), 1 << 8); in wlc_lcnphy_rev0_baseband_init()
4667 mod_phy_reg(pi, 0x608, (0xff << 0), 0x17 << 0); in wlc_lcnphy_rev0_baseband_init()
4668 mod_phy_reg(pi, 0x604, (0x7ff << 0), 0x3EA << 0); in wlc_lcnphy_rev0_baseband_init()
4672 static void wlc_lcnphy_rev2_baseband_init(struct brcms_phy *pi) in wlc_lcnphy_rev2_baseband_init() argument
4674 if (CHSPEC_IS5G(pi->radio_chanspec)) { in wlc_lcnphy_rev2_baseband_init()
4675 mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0); in wlc_lcnphy_rev2_baseband_init()
4676 mod_phy_reg(pi, 0x416, (0xff << 8), 80 << 8); in wlc_lcnphy_rev2_baseband_init()
4680 static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi) in wlc_lcnphy_agc_temp_init() argument
4685 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_agc_temp_init()
4687 temp = (s16) read_phy_reg(pi, 0x4df); in wlc_lcnphy_agc_temp_init()
4703 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_agc_temp_init()
4713 temp = (s16) (read_phy_reg(pi, 0x434) & (0xff << 0)); in wlc_lcnphy_agc_temp_init()
4719 (read_phy_reg(pi, 0x424) & (0xff << 8)) >> 8; in wlc_lcnphy_agc_temp_init()
4721 (read_phy_reg(pi, 0x425) & (0xff << 0)) >> 0; in wlc_lcnphy_agc_temp_init()
4728 wlc_lcnphy_read_table(pi, &tab); in wlc_lcnphy_agc_temp_init()
4735 static void wlc_lcnphy_baseband_init(struct brcms_phy *pi) in wlc_lcnphy_baseband_init() argument
4738 wlc_lcnphy_tbl_init(pi); in wlc_lcnphy_baseband_init()
4739 wlc_lcnphy_rev0_baseband_init(pi); in wlc_lcnphy_baseband_init()
4740 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) in wlc_lcnphy_baseband_init()
4741 wlc_lcnphy_rev2_baseband_init(pi); in wlc_lcnphy_baseband_init()
4742 wlc_lcnphy_bu_tweaks(pi); in wlc_lcnphy_baseband_init()
4745 void wlc_phy_init_lcnphy(struct brcms_phy *pi) in wlc_phy_init_lcnphy() argument
4747 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_phy_init_lcnphy()
4752 or_phy_reg(pi, 0x44a, 0x80); in wlc_phy_init_lcnphy()
4753 and_phy_reg(pi, 0x44a, 0x7f); in wlc_phy_init_lcnphy()
4755 wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X); in wlc_phy_init_lcnphy()
4757 write_phy_reg(pi, 0x60a, 160); in wlc_phy_init_lcnphy()
4759 write_phy_reg(pi, 0x46a, 25); in wlc_phy_init_lcnphy()
4761 wlc_lcnphy_baseband_init(pi); in wlc_phy_init_lcnphy()
4763 wlc_lcnphy_radio_init(pi); in wlc_phy_init_lcnphy()
4765 if (CHSPEC_IS2G(pi->radio_chanspec)) in wlc_phy_init_lcnphy()
4766 wlc_lcnphy_tx_pwr_ctrl_init((struct brcms_phy_pub *) pi); in wlc_phy_init_lcnphy()
4768 wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); in wlc_phy_init_lcnphy()
4770 bcma_chipco_regctl_maskset(&pi->d11core->bus->drv_cc, 0, ~0xf, 0x9); in wlc_phy_init_lcnphy()
4772 bcma_chipco_chipctl_maskset(&pi->d11core->bus->drv_cc, 0, 0x0, in wlc_phy_init_lcnphy()
4775 if ((pi->sh->boardflags & BFL_FEM) in wlc_phy_init_lcnphy()
4776 && wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) in wlc_phy_init_lcnphy()
4777 wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR); in wlc_phy_init_lcnphy()
4779 wlc_lcnphy_agc_temp_init(pi); in wlc_phy_init_lcnphy()
4781 wlc_lcnphy_temp_adj(pi); in wlc_phy_init_lcnphy()
4783 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14); in wlc_phy_init_lcnphy()
4786 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14); in wlc_phy_init_lcnphy()
4788 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW); in wlc_phy_init_lcnphy()
4790 wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT); in wlc_phy_init_lcnphy()
4793 static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi) in wlc_phy_txpwr_srom_read_lcnphy() argument
4797 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_phy_txpwr_srom_read_lcnphy()
4798 struct ssb_sprom *sprom = &pi->d11core->bus->sprom; in wlc_phy_txpwr_srom_read_lcnphy()
4800 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_phy_txpwr_srom_read_lcnphy()
4808 pi->txpa_2g[0] = sprom->pa0b0; in wlc_phy_txpwr_srom_read_lcnphy()
4809 pi->txpa_2g[1] = sprom->pa0b1; in wlc_phy_txpwr_srom_read_lcnphy()
4810 pi->txpa_2g[2] = sprom->pa0b2; in wlc_phy_txpwr_srom_read_lcnphy()
4825 pi->tx_srom_max_2g = txpwr; in wlc_phy_txpwr_srom_read_lcnphy()
4828 pi->txpa_2g_low_temp[i] = pi->txpa_2g[i]; in wlc_phy_txpwr_srom_read_lcnphy()
4829 pi->txpa_2g_high_temp[i] = pi->txpa_2g[i]; in wlc_phy_txpwr_srom_read_lcnphy()
4838 pi->tx_srom_max_rate_2g[i] = in wlc_phy_txpwr_srom_read_lcnphy()
4844 pi->tx_srom_max_rate_2g[i] = in wlc_phy_txpwr_srom_read_lcnphy()
4851 pi->tx_srom_max_rate_2g[i] = txpwr; in wlc_phy_txpwr_srom_read_lcnphy()
4854 pi->tx_srom_max_rate_2g[i] = txpwr - in wlc_phy_txpwr_srom_read_lcnphy()
4863 pi->tx_srom_max_rate_2g[i] = in wlc_phy_txpwr_srom_read_lcnphy()
4878 wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi, in wlc_phy_txpwr_srom_read_lcnphy()
4886 void wlc_2064_vco_cal(struct brcms_phy *pi) in wlc_2064_vco_cal() argument
4890 mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3); in wlc_2064_vco_cal()
4891 calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8; in wlc_2064_vco_cal()
4892 write_radio_reg(pi, RADIO_2064_REG056, calnrst); in wlc_2064_vco_cal()
4894 write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03); in wlc_2064_vco_cal()
4896 write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x07); in wlc_2064_vco_cal()
4898 mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0); in wlc_2064_vco_cal()
4901 bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi) in wlc_phy_tpc_isenabled_lcnphy() argument
4903 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) in wlc_phy_tpc_isenabled_lcnphy()
4907 wlc_lcnphy_get_tx_pwr_ctrl((pi))); in wlc_phy_tpc_isenabled_lcnphy()
4910 void wlc_phy_txpower_recalc_target_lcnphy(struct brcms_phy *pi) in wlc_phy_txpower_recalc_target_lcnphy() argument
4913 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { in wlc_phy_txpower_recalc_target_lcnphy()
4914 wlc_lcnphy_calib_modes(pi, LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL); in wlc_phy_txpower_recalc_target_lcnphy()
4915 } else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { in wlc_phy_txpower_recalc_target_lcnphy()
4916 pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); in wlc_phy_txpower_recalc_target_lcnphy()
4917 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF); in wlc_phy_txpower_recalc_target_lcnphy()
4918 wlc_lcnphy_txpower_recalc_target(pi); in wlc_phy_txpower_recalc_target_lcnphy()
4919 wlc_lcnphy_set_tx_pwr_ctrl(pi, pwr_ctrl); in wlc_phy_txpower_recalc_target_lcnphy()
4923 void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, u16 chanspec) in wlc_phy_chanspec_set_lcnphy() argument
4927 wlc_phy_chanspec_radio_set((struct brcms_phy_pub *)pi, chanspec); in wlc_phy_chanspec_set_lcnphy()
4929 wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec); in wlc_phy_chanspec_set_lcnphy()
4931 or_phy_reg(pi, 0x44a, 0x44); in wlc_phy_chanspec_set_lcnphy()
4932 write_phy_reg(pi, 0x44a, 0x80); in wlc_phy_chanspec_set_lcnphy()
4934 wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel); in wlc_phy_chanspec_set_lcnphy()
4937 wlc_lcnphy_toggle_afe_pwdn(pi); in wlc_phy_chanspec_set_lcnphy()
4939 write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20); in wlc_phy_chanspec_set_lcnphy()
4940 write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor); in wlc_phy_chanspec_set_lcnphy()
4942 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) { in wlc_phy_chanspec_set_lcnphy()
4943 mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8); in wlc_phy_chanspec_set_lcnphy()
4945 wlc_lcnphy_load_tx_iir_filter(pi, false, 3); in wlc_phy_chanspec_set_lcnphy()
4947 mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8); in wlc_phy_chanspec_set_lcnphy()
4949 wlc_lcnphy_load_tx_iir_filter(pi, false, 2); in wlc_phy_chanspec_set_lcnphy()
4952 if (pi->sh->boardflags & BFL_FEM) in wlc_phy_chanspec_set_lcnphy()
4953 wlc_lcnphy_load_tx_iir_filter(pi, true, 0); in wlc_phy_chanspec_set_lcnphy()
4955 wlc_lcnphy_load_tx_iir_filter(pi, true, 3); in wlc_phy_chanspec_set_lcnphy()
4957 mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3); in wlc_phy_chanspec_set_lcnphy()
4958 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) in wlc_phy_chanspec_set_lcnphy()
4959 wlc_lcnphy_tssi_setup(pi); in wlc_phy_chanspec_set_lcnphy()
4962 void wlc_phy_detach_lcnphy(struct brcms_phy *pi) in wlc_phy_detach_lcnphy() argument
4964 kfree(pi->u.pi_lcnphy); in wlc_phy_detach_lcnphy()
4967 bool wlc_phy_attach_lcnphy(struct brcms_phy *pi) in wlc_phy_attach_lcnphy() argument
4971 pi->u.pi_lcnphy = kzalloc(sizeof(struct brcms_phy_lcnphy), GFP_ATOMIC); in wlc_phy_attach_lcnphy()
4972 if (pi->u.pi_lcnphy == NULL) in wlc_phy_attach_lcnphy()
4975 pi_lcn = pi->u.pi_lcnphy; in wlc_phy_attach_lcnphy()
4977 if (0 == (pi->sh->boardflags & BFL_NOPA)) { in wlc_phy_attach_lcnphy()
4978 pi->hwpwrctrl = true; in wlc_phy_attach_lcnphy()
4979 pi->hwpwrctrl_capable = true; in wlc_phy_attach_lcnphy()
4982 pi->xtalfreq = bcma_chipco_get_alp_clock(&pi->d11core->bus->drv_cc); in wlc_phy_attach_lcnphy()
4985 pi->pi_fptr.init = wlc_phy_init_lcnphy; in wlc_phy_attach_lcnphy()
4986 pi->pi_fptr.calinit = wlc_phy_cal_init_lcnphy; in wlc_phy_attach_lcnphy()
4987 pi->pi_fptr.chanset = wlc_phy_chanspec_set_lcnphy; in wlc_phy_attach_lcnphy()
4988 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_lcnphy; in wlc_phy_attach_lcnphy()
4989 pi->pi_fptr.txiqccget = wlc_lcnphy_get_tx_iqcc; in wlc_phy_attach_lcnphy()
4990 pi->pi_fptr.txiqccset = wlc_lcnphy_set_tx_iqcc; in wlc_phy_attach_lcnphy()
4991 pi->pi_fptr.txloccget = wlc_lcnphy_get_tx_locc; in wlc_phy_attach_lcnphy()
4992 pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft; in wlc_phy_attach_lcnphy()
4993 pi->pi_fptr.detach = wlc_phy_detach_lcnphy; in wlc_phy_attach_lcnphy()
4995 if (!wlc_phy_txpwr_srom_read_lcnphy(pi)) { in wlc_phy_attach_lcnphy()
4996 kfree(pi->u.pi_lcnphy); in wlc_phy_attach_lcnphy()
5000 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) { in wlc_phy_attach_lcnphy()
5002 pi->hwpwrctrl = true; in wlc_phy_attach_lcnphy()
5003 pi->hwpwrctrl_capable = true; in wlc_phy_attach_lcnphy()
5004 pi->temppwrctrl_capable = false; in wlc_phy_attach_lcnphy()
5006 pi->hwpwrctrl = false; in wlc_phy_attach_lcnphy()
5007 pi->hwpwrctrl_capable = false; in wlc_phy_attach_lcnphy()
5008 pi->temppwrctrl_capable = true; in wlc_phy_attach_lcnphy()
5015 static void wlc_lcnphy_set_rx_gain(struct brcms_phy *pi, u32 gain) in wlc_lcnphy_set_rx_gain() argument
5032 mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0); in wlc_lcnphy_set_rx_gain()
5033 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9); in wlc_lcnphy_set_rx_gain()
5034 mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10); in wlc_lcnphy_set_rx_gain()
5035 mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0); in wlc_lcnphy_set_rx_gain()
5036 mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0); in wlc_lcnphy_set_rx_gain()
5038 if (CHSPEC_IS2G(pi->radio_chanspec)) { in wlc_lcnphy_set_rx_gain()
5039 mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11); in wlc_lcnphy_set_rx_gain()
5040 mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3); in wlc_lcnphy_set_rx_gain()
5042 wlc_lcnphy_rx_gain_override_enable(pi, true); in wlc_lcnphy_set_rx_gain()
5045 static u32 wlc_lcnphy_get_receive_power(struct brcms_phy *pi, s32 *gain_index) in wlc_lcnphy_get_receive_power() argument
5050 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_get_receive_power()
5060 wlc_lcnphy_set_rx_gain(pi, in wlc_lcnphy_get_receive_power()
5065 pi, in wlc_lcnphy_get_receive_power()
5072 wlc_lcnphy_set_rx_gain(pi, gain_code); in wlc_lcnphy_get_receive_power()
5074 wlc_lcnphy_measure_digital_power(pi, in wlc_lcnphy_get_receive_power()
5082 s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index) in wlc_lcnphy_rx_signal_power() argument
5092 struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; in wlc_lcnphy_rx_signal_power()
5094 received_power = wlc_lcnphy_get_receive_power(pi, &gain_index); in wlc_lcnphy_rx_signal_power()
5098 nominal_power_db = read_phy_reg(pi, 0x425) >> 8; in wlc_lcnphy_rx_signal_power()
5118 input_power_offset_db = read_phy_reg(pi, 0x434) & 0xFF; in wlc_lcnphy_rx_signal_power()
5128 freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec)); in wlc_lcnphy_rx_signal_power()
5148 wlc_lcnphy_rx_gain_override_enable(pi, 0); in wlc_lcnphy_rx_signal_power()