Lines Matching refs:dev
28 int b43_phy_allocate(struct b43_wldev *dev) in b43_phy_allocate() argument
30 struct b43_phy *phy = &(dev->phy); in b43_phy_allocate()
70 err = phy->ops->allocate(dev); in b43_phy_allocate()
77 void b43_phy_free(struct b43_wldev *dev) in b43_phy_free() argument
79 dev->phy.ops->free(dev); in b43_phy_free()
80 dev->phy.ops = NULL; in b43_phy_free()
83 int b43_phy_init(struct b43_wldev *dev) in b43_phy_init() argument
85 struct b43_phy *phy = &dev->phy; in b43_phy_init()
93 phy->chandef = &dev->wl->hw->conf.chandef; in b43_phy_init()
97 phy->ops->switch_analog(dev, true); in b43_phy_init()
98 b43_software_rfkill(dev, false); in b43_phy_init()
100 err = ops->init(dev); in b43_phy_init()
102 b43err(dev->wl, "PHY init failed\n"); in b43_phy_init()
107 err = b43_switch_channel(dev, phy->channel); in b43_phy_init()
109 b43err(dev->wl, "PHY init: Channel switch to default failed\n"); in b43_phy_init()
118 ops->exit(dev); in b43_phy_init()
120 b43_software_rfkill(dev, true); in b43_phy_init()
125 void b43_phy_exit(struct b43_wldev *dev) in b43_phy_exit() argument
127 const struct b43_phy_operations *ops = dev->phy.ops; in b43_phy_exit()
129 b43_software_rfkill(dev, true); in b43_phy_exit()
130 dev->phy.do_full_init = true; in b43_phy_exit()
132 ops->exit(dev); in b43_phy_exit()
135 bool b43_has_hardware_pctl(struct b43_wldev *dev) in b43_has_hardware_pctl() argument
137 if (!dev->phy.hardware_power_control) in b43_has_hardware_pctl()
139 if (!dev->phy.ops->supports_hwpctl) in b43_has_hardware_pctl()
141 return dev->phy.ops->supports_hwpctl(dev); in b43_has_hardware_pctl()
144 void b43_radio_lock(struct b43_wldev *dev) in b43_radio_lock() argument
149 B43_WARN_ON(dev->phy.radio_locked); in b43_radio_lock()
150 dev->phy.radio_locked = true; in b43_radio_lock()
153 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_lock()
155 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_radio_lock()
158 b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_lock()
162 void b43_radio_unlock(struct b43_wldev *dev) in b43_radio_unlock() argument
167 B43_WARN_ON(!dev->phy.radio_locked); in b43_radio_unlock()
168 dev->phy.radio_locked = false; in b43_radio_unlock()
172 b43_read16(dev, B43_MMIO_PHY_VER); in b43_radio_unlock()
174 macctl = b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_unlock()
176 b43_write32(dev, B43_MMIO_MACCTL, macctl); in b43_radio_unlock()
179 void b43_phy_lock(struct b43_wldev *dev) in b43_phy_lock() argument
182 B43_WARN_ON(dev->phy.phy_locked); in b43_phy_lock()
183 dev->phy.phy_locked = true; in b43_phy_lock()
185 B43_WARN_ON(dev->dev->core_rev < 3); in b43_phy_lock()
187 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) in b43_phy_lock()
188 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); in b43_phy_lock()
191 void b43_phy_unlock(struct b43_wldev *dev) in b43_phy_unlock() argument
194 B43_WARN_ON(!dev->phy.phy_locked); in b43_phy_unlock()
195 dev->phy.phy_locked = false; in b43_phy_unlock()
197 B43_WARN_ON(dev->dev->core_rev < 3); in b43_phy_unlock()
199 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) in b43_phy_unlock()
200 b43_power_saving_ctl_bits(dev, 0); in b43_phy_unlock()
203 static inline void assert_mac_suspended(struct b43_wldev *dev) in assert_mac_suspended() argument
207 if ((b43_status(dev) >= B43_STAT_INITIALIZED) && in assert_mac_suspended()
208 (dev->mac_suspended <= 0)) { in assert_mac_suspended()
209 b43dbg(dev->wl, "PHY/RADIO register access with " in assert_mac_suspended()
215 u16 b43_radio_read(struct b43_wldev *dev, u16 reg) in b43_radio_read() argument
217 assert_mac_suspended(dev); in b43_radio_read()
218 dev->phy.writes_counter = 0; in b43_radio_read()
219 return dev->phy.ops->radio_read(dev, reg); in b43_radio_read()
222 void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value) in b43_radio_write() argument
224 assert_mac_suspended(dev); in b43_radio_write()
225 if (b43_bus_host_is_pci(dev->dev) && in b43_radio_write()
226 ++dev->phy.writes_counter > B43_MAX_WRITES_IN_ROW) { in b43_radio_write()
227 b43_read32(dev, B43_MMIO_MACCTL); in b43_radio_write()
228 dev->phy.writes_counter = 1; in b43_radio_write()
230 dev->phy.ops->radio_write(dev, reg, value); in b43_radio_write()
233 void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask) in b43_radio_mask() argument
235 b43_radio_write16(dev, offset, in b43_radio_mask()
236 b43_radio_read16(dev, offset) & mask); in b43_radio_mask()
239 void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set) in b43_radio_set() argument
241 b43_radio_write16(dev, offset, in b43_radio_set()
242 b43_radio_read16(dev, offset) | set); in b43_radio_set()
245 void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set) in b43_radio_maskset() argument
247 b43_radio_write16(dev, offset, in b43_radio_maskset()
248 (b43_radio_read16(dev, offset) & mask) | set); in b43_radio_maskset()
251 bool b43_radio_wait_value(struct b43_wldev *dev, u16 offset, u16 mask, in b43_radio_wait_value() argument
258 val = b43_radio_read(dev, offset); in b43_radio_wait_value()
266 u16 b43_phy_read(struct b43_wldev *dev, u16 reg) in b43_phy_read() argument
268 assert_mac_suspended(dev); in b43_phy_read()
269 dev->phy.writes_counter = 0; in b43_phy_read()
271 if (dev->phy.ops->phy_read) in b43_phy_read()
272 return dev->phy.ops->phy_read(dev, reg); in b43_phy_read()
274 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); in b43_phy_read()
275 return b43_read16(dev, B43_MMIO_PHY_DATA); in b43_phy_read()
278 void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value) in b43_phy_write() argument
280 assert_mac_suspended(dev); in b43_phy_write()
281 if (b43_bus_host_is_pci(dev->dev) && in b43_phy_write()
282 ++dev->phy.writes_counter > B43_MAX_WRITES_IN_ROW) { in b43_phy_write()
283 b43_read16(dev, B43_MMIO_PHY_VER); in b43_phy_write()
284 dev->phy.writes_counter = 1; in b43_phy_write()
287 if (dev->phy.ops->phy_write) in b43_phy_write()
288 return dev->phy.ops->phy_write(dev, reg, value); in b43_phy_write()
290 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); in b43_phy_write()
291 b43_write16(dev, B43_MMIO_PHY_DATA, value); in b43_phy_write()
294 void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg) in b43_phy_copy() argument
296 b43_phy_write(dev, destreg, b43_phy_read(dev, srcreg)); in b43_phy_copy()
299 void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask) in b43_phy_mask() argument
301 if (dev->phy.ops->phy_maskset) { in b43_phy_mask()
302 assert_mac_suspended(dev); in b43_phy_mask()
303 dev->phy.ops->phy_maskset(dev, offset, mask, 0); in b43_phy_mask()
305 b43_phy_write(dev, offset, in b43_phy_mask()
306 b43_phy_read(dev, offset) & mask); in b43_phy_mask()
310 void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set) in b43_phy_set() argument
312 if (dev->phy.ops->phy_maskset) { in b43_phy_set()
313 assert_mac_suspended(dev); in b43_phy_set()
314 dev->phy.ops->phy_maskset(dev, offset, 0xFFFF, set); in b43_phy_set()
316 b43_phy_write(dev, offset, in b43_phy_set()
317 b43_phy_read(dev, offset) | set); in b43_phy_set()
321 void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set) in b43_phy_maskset() argument
323 if (dev->phy.ops->phy_maskset) { in b43_phy_maskset()
324 assert_mac_suspended(dev); in b43_phy_maskset()
325 dev->phy.ops->phy_maskset(dev, offset, mask, set); in b43_phy_maskset()
327 b43_phy_write(dev, offset, in b43_phy_maskset()
328 (b43_phy_read(dev, offset) & mask) | set); in b43_phy_maskset()
332 void b43_phy_put_into_reset(struct b43_wldev *dev) in b43_phy_put_into_reset() argument
336 switch (dev->dev->bus_type) { in b43_phy_put_into_reset()
339 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_put_into_reset()
343 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_put_into_reset()
346 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_put_into_reset()
348 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_put_into_reset()
354 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_put_into_reset()
358 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_put_into_reset()
361 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_put_into_reset()
363 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_put_into_reset()
371 void b43_phy_take_out_of_reset(struct b43_wldev *dev) in b43_phy_take_out_of_reset() argument
375 switch (dev->dev->bus_type) { in b43_phy_take_out_of_reset()
379 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_take_out_of_reset()
383 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_take_out_of_reset()
387 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_take_out_of_reset()
390 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_take_out_of_reset()
397 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_take_out_of_reset()
401 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_take_out_of_reset()
402 ssb_read32(dev->dev->sdev, SSB_TMSLOW); /* flush */ in b43_phy_take_out_of_reset()
405 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_take_out_of_reset()
408 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_take_out_of_reset()
409 ssb_read32(dev->dev->sdev, SSB_TMSLOW); /* flush */ in b43_phy_take_out_of_reset()
416 int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel) in b43_switch_channel() argument
418 struct b43_phy *phy = &(dev->phy); in b43_switch_channel()
426 if (b43_current_band(dev->wl) == NL80211_BAND_5GHZ) in b43_switch_channel()
431 savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN); in b43_switch_channel()
432 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie); in b43_switch_channel()
435 err = phy->ops->switch_channel(dev, new_channel); in b43_switch_channel()
445 b43_shm_write16(dev, B43_SHM_SHARED, in b43_switch_channel()
451 void b43_software_rfkill(struct b43_wldev *dev, bool blocked) in b43_software_rfkill() argument
453 struct b43_phy *phy = &dev->phy; in b43_software_rfkill()
455 b43_mac_suspend(dev); in b43_software_rfkill()
456 phy->ops->software_rfkill(dev, blocked); in b43_software_rfkill()
458 b43_mac_enable(dev); in b43_software_rfkill()
470 struct b43_wldev *dev; in b43_phy_txpower_adjust_work() local
473 dev = wl->current_dev; in b43_phy_txpower_adjust_work()
475 if (likely(dev && (b43_status(dev) >= B43_STAT_STARTED))) in b43_phy_txpower_adjust_work()
476 dev->phy.ops->adjust_txpower(dev); in b43_phy_txpower_adjust_work()
481 void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags) in b43_phy_txpower_check() argument
483 struct b43_phy *phy = &dev->phy; in b43_phy_txpower_check()
495 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) && in b43_phy_txpower_check()
496 (dev->dev->board_type == SSB_BOARD_BU4306)) in b43_phy_txpower_check()
499 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI)); in b43_phy_txpower_check()
507 ieee80211_queue_work(dev->wl->hw, &dev->wl->txpower_adjust_work); in b43_phy_txpower_check()
510 int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset) in b43_phy_shm_tssi_read() argument
517 tmp = b43_shm_read32(dev, B43_SHM_SHARED, shm_offset); in b43_phy_shm_tssi_read()
530 b43_shm_write32(dev, B43_SHM_SHARED, shm_offset, tmp); in b43_phy_shm_tssi_read()
543 if (b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1) in b43_phy_shm_tssi_read()
551 void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on) in b43_phyop_switch_analog_generic() argument
553 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4); in b43_phyop_switch_analog_generic()
557 bool b43_is_40mhz(struct b43_wldev *dev) in b43_is_40mhz() argument
559 return dev->phy.chandef->width == NL80211_CHAN_WIDTH_40; in b43_is_40mhz()
563 void b43_phy_force_clock(struct b43_wldev *dev, bool force) in b43_phy_force_clock() argument
567 WARN_ON(dev->phy.type != B43_PHYTYPE_N && in b43_phy_force_clock()
568 dev->phy.type != B43_PHYTYPE_HT && in b43_phy_force_clock()
569 dev->phy.type != B43_PHYTYPE_AC); in b43_phy_force_clock()
571 switch (dev->dev->bus_type) { in b43_phy_force_clock()
574 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); in b43_phy_force_clock()
579 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); in b43_phy_force_clock()
584 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); in b43_phy_force_clock()
589 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); in b43_phy_force_clock()