17 	int ret;  in pll5g_detune()  local
22 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in pll5g_detune()
24 	if (ret)  in pll5g_detune()
26 	return ret;  in pll5g_detune()
32 	int ret;  in pll5g_tune()  local
36 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in pll5g_tune()
38 	if (ret)  in pll5g_tune()
40 	return ret;  in pll5g_tune()
48 	int ret;  in vsc85xx_sd6g_pll_cfg_wr()  local
50 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_pll_cfg_wr()
55 	if (ret)  in vsc85xx_sd6g_pll_cfg_wr()
57 	return ret;  in vsc85xx_sd6g_pll_cfg_wr()
75 	int ret;  in vsc85xx_sd6g_common_cfg_wr()  local
77 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_common_cfg_wr()
84 	if (ret)  in vsc85xx_sd6g_common_cfg_wr()
86 	return ret;  in vsc85xx_sd6g_common_cfg_wr()
97 	int ret;  in vsc85xx_sd6g_des_cfg_wr()  local
105 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_des_cfg_wr()
108 	if (ret)  in vsc85xx_sd6g_des_cfg_wr()
110 	return ret;  in vsc85xx_sd6g_des_cfg_wr()
121 	int ret;  in vsc85xx_sd6g_ib_cfg0_wr()  local
130 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_ib_cfg0_wr()
133 	if (ret)  in vsc85xx_sd6g_ib_cfg0_wr()
135 	return ret;  in vsc85xx_sd6g_ib_cfg0_wr()
147 	int ret;  in vsc85xx_sd6g_ib_cfg1_wr()  local
154 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_ib_cfg1_wr()
157 	if (ret)  in vsc85xx_sd6g_ib_cfg1_wr()
159 	return ret;  in vsc85xx_sd6g_ib_cfg1_wr()
169 	int ret;  in vsc85xx_sd6g_ib_cfg2_wr()  local
176 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_ib_cfg2_wr()
179 	if (ret)  in vsc85xx_sd6g_ib_cfg2_wr()
181 	return ret;  in vsc85xx_sd6g_ib_cfg2_wr()
191 	int ret;  in vsc85xx_sd6g_ib_cfg3_wr()  local
195 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_ib_cfg3_wr()
198 	if (ret)  in vsc85xx_sd6g_ib_cfg3_wr()
200 	return ret;  in vsc85xx_sd6g_ib_cfg3_wr()
210 	int ret;  in vsc85xx_sd6g_ib_cfg4_wr()  local
214 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_ib_cfg4_wr()
217 	if (ret)  in vsc85xx_sd6g_ib_cfg4_wr()
219 	return ret;  in vsc85xx_sd6g_ib_cfg4_wr()
225 	int ret;  in vsc85xx_sd6g_misc_cfg_wr()  local
227 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_misc_cfg_wr()
230 	if (ret)  in vsc85xx_sd6g_misc_cfg_wr()
232 	return ret;  in vsc85xx_sd6g_misc_cfg_wr()
237 	int ret;  in vsc85xx_sd6g_gp_cfg_wr()  local
239 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_gp_cfg_wr()
242 	if (ret)  in vsc85xx_sd6g_gp_cfg_wr()
244 	return ret;  in vsc85xx_sd6g_gp_cfg_wr()
256 	int ret;  in vsc85xx_sd6g_dft_cfg2_wr()  local
262 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_dft_cfg2_wr()
265 	if (ret)  in vsc85xx_sd6g_dft_cfg2_wr()
267 	return ret;  in vsc85xx_sd6g_dft_cfg2_wr()
276 	int ret;  in vsc85xx_sd6g_dft_cfg0_wr()  local
280 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_sd6g_dft_cfg0_wr()
283 	if (ret)  in vsc85xx_sd6g_dft_cfg0_wr()
285 	return ret;  in vsc85xx_sd6g_dft_cfg0_wr()
294 	int ret;  in vsc85xx_pll5g_cfg0_wr()  local
300 	ret = vsc85xx_csr_write(phydev, MACRO_CTRL,  in vsc85xx_pll5g_cfg0_wr()
302 	if (ret)  in vsc85xx_pll5g_cfg0_wr()
304 	return ret;  in vsc85xx_pll5g_cfg0_wr()
323 	int ret;  in vsc85xx_sd6g_config_v2()  local
328 	ret = pll5g_detune(phydev);  in vsc85xx_sd6g_config_v2()
329 	if (ret)  in vsc85xx_sd6g_config_v2()
330 		return ret;  in vsc85xx_sd6g_config_v2()
333 	ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 0);  in vsc85xx_sd6g_config_v2()
334 	if (ret)  in vsc85xx_sd6g_config_v2()
335 		return ret;  in vsc85xx_sd6g_config_v2()
336 	ret = vsc85xx_sd6g_common_cfg_wr(phydev, 0, 0, 0, qrate, if_mode, 0);  in vsc85xx_sd6g_config_v2()
337 	if (ret)  in vsc85xx_sd6g_config_v2()
338 		return ret;  in vsc85xx_sd6g_config_v2()
339 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
340 	if (ret)  in vsc85xx_sd6g_config_v2()
341 		return ret;  in vsc85xx_sd6g_config_v2()
342 	ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0);  in vsc85xx_sd6g_config_v2()
343 	if (ret)  in vsc85xx_sd6g_config_v2()
344 		return ret;  in vsc85xx_sd6g_config_v2()
348 	ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 0);  in vsc85xx_sd6g_config_v2()
349 	if (ret)  in vsc85xx_sd6g_config_v2()
350 		return ret;  in vsc85xx_sd6g_config_v2()
351 	ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1);  in vsc85xx_sd6g_config_v2()
352 	if (ret)  in vsc85xx_sd6g_config_v2()
353 		return ret;  in vsc85xx_sd6g_config_v2()
354 	ret = vsc85xx_sd6g_ib_cfg2_wr(phydev, 3, 13, 5);  in vsc85xx_sd6g_config_v2()
355 	if (ret)  in vsc85xx_sd6g_config_v2()
356 		return ret;  in vsc85xx_sd6g_config_v2()
357 	ret = vsc85xx_sd6g_ib_cfg3_wr(phydev,  0, 31, 1, 31);  in vsc85xx_sd6g_config_v2()
358 	if (ret)  in vsc85xx_sd6g_config_v2()
359 		return ret;  in vsc85xx_sd6g_config_v2()
360 	ret = vsc85xx_sd6g_ib_cfg4_wr(phydev, 63, 63, 2, 63);  in vsc85xx_sd6g_config_v2()
361 	if (ret)  in vsc85xx_sd6g_config_v2()
362 		return ret;  in vsc85xx_sd6g_config_v2()
363 	ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0);  in vsc85xx_sd6g_config_v2()
364 	if (ret)  in vsc85xx_sd6g_config_v2()
365 		return ret;  in vsc85xx_sd6g_config_v2()
366 	ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 1);  in vsc85xx_sd6g_config_v2()
367 	if (ret)  in vsc85xx_sd6g_config_v2()
368 		return ret;  in vsc85xx_sd6g_config_v2()
369 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
370 	if (ret)  in vsc85xx_sd6g_config_v2()
371 		return ret;  in vsc85xx_sd6g_config_v2()
374 	ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 1);  in vsc85xx_sd6g_config_v2()
375 	if (ret)  in vsc85xx_sd6g_config_v2()
376 		return ret;  in vsc85xx_sd6g_config_v2()
377 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
378 	if (ret)  in vsc85xx_sd6g_config_v2()
379 		return ret;  in vsc85xx_sd6g_config_v2()
384 		ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
385 		if (ret)  in vsc85xx_sd6g_config_v2()
386 			return ret;  in vsc85xx_sd6g_config_v2()
396 	ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 0);  in vsc85xx_sd6g_config_v2()
397 	if (ret)  in vsc85xx_sd6g_config_v2()
398 		return ret;  in vsc85xx_sd6g_config_v2()
399 	ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 1);  in vsc85xx_sd6g_config_v2()
400 	if (ret)  in vsc85xx_sd6g_config_v2()
401 		return ret;  in vsc85xx_sd6g_config_v2()
402 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
403 	if (ret)  in vsc85xx_sd6g_config_v2()
404 		return ret;  in vsc85xx_sd6g_config_v2()
407 	ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 768);  in vsc85xx_sd6g_config_v2()
408 	if (ret)  in vsc85xx_sd6g_config_v2()
409 		return ret;  in vsc85xx_sd6g_config_v2()
410 	ret = vsc85xx_sd6g_dft_cfg2_wr(phydev, 0, 2, 0, 0, 0, 1);  in vsc85xx_sd6g_config_v2()
411 	if (ret)  in vsc85xx_sd6g_config_v2()
412 		return ret;  in vsc85xx_sd6g_config_v2()
413 	ret = vsc85xx_sd6g_dft_cfg0_wr(phydev, 0, 0, 1);  in vsc85xx_sd6g_config_v2()
414 	if (ret)  in vsc85xx_sd6g_config_v2()
415 		return ret;  in vsc85xx_sd6g_config_v2()
416 	ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 2);  in vsc85xx_sd6g_config_v2()
417 	if (ret)  in vsc85xx_sd6g_config_v2()
418 		return ret;  in vsc85xx_sd6g_config_v2()
419 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
420 	if (ret)  in vsc85xx_sd6g_config_v2()
421 		return ret;  in vsc85xx_sd6g_config_v2()
424 	ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 1, 0);  in vsc85xx_sd6g_config_v2()
425 	if (ret)  in vsc85xx_sd6g_config_v2()
426 		return ret;  in vsc85xx_sd6g_config_v2()
427 	ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_cal, 0, 0);  in vsc85xx_sd6g_config_v2()
428 	if (ret)  in vsc85xx_sd6g_config_v2()
429 		return ret;  in vsc85xx_sd6g_config_v2()
430 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
431 	if (ret)  in vsc85xx_sd6g_config_v2()
432 		return ret;  in vsc85xx_sd6g_config_v2()
435 	ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj,  in vsc85xx_sd6g_config_v2()
437 	if (ret)  in vsc85xx_sd6g_config_v2()
438 		return ret;  in vsc85xx_sd6g_config_v2()
439 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
440 	if (ret)  in vsc85xx_sd6g_config_v2()
441 		return ret;  in vsc85xx_sd6g_config_v2()
445 		ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 769);  in vsc85xx_sd6g_config_v2()
446 		if (ret)  in vsc85xx_sd6g_config_v2()
447 			return ret;  in vsc85xx_sd6g_config_v2()
448 		ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
449 		if (ret)  in vsc85xx_sd6g_config_v2()
450 			return ret;  in vsc85xx_sd6g_config_v2()
452 		ret = vsc85xx_sd6g_gp_cfg_wr(phydev, 768);  in vsc85xx_sd6g_config_v2()
453 		if (ret)  in vsc85xx_sd6g_config_v2()
454 			return ret;  in vsc85xx_sd6g_config_v2()
455 		ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
456 		if (ret)  in vsc85xx_sd6g_config_v2()
457 			return ret;  in vsc85xx_sd6g_config_v2()
460 	ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 1, 1);  in vsc85xx_sd6g_config_v2()
461 	if (ret)  in vsc85xx_sd6g_config_v2()
462 		return ret;  in vsc85xx_sd6g_config_v2()
463 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
464 	if (ret)  in vsc85xx_sd6g_config_v2()
465 		return ret;  in vsc85xx_sd6g_config_v2()
466 	ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_cal, 15, 0, 1);  in vsc85xx_sd6g_config_v2()
467 	if (ret)  in vsc85xx_sd6g_config_v2()
468 		return ret;  in vsc85xx_sd6g_config_v2()
469 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
470 	if (ret)  in vsc85xx_sd6g_config_v2()
471 		return ret;  in vsc85xx_sd6g_config_v2()
477 		ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
478 		if (ret)  in vsc85xx_sd6g_config_v2()
479 			return ret;  in vsc85xx_sd6g_config_v2()
489 	ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 1);  in vsc85xx_sd6g_config_v2()
490 	if (ret)  in vsc85xx_sd6g_config_v2()
491 		return ret;  in vsc85xx_sd6g_config_v2()
492 	ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1);  in vsc85xx_sd6g_config_v2()
493 	if (ret)  in vsc85xx_sd6g_config_v2()
494 		return ret;  in vsc85xx_sd6g_config_v2()
495 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
496 	if (ret)  in vsc85xx_sd6g_config_v2()
497 		return ret;  in vsc85xx_sd6g_config_v2()
500 	ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0);  in vsc85xx_sd6g_config_v2()
501 	if (ret)  in vsc85xx_sd6g_config_v2()
502 		return ret;  in vsc85xx_sd6g_config_v2()
503 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
504 	if (ret)  in vsc85xx_sd6g_config_v2()
505 		return ret;  in vsc85xx_sd6g_config_v2()
508 	ret = vsc85xx_sd6g_dft_cfg2_wr(phydev, 0, 0, 0, 0, 0, 0);  in vsc85xx_sd6g_config_v2()
509 	if (ret)  in vsc85xx_sd6g_config_v2()
510 		return ret;  in vsc85xx_sd6g_config_v2()
511 	ret = vsc85xx_sd6g_dft_cfg0_wr(phydev, 0, 0, 0);  in vsc85xx_sd6g_config_v2()
512 	if (ret)  in vsc85xx_sd6g_config_v2()
513 		return ret;  in vsc85xx_sd6g_config_v2()
514 	ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0);  in vsc85xx_sd6g_config_v2()
515 	if (ret)  in vsc85xx_sd6g_config_v2()
516 		return ret;  in vsc85xx_sd6g_config_v2()
517 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
518 	if (ret)  in vsc85xx_sd6g_config_v2()
519 		return ret;  in vsc85xx_sd6g_config_v2()
522 	ret = pll5g_tune(phydev);  in vsc85xx_sd6g_config_v2()
523 	if (ret)  in vsc85xx_sd6g_config_v2()
524 		return ret;  in vsc85xx_sd6g_config_v2()
528 	ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 0);  in vsc85xx_sd6g_config_v2()
529 	if (ret)  in vsc85xx_sd6g_config_v2()
530 		return ret;  in vsc85xx_sd6g_config_v2()
531 	ret = vsc85xx_sd6g_common_cfg_wr(phydev, 0, 1, 0, qrate, if_mode, 0);  in vsc85xx_sd6g_config_v2()
532 	if (ret)  in vsc85xx_sd6g_config_v2()
533 		return ret;  in vsc85xx_sd6g_config_v2()
534 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
535 	if (ret)  in vsc85xx_sd6g_config_v2()
536 		return ret;  in vsc85xx_sd6g_config_v2()
540 	ret = phy_base_read(phydev, MSCC_PHY_MAC_CFG_FASTLINK);  in vsc85xx_sd6g_config_v2()
541 	if ((ret & MAC_CFG_MASK) == MAC_CFG_QSGMII) {  in vsc85xx_sd6g_config_v2()
550 		ret = vsc8584_cmd(phydev, val);  in vsc85xx_sd6g_config_v2()
551 		if (ret) {  in vsc85xx_sd6g_config_v2()
553 				__func__, ret);  in vsc85xx_sd6g_config_v2()
554 			return ret;  in vsc85xx_sd6g_config_v2()
558 	} else if ((ret & MAC_CFG_MASK) == MAC_CFG_SGMII) {  in vsc85xx_sd6g_config_v2()
568 		ret = vsc8584_cmd(phydev, val);  in vsc85xx_sd6g_config_v2()
569 		if (ret) {  in vsc85xx_sd6g_config_v2()
571 				__func__, ret);  in vsc85xx_sd6g_config_v2()
572 			return ret;  in vsc85xx_sd6g_config_v2()
578 			__func__, ret);  in vsc85xx_sd6g_config_v2()
581 	ret = phy_update_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0);  in vsc85xx_sd6g_config_v2()
582 	if (ret)  in vsc85xx_sd6g_config_v2()
583 		return ret;  in vsc85xx_sd6g_config_v2()
584 	ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
585 	if (ret)  in vsc85xx_sd6g_config_v2()
586 		return ret;  in vsc85xx_sd6g_config_v2()
587 	ret = vsc85xx_pll5g_cfg0_wr(phydev, 4);  in vsc85xx_sd6g_config_v2()
588 	if (ret)  in vsc85xx_sd6g_config_v2()
589 		return ret;  in vsc85xx_sd6g_config_v2()
590 	ret = phy_commit_mcb_s6g(phydev, PHY_S6G_LCPLL_CFG, 0);  in vsc85xx_sd6g_config_v2()
591 	if (ret)  in vsc85xx_sd6g_config_v2()
592 		return ret;  in vsc85xx_sd6g_config_v2()
593 	ret = vsc85xx_sd6g_des_cfg_wr(phydev, 6, 2, 5, des_bw_ana_val, 0);  in vsc85xx_sd6g_config_v2()
594 	if (ret)  in vsc85xx_sd6g_config_v2()
595 		return ret;  in vsc85xx_sd6g_config_v2()
596 	ret = vsc85xx_sd6g_ib_cfg0_wr(phydev, ib_rtrm_adj, ib_sig_det_clk_sel_mm, 0, 1);  in vsc85xx_sd6g_config_v2()
597 	if (ret)  in vsc85xx_sd6g_config_v2()
598 		return ret;  in vsc85xx_sd6g_config_v2()
599 	ret = vsc85xx_sd6g_ib_cfg1_wr(phydev, 8, ib_tsdet_mm, 15, 0, 1);  in vsc85xx_sd6g_config_v2()
600 	if (ret)  in vsc85xx_sd6g_config_v2()
601 		return ret;  in vsc85xx_sd6g_config_v2()
602 	ret = vsc85xx_sd6g_common_cfg_wr(phydev, 1, 1, 0, qrate, if_mode, 0);  in vsc85xx_sd6g_config_v2()
603 	if (ret)  in vsc85xx_sd6g_config_v2()
604 		return ret;  in vsc85xx_sd6g_config_v2()
605 	ret = vsc85xx_sd6g_ib_cfg2_wr(phydev, 3, 13, 5);  in vsc85xx_sd6g_config_v2()
606 	if (ret)  in vsc85xx_sd6g_config_v2()
607 		return ret;  in vsc85xx_sd6g_config_v2()
608 	ret = vsc85xx_sd6g_ib_cfg3_wr(phydev,  0, 31, 1, 31);  in vsc85xx_sd6g_config_v2()
609 	if (ret)  in vsc85xx_sd6g_config_v2()
610 		return ret;  in vsc85xx_sd6g_config_v2()
611 	ret = vsc85xx_sd6g_ib_cfg4_wr(phydev, 63, 63, 2, 63);  in vsc85xx_sd6g_config_v2()
612 	if (ret)  in vsc85xx_sd6g_config_v2()
613 		return ret;  in vsc85xx_sd6g_config_v2()
614 	ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 1);  in vsc85xx_sd6g_config_v2()
615 	if (ret)  in vsc85xx_sd6g_config_v2()
616 		return ret;  in vsc85xx_sd6g_config_v2()
617 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
618 	if (ret)  in vsc85xx_sd6g_config_v2()
619 		return ret;  in vsc85xx_sd6g_config_v2()
622 	ret = vsc85xx_sd6g_pll_cfg_wr(phydev, 3, pll_fsm_ctrl_data, 1);  in vsc85xx_sd6g_config_v2()
623 	if (ret)  in vsc85xx_sd6g_config_v2()
624 		return ret;  in vsc85xx_sd6g_config_v2()
625 	ret = phy_commit_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
626 	if (ret)  in vsc85xx_sd6g_config_v2()
627 		return ret;  in vsc85xx_sd6g_config_v2()
633 		ret = phy_update_mcb_s6g(phydev, PHY_MCB_S6G_CFG, 0);  in vsc85xx_sd6g_config_v2()
634 		if (ret)  in vsc85xx_sd6g_config_v2()
635 			return ret;  in vsc85xx_sd6g_config_v2()
645 	ret = vsc85xx_sd6g_misc_cfg_wr(phydev, 0);  in vsc85xx_sd6g_config_v2()
646 	if (ret)  in vsc85xx_sd6g_config_v2()
647 		return ret;  in vsc85xx_sd6g_config_v2()