202 	u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT;  in bdx_link_changed()
258 	isr = (READ_REG(priv, regISR) & IR_RUN);  in bdx_isr_napi()
280 			READ_REG(priv, regTXF_WPTR_0);  in bdx_isr_napi()
281 			READ_REG(priv, regRXD_WPTR_0);  in bdx_isr_napi()
328 	master = READ_REG(priv, regINIT_SEMAPHORE);  in bdx_fw_load()
329 	if (!READ_REG(priv, regINIT_STATUS) && master) {  in bdx_fw_load()
337 		if (READ_REG(priv, regINIT_STATUS)) {  in bdx_fw_load()
354 			    READ_REG(priv, regVPC),  in bdx_fw_load()
355 			    READ_REG(priv, regVIC),  in bdx_fw_load()
356 			    READ_REG(priv, regINIT_STATUS), i);  in bdx_fw_load()
370 	    READ_REG(priv, regUNC_MAC0_A),  in bdx_restore_mac()
371 	    READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));  in bdx_restore_mac()
381 	    READ_REG(priv, regUNC_MAC0_A),  in bdx_restore_mac()
382 	    READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));  in bdx_restore_mac()
482 		val = READ_REG(priv, regCLKPLL);  in bdx_hw_reset()
485 		val = READ_REG(priv, regCLKPLL);  in bdx_hw_reset()
490 		if ((READ_REG(priv, regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) {  in bdx_hw_reset()
492 			READ_REG(priv, regRXD_CFG0_0);  in bdx_hw_reset()
514 		if (READ_REG(priv, regRST_PORT) & 1)  in bdx_sw_reset()
525 	READ_REG(priv, regISR);  in bdx_sw_reset()
533 		DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);  in bdx_sw_reset()
548 		DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);  in bdx_sw_reset()
670 		data[2] = READ_REG(priv, data[1]);  in bdx_siocdevprivate()
713 	val = READ_REG(priv, reg);  in __bdx_vlan_rx_vid()
810 			val = READ_REG(priv, reg);  in bdx_setmulti()
846 	macAddress[2] = READ_REG(priv, regUNC_MAC0_A);  in bdx_read_mac()
847 	macAddress[2] = READ_REG(priv, regUNC_MAC0_A);  in bdx_read_mac()
848 	macAddress[1] = READ_REG(priv, regUNC_MAC1_A);  in bdx_read_mac()
849 	macAddress[1] = READ_REG(priv, regUNC_MAC1_A);  in bdx_read_mac()
850 	macAddress[0] = READ_REG(priv, regUNC_MAC2_A);  in bdx_read_mac()
851 	macAddress[0] = READ_REG(priv, regUNC_MAC2_A);  in bdx_read_mac()
864 	val = READ_REG(priv, reg);  in bdx_read_l2stat()
865 	val |= ((u64) READ_REG(priv, reg + 8)) << 32;  in bdx_read_l2stat()
1208 	f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_WR_PTR;  in bdx_rx_receive()
1567 	f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR;  in bdx_tx_space()
1703 	f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_MASK;  in bdx_tx_cleanup()