65 #define ANA_AC_RAM_INIT_RAM_INIT_SET(x)\  argument
66 	FIELD_PREP(ANA_AC_RAM_INIT_RAM_INIT, x)
67 #define ANA_AC_RAM_INIT_RAM_INIT_GET(x)\  argument
68 	FIELD_GET(ANA_AC_RAM_INIT_RAM_INIT, x)
71 #define ANA_AC_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
72 	FIELD_PREP(ANA_AC_RAM_INIT_RAM_CFG_HOOK, x)
73 #define ANA_AC_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
74 	FIELD_GET(ANA_AC_RAM_INIT_RAM_CFG_HOOK, x)
81 #define ANA_AC_OWN_UPSID_OWN_UPSID_SET(x)\  argument
82 	FIELD_PREP(ANA_AC_OWN_UPSID_OWN_UPSID, x)
83 #define ANA_AC_OWN_UPSID_OWN_UPSID_GET(x)\  argument
84 	FIELD_GET(ANA_AC_OWN_UPSID_OWN_UPSID, x)
99 #define ANA_AC_SRC_CFG2_PORT_MASK2_SET(x)\  argument
100 	FIELD_PREP(ANA_AC_SRC_CFG2_PORT_MASK2, x)
101 #define ANA_AC_SRC_CFG2_PORT_MASK2_GET(x)\  argument
102 	FIELD_GET(ANA_AC_SRC_CFG2_PORT_MASK2, x)
117 #define ANA_AC_PGID_CFG2_PORT_MASK2_SET(x)\  argument
118 	FIELD_PREP(ANA_AC_PGID_CFG2_PORT_MASK2, x)
119 #define ANA_AC_PGID_CFG2_PORT_MASK2_GET(x)\  argument
120 	FIELD_GET(ANA_AC_PGID_CFG2_PORT_MASK2, x)
127 #define ANA_AC_PGID_MISC_CFG_PGID_CPU_QU_SET(x)\  argument
128 	FIELD_PREP(ANA_AC_PGID_MISC_CFG_PGID_CPU_QU, x)
129 #define ANA_AC_PGID_MISC_CFG_PGID_CPU_QU_GET(x)\  argument
130 	FIELD_GET(ANA_AC_PGID_MISC_CFG_PGID_CPU_QU, x)
133 #define ANA_AC_PGID_MISC_CFG_STACK_TYPE_ENA_SET(x)\  argument
134 	FIELD_PREP(ANA_AC_PGID_MISC_CFG_STACK_TYPE_ENA, x)
135 #define ANA_AC_PGID_MISC_CFG_STACK_TYPE_ENA_GET(x)\  argument
136 	FIELD_GET(ANA_AC_PGID_MISC_CFG_STACK_TYPE_ENA, x)
139 #define ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_SET(x)\  argument
140 	FIELD_PREP(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, x)
141 #define ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA_GET(x)\  argument
142 	FIELD_GET(ANA_AC_PGID_MISC_CFG_PGID_CPU_COPY_ENA, x)
149 #define ANA_AC_TSN_SF_TSN_STREAM_BLOCK_OVERSIZE_STICKY_SET(x)\  argument
150 	FIELD_PREP(ANA_AC_TSN_SF_TSN_STREAM_BLOCK_OVERSIZE_STICKY, x)
151 #define ANA_AC_TSN_SF_TSN_STREAM_BLOCK_OVERSIZE_STICKY_GET(x)\  argument
152 	FIELD_GET(ANA_AC_TSN_SF_TSN_STREAM_BLOCK_OVERSIZE_STICKY, x)
155 #define ANA_AC_TSN_SF_PORT_NUM_SET(x)\  argument
156 	FIELD_PREP(ANA_AC_TSN_SF_PORT_NUM, x)
157 #define ANA_AC_TSN_SF_PORT_NUM_GET(x)\  argument
158 	FIELD_GET(ANA_AC_TSN_SF_PORT_NUM, x)
165 #define ANA_AC_TSN_SF_CFG_TSN_SGID_SET(x)\  argument
166 	FIELD_PREP(ANA_AC_TSN_SF_CFG_TSN_SGID, x)
167 #define ANA_AC_TSN_SF_CFG_TSN_SGID_GET(x)\  argument
168 	FIELD_GET(ANA_AC_TSN_SF_CFG_TSN_SGID, x)
171 #define ANA_AC_TSN_SF_CFG_TSN_MAX_SDU_SET(x)\  argument
172 	FIELD_PREP(ANA_AC_TSN_SF_CFG_TSN_MAX_SDU, x)
173 #define ANA_AC_TSN_SF_CFG_TSN_MAX_SDU_GET(x)\  argument
174 	FIELD_GET(ANA_AC_TSN_SF_CFG_TSN_MAX_SDU, x)
177 #define ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_ENA_SET(x)\  argument
178 	FIELD_PREP(ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_ENA, x)
179 #define ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_ENA_GET(x)\  argument
180 	FIELD_GET(ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_ENA, x)
183 #define ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_STATE_SET(x)\  argument
184 	FIELD_PREP(ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_STATE, x)
185 #define ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_STATE_GET(x)\  argument
186 	FIELD_GET(ANA_AC_TSN_SF_CFG_BLOCK_OVERSIZE_STATE, x)
193 #define ANA_AC_TSN_SF_STATUS_FRM_LEN_SET(x)\  argument
194 	FIELD_PREP(ANA_AC_TSN_SF_STATUS_FRM_LEN, x)
195 #define ANA_AC_TSN_SF_STATUS_FRM_LEN_GET(x)\  argument
196 	FIELD_GET(ANA_AC_TSN_SF_STATUS_FRM_LEN, x)
199 #define ANA_AC_TSN_SF_STATUS_DLB_DROP_SET(x)\  argument
200 	FIELD_PREP(ANA_AC_TSN_SF_STATUS_DLB_DROP, x)
201 #define ANA_AC_TSN_SF_STATUS_DLB_DROP_GET(x)\  argument
202 	FIELD_GET(ANA_AC_TSN_SF_STATUS_DLB_DROP, x)
205 #define ANA_AC_TSN_SF_STATUS_TSN_SFID_SET(x)\  argument
206 	FIELD_PREP(ANA_AC_TSN_SF_STATUS_TSN_SFID, x)
207 #define ANA_AC_TSN_SF_STATUS_TSN_SFID_GET(x)\  argument
208 	FIELD_GET(ANA_AC_TSN_SF_STATUS_TSN_SFID, x)
211 #define ANA_AC_TSN_SF_STATUS_TSTAMP_VLD_SET(x)\  argument
212 	FIELD_PREP(ANA_AC_TSN_SF_STATUS_TSTAMP_VLD, x)
213 #define ANA_AC_TSN_SF_STATUS_TSTAMP_VLD_GET(x)\  argument
214 	FIELD_GET(ANA_AC_TSN_SF_STATUS_TSTAMP_VLD, x)
221 #define ANA_AC_SG_ACCESS_CTRL_SGID_SET(x)\  argument
222 	FIELD_PREP(ANA_AC_SG_ACCESS_CTRL_SGID, x)
223 #define ANA_AC_SG_ACCESS_CTRL_SGID_GET(x)\  argument
224 	FIELD_GET(ANA_AC_SG_ACCESS_CTRL_SGID, x)
227 #define ANA_AC_SG_ACCESS_CTRL_CONFIG_CHANGE_SET(x)\  argument
228 	FIELD_PREP(ANA_AC_SG_ACCESS_CTRL_CONFIG_CHANGE, x)
229 #define ANA_AC_SG_ACCESS_CTRL_CONFIG_CHANGE_GET(x)\  argument
230 	FIELD_GET(ANA_AC_SG_ACCESS_CTRL_CONFIG_CHANGE, x)
237 #define ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_CLKS_SET(x)\  argument
238 	FIELD_PREP(ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_CLKS, x)
239 #define ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_CLKS_GET(x)\  argument
240 	FIELD_GET(ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_CLKS, x)
243 #define ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_UPDATE_ENA_SET(x)\  argument
244 	FIELD_PREP(ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_UPDATE_ENA, x)
245 #define ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_UPDATE_ENA_GET(x)\  argument
246 	FIELD_GET(ANA_AC_SG_CYCLETIME_UPDATE_PERIOD_SG_CT_UPDATE_ENA, x)
261 #define ANA_AC_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB_SET(x)\  argument
262 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB, x)
263 #define ANA_AC_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB_GET(x)\  argument
264 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_BASE_TIME_SEC_MSB, x)
267 #define ANA_AC_SG_CONFIG_REG_3_LIST_LENGTH_SET(x)\  argument
268 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_LIST_LENGTH, x)
269 #define ANA_AC_SG_CONFIG_REG_3_LIST_LENGTH_GET(x)\  argument
270 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_LIST_LENGTH, x)
273 #define ANA_AC_SG_CONFIG_REG_3_GATE_ENABLE_SET(x)\  argument
274 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_GATE_ENABLE, x)
275 #define ANA_AC_SG_CONFIG_REG_3_GATE_ENABLE_GET(x)\  argument
276 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_GATE_ENABLE, x)
279 #define ANA_AC_SG_CONFIG_REG_3_INIT_IPS_SET(x)\  argument
280 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INIT_IPS, x)
281 #define ANA_AC_SG_CONFIG_REG_3_INIT_IPS_GET(x)\  argument
282 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_INIT_IPS, x)
285 #define ANA_AC_SG_CONFIG_REG_3_INIT_GATE_STATE_SET(x)\  argument
286 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INIT_GATE_STATE, x)
287 #define ANA_AC_SG_CONFIG_REG_3_INIT_GATE_STATE_GET(x)\  argument
288 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_INIT_GATE_STATE, x)
291 #define ANA_AC_SG_CONFIG_REG_3_INVALID_RX_ENA_SET(x)\  argument
292 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INVALID_RX_ENA, x)
293 #define ANA_AC_SG_CONFIG_REG_3_INVALID_RX_ENA_GET(x)\  argument
294 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_INVALID_RX_ENA, x)
297 #define ANA_AC_SG_CONFIG_REG_3_INVALID_RX_SET(x)\  argument
298 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_INVALID_RX, x)
299 #define ANA_AC_SG_CONFIG_REG_3_INVALID_RX_GET(x)\  argument
300 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_INVALID_RX, x)
303 #define ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_ENA_SET(x)\  argument
304 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_ENA, x)
305 #define ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_ENA_GET(x)\  argument
306 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_ENA, x)
309 #define ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_SET(x)\  argument
310 	FIELD_PREP(ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED, x)
311 #define ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED_GET(x)\  argument
312 	FIELD_GET(ANA_AC_SG_CONFIG_REG_3_OCTETS_EXCEEDED, x)
327 #define ANA_AC_SG_GCL_GS_CONFIG_IPS_SET(x)\  argument
328 	FIELD_PREP(ANA_AC_SG_GCL_GS_CONFIG_IPS, x)
329 #define ANA_AC_SG_GCL_GS_CONFIG_IPS_GET(x)\  argument
330 	FIELD_GET(ANA_AC_SG_GCL_GS_CONFIG_IPS, x)
333 #define ANA_AC_SG_GCL_GS_CONFIG_GATE_STATE_SET(x)\  argument
334 	FIELD_PREP(ANA_AC_SG_GCL_GS_CONFIG_GATE_STATE, x)
335 #define ANA_AC_SG_GCL_GS_CONFIG_GATE_STATE_GET(x)\  argument
336 	FIELD_GET(ANA_AC_SG_GCL_GS_CONFIG_GATE_STATE, x)
359 #define ANA_AC_SG_STATUS_REG_3_CFG_CHG_TIME_SEC_MSB_SET(x)\  argument
360 	FIELD_PREP(ANA_AC_SG_STATUS_REG_3_CFG_CHG_TIME_SEC_MSB, x)
361 #define ANA_AC_SG_STATUS_REG_3_CFG_CHG_TIME_SEC_MSB_GET(x)\  argument
362 	FIELD_GET(ANA_AC_SG_STATUS_REG_3_CFG_CHG_TIME_SEC_MSB, x)
365 #define ANA_AC_SG_STATUS_REG_3_GATE_STATE_SET(x)\  argument
366 	FIELD_PREP(ANA_AC_SG_STATUS_REG_3_GATE_STATE, x)
367 #define ANA_AC_SG_STATUS_REG_3_GATE_STATE_GET(x)\  argument
368 	FIELD_GET(ANA_AC_SG_STATUS_REG_3_GATE_STATE, x)
371 #define ANA_AC_SG_STATUS_REG_3_IPS_SET(x)\  argument
372 	FIELD_PREP(ANA_AC_SG_STATUS_REG_3_IPS, x)
373 #define ANA_AC_SG_STATUS_REG_3_IPS_GET(x)\  argument
374 	FIELD_GET(ANA_AC_SG_STATUS_REG_3_IPS, x)
377 #define ANA_AC_SG_STATUS_REG_3_CONFIG_PENDING_SET(x)\  argument
378 	FIELD_PREP(ANA_AC_SG_STATUS_REG_3_CONFIG_PENDING, x)
379 #define ANA_AC_SG_STATUS_REG_3_CONFIG_PENDING_GET(x)\  argument
380 	FIELD_GET(ANA_AC_SG_STATUS_REG_3_CONFIG_PENDING, x)
383 #define ANA_AC_SG_STATUS_REG_3_GCL_OCTET_INDEX_SET(x)\  argument
384 	FIELD_PREP(ANA_AC_SG_STATUS_REG_3_GCL_OCTET_INDEX, x)
385 #define ANA_AC_SG_STATUS_REG_3_GCL_OCTET_INDEX_GET(x)\  argument
386 	FIELD_GET(ANA_AC_SG_STATUS_REG_3_GCL_OCTET_INDEX, x)
397 #define ANA_AC_PORT_SGE_CFG_MASK_SET(x)\  argument
398 	FIELD_PREP(ANA_AC_PORT_SGE_CFG_MASK, x)
399 #define ANA_AC_PORT_SGE_CFG_MASK_GET(x)\  argument
400 	FIELD_GET(ANA_AC_PORT_SGE_CFG_MASK, x)
407 #define ANA_AC_STAT_RESET_RESET_SET(x)\  argument
408 	FIELD_PREP(ANA_AC_STAT_RESET_RESET, x)
409 #define ANA_AC_STAT_RESET_RESET_GET(x)\  argument
410 	FIELD_GET(ANA_AC_STAT_RESET_RESET, x)
417 #define ANA_AC_PORT_STAT_CFG_CFG_PRIO_MASK_SET(x)\  argument
418 	FIELD_PREP(ANA_AC_PORT_STAT_CFG_CFG_PRIO_MASK, x)
419 #define ANA_AC_PORT_STAT_CFG_CFG_PRIO_MASK_GET(x)\  argument
420 	FIELD_GET(ANA_AC_PORT_STAT_CFG_CFG_PRIO_MASK, x)
423 #define ANA_AC_PORT_STAT_CFG_CFG_CNT_FRM_TYPE_SET(x)\  argument
424 	FIELD_PREP(ANA_AC_PORT_STAT_CFG_CFG_CNT_FRM_TYPE, x)
425 #define ANA_AC_PORT_STAT_CFG_CFG_CNT_FRM_TYPE_GET(x)\  argument
426 	FIELD_GET(ANA_AC_PORT_STAT_CFG_CFG_CNT_FRM_TYPE, x)
429 #define ANA_AC_PORT_STAT_CFG_CFG_CNT_BYTE_SET(x)\  argument
430 	FIELD_PREP(ANA_AC_PORT_STAT_CFG_CFG_CNT_BYTE, x)
431 #define ANA_AC_PORT_STAT_CFG_CFG_CNT_BYTE_GET(x)\  argument
432 	FIELD_GET(ANA_AC_PORT_STAT_CFG_CFG_CNT_BYTE, x)
443 #define ANA_AC_ACL_GLOBAL_CNT_FRM_TYPE_CFG_GLOBAL_CFG_CNT_FRM_TYPE_SET(x)\  argument
444 	FIELD_PREP(ANA_AC_ACL_GLOBAL_CNT_FRM_TYPE_CFG_GLOBAL_CFG_CNT_FRM_TYPE, x)
445 #define ANA_AC_ACL_GLOBAL_CNT_FRM_TYPE_CFG_GLOBAL_CFG_CNT_FRM_TYPE_GET(x)\  argument
446 	FIELD_GET(ANA_AC_ACL_GLOBAL_CNT_FRM_TYPE_CFG_GLOBAL_CFG_CNT_FRM_TYPE, x)
453 #define ANA_AC_ACL_STAT_GLOBAL_CFG_GLOBAL_CFG_CNT_BYTE_SET(x)\  argument
454 	FIELD_PREP(ANA_AC_ACL_STAT_GLOBAL_CFG_GLOBAL_CFG_CNT_BYTE, x)
455 #define ANA_AC_ACL_STAT_GLOBAL_CFG_GLOBAL_CFG_CNT_BYTE_GET(x)\  argument
456 	FIELD_GET(ANA_AC_ACL_STAT_GLOBAL_CFG_GLOBAL_CFG_CNT_BYTE, x)
463 #define ANA_AC_ACL_STAT_GLOBAL_EVENT_MASK_GLOBAL_EVENT_MASK_SET(x)\  argument
464 	FIELD_PREP(ANA_AC_ACL_STAT_GLOBAL_EVENT_MASK_GLOBAL_EVENT_MASK, x)
465 #define ANA_AC_ACL_STAT_GLOBAL_EVENT_MASK_GLOBAL_EVENT_MASK_GET(x)\  argument
466 	FIELD_GET(ANA_AC_ACL_STAT_GLOBAL_EVENT_MASK_GLOBAL_EVENT_MASK, x)
473 #define ANA_ACL_VCAP_S2_CFG_SEC_ROUTE_HANDLING_ENA_SET(x)\  argument
474 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_ROUTE_HANDLING_ENA, x)
475 #define ANA_ACL_VCAP_S2_CFG_SEC_ROUTE_HANDLING_ENA_GET(x)\  argument
476 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_ROUTE_HANDLING_ENA, x)
479 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_OAM_ENA_SET(x)\  argument
480 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_OAM_ENA, x)
481 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_OAM_ENA_GET(x)\  argument
482 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_OAM_ENA, x)
485 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_OTHER_ENA_SET(x)\  argument
486 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_OTHER_ENA, x)
487 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_OTHER_ENA_GET(x)\  argument
488 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_OTHER_ENA, x)
491 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_VID_ENA_SET(x)\  argument
492 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_VID_ENA, x)
493 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_VID_ENA_GET(x)\  argument
494 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_VID_ENA, x)
497 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_STD_ENA_SET(x)\  argument
498 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_STD_ENA, x)
499 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_STD_ENA_GET(x)\  argument
500 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_STD_ENA, x)
503 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_ENA_SET(x)\  argument
504 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_ENA, x)
505 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_ENA_GET(x)\  argument
506 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP6_TCPUDP_ENA, x)
509 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP_7TUPLE_ENA_SET(x)\  argument
510 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP_7TUPLE_ENA, x)
511 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP_7TUPLE_ENA_GET(x)\  argument
512 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP_7TUPLE_ENA, x)
515 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_VID_ENA_SET(x)\  argument
516 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_VID_ENA, x)
517 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_VID_ENA_GET(x)\  argument
518 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_VID_ENA, x)
521 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_TCPUDP_ENA_SET(x)\  argument
522 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_TCPUDP_ENA, x)
523 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_TCPUDP_ENA_GET(x)\  argument
524 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_TCPUDP_ENA, x)
527 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_OTHER_ENA_SET(x)\  argument
528 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_OTHER_ENA, x)
529 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_OTHER_ENA_GET(x)\  argument
530 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_IP4_OTHER_ENA, x)
533 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_ARP_ENA_SET(x)\  argument
534 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_ARP_ENA, x)
535 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_ARP_ENA_GET(x)\  argument
536 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_ARP_ENA, x)
539 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_SNAP_ENA_SET(x)\  argument
540 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_SNAP_ENA, x)
541 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_SNAP_ENA_GET(x)\  argument
542 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_SNAP_ENA, x)
545 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_LLC_ENA_SET(x)\  argument
546 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_LLC_ENA, x)
547 #define ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_LLC_ENA_GET(x)\  argument
548 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_TYPE_MAC_LLC_ENA, x)
551 #define ANA_ACL_VCAP_S2_CFG_SEC_ENA_SET(x)\  argument
552 	FIELD_PREP(ANA_ACL_VCAP_S2_CFG_SEC_ENA, x)
553 #define ANA_ACL_VCAP_S2_CFG_SEC_ENA_GET(x)\  argument
554 	FIELD_GET(ANA_ACL_VCAP_S2_CFG_SEC_ENA, x)
561 #define ANA_ACL_SWAP_IP_CTRL_DMAC_REPL_OFFSET_VAL_SET(x)\  argument
562 	FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_DMAC_REPL_OFFSET_VAL, x)
563 #define ANA_ACL_SWAP_IP_CTRL_DMAC_REPL_OFFSET_VAL_GET(x)\  argument
564 	FIELD_GET(ANA_ACL_SWAP_IP_CTRL_DMAC_REPL_OFFSET_VAL, x)
567 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_VAL_SET(x)\  argument
568 	FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_VAL, x)
569 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_VAL_GET(x)\  argument
570 	FIELD_GET(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_VAL, x)
573 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_VAL_SET(x)\  argument
574 	FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_VAL, x)
575 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_VAL_GET(x)\  argument
576 	FIELD_GET(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_VAL, x)
579 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_ENA_SET(x)\  argument
580 	FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_ENA, x)
581 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_ENA_GET(x)\  argument
582 	FIELD_GET(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP6_HOPC_ENA, x)
585 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_ENA_SET(x)\  argument
586 	FIELD_PREP(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_ENA, x)
587 #define ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_ENA_GET(x)\  argument
588 	FIELD_GET(ANA_ACL_SWAP_IP_CTRL_IP_SWAP_IP4_TTL_ENA, x)
595 #define ANA_ACL_VCAP_S2_RLEG_STAT_IRLEG_STAT_MASK_SET(x)\  argument
596 	FIELD_PREP(ANA_ACL_VCAP_S2_RLEG_STAT_IRLEG_STAT_MASK, x)
597 #define ANA_ACL_VCAP_S2_RLEG_STAT_IRLEG_STAT_MASK_GET(x)\  argument
598 	FIELD_GET(ANA_ACL_VCAP_S2_RLEG_STAT_IRLEG_STAT_MASK, x)
601 #define ANA_ACL_VCAP_S2_RLEG_STAT_ERLEG_STAT_MASK_SET(x)\  argument
602 	FIELD_PREP(ANA_ACL_VCAP_S2_RLEG_STAT_ERLEG_STAT_MASK, x)
603 #define ANA_ACL_VCAP_S2_RLEG_STAT_ERLEG_STAT_MASK_GET(x)\  argument
604 	FIELD_GET(ANA_ACL_VCAP_S2_RLEG_STAT_ERLEG_STAT_MASK, x)
611 #define ANA_ACL_VCAP_S2_FRAGMENT_CFG_L4_MIN_LEN_SET(x)\  argument
612 	FIELD_PREP(ANA_ACL_VCAP_S2_FRAGMENT_CFG_L4_MIN_LEN, x)
613 #define ANA_ACL_VCAP_S2_FRAGMENT_CFG_L4_MIN_LEN_GET(x)\  argument
614 	FIELD_GET(ANA_ACL_VCAP_S2_FRAGMENT_CFG_L4_MIN_LEN, x)
617 #define ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_DIS_SET(x)\  argument
618 	FIELD_PREP(ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_DIS, x)
619 #define ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_DIS_GET(x)\  argument
620 	FIELD_GET(ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_DIS, x)
623 #define ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_SET(x)\  argument
624 	FIELD_PREP(ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES, x)
625 #define ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES_GET(x)\  argument
626 	FIELD_GET(ANA_ACL_VCAP_S2_FRAGMENT_CFG_FRAGMENT_OFFSET_THRES, x)
633 #define ANA_ACL_OWN_UPSID_OWN_UPSID_SET(x)\  argument
634 	FIELD_PREP(ANA_ACL_OWN_UPSID_OWN_UPSID, x)
635 #define ANA_ACL_OWN_UPSID_OWN_UPSID_GET(x)\  argument
636 	FIELD_GET(ANA_ACL_OWN_UPSID_OWN_UPSID, x)
643 #define ANA_ACL_VCAP_S2_KEY_SEL_KEY_SEL_ENA_SET(x)\  argument
644 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_KEY_SEL_ENA, x)
645 #define ANA_ACL_VCAP_S2_KEY_SEL_KEY_SEL_ENA_GET(x)\  argument
646 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_KEY_SEL_ENA, x)
649 #define ANA_ACL_VCAP_S2_KEY_SEL_IGR_PORT_MASK_SEL_SET(x)\  argument
650 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IGR_PORT_MASK_SEL, x)
651 #define ANA_ACL_VCAP_S2_KEY_SEL_IGR_PORT_MASK_SEL_GET(x)\  argument
652 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_IGR_PORT_MASK_SEL, x)
655 #define ANA_ACL_VCAP_S2_KEY_SEL_NON_ETH_KEY_SEL_SET(x)\  argument
656 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_NON_ETH_KEY_SEL, x)
657 #define ANA_ACL_VCAP_S2_KEY_SEL_NON_ETH_KEY_SEL_GET(x)\  argument
658 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_NON_ETH_KEY_SEL, x)
661 #define ANA_ACL_VCAP_S2_KEY_SEL_IP4_MC_KEY_SEL_SET(x)\  argument
662 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP4_MC_KEY_SEL, x)
663 #define ANA_ACL_VCAP_S2_KEY_SEL_IP4_MC_KEY_SEL_GET(x)\  argument
664 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_IP4_MC_KEY_SEL, x)
667 #define ANA_ACL_VCAP_S2_KEY_SEL_IP4_UC_KEY_SEL_SET(x)\  argument
668 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP4_UC_KEY_SEL, x)
669 #define ANA_ACL_VCAP_S2_KEY_SEL_IP4_UC_KEY_SEL_GET(x)\  argument
670 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_IP4_UC_KEY_SEL, x)
673 #define ANA_ACL_VCAP_S2_KEY_SEL_IP6_MC_KEY_SEL_SET(x)\  argument
674 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP6_MC_KEY_SEL, x)
675 #define ANA_ACL_VCAP_S2_KEY_SEL_IP6_MC_KEY_SEL_GET(x)\  argument
676 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_IP6_MC_KEY_SEL, x)
679 #define ANA_ACL_VCAP_S2_KEY_SEL_IP6_UC_KEY_SEL_SET(x)\  argument
680 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_IP6_UC_KEY_SEL, x)
681 #define ANA_ACL_VCAP_S2_KEY_SEL_IP6_UC_KEY_SEL_GET(x)\  argument
682 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_IP6_UC_KEY_SEL, x)
685 #define ANA_ACL_VCAP_S2_KEY_SEL_ARP_KEY_SEL_SET(x)\  argument
686 	FIELD_PREP(ANA_ACL_VCAP_S2_KEY_SEL_ARP_KEY_SEL, x)
687 #define ANA_ACL_VCAP_S2_KEY_SEL_ARP_KEY_SEL_GET(x)\  argument
688 	FIELD_GET(ANA_ACL_VCAP_S2_KEY_SEL_ARP_KEY_SEL, x)
703 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_CLM_STICKY_SET(x)\  argument
704 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_CLM_STICKY, x)
705 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_CLM_STICKY_GET(x)\  argument
706 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_CLM_STICKY, x)
709 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_IRLEG_STICKY_SET(x)\  argument
710 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_IRLEG_STICKY, x)
711 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_IRLEG_STICKY_GET(x)\  argument
712 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_IRLEG_STICKY, x)
715 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_ERLEG_STICKY_SET(x)\  argument
716 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_ERLEG_STICKY, x)
717 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_ERLEG_STICKY_GET(x)\  argument
718 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_ERLEG_STICKY, x)
721 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_PORT_STICKY_SET(x)\  argument
722 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_PORT_STICKY, x)
723 #define ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_PORT_STICKY_GET(x)\  argument
724 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_KEY_SEL_PORT_STICKY, x)
727 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM2_STICKY_SET(x)\  argument
728 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM2_STICKY, x)
729 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM2_STICKY_GET(x)\  argument
730 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM2_STICKY, x)
733 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM1_STICKY_SET(x)\  argument
734 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM1_STICKY, x)
735 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM1_STICKY_GET(x)\  argument
736 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_CUSTOM1_STICKY, x)
739 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_OAM_STICKY_SET(x)\  argument
740 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_OAM_STICKY, x)
741 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_OAM_STICKY_GET(x)\  argument
742 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_OAM_STICKY, x)
745 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY_SET(x)\  argument
746 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)
747 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY_GET(x)\  argument
748 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)
751 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY_SET(x)\  argument
752 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)
753 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY_GET(x)\  argument
754 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)
757 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_TCPUDP_STICKY_SET(x)\  argument
758 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_TCPUDP_STICKY, x)
759 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_TCPUDP_STICKY_GET(x)\  argument
760 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_TCPUDP_STICKY, x)
763 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY_SET(x)\  argument
764 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)
765 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY_GET(x)\  argument
766 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)
769 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY_SET(x)\  argument
770 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)
771 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY_GET(x)\  argument
772 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)
775 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY_SET(x)\  argument
776 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)
777 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY_GET(x)\  argument
778 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)
781 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY_SET(x)\  argument
782 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)
783 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY_GET(x)\  argument
784 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)
787 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY_SET(x)\  argument
788 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)
789 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY_GET(x)\  argument
790 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)
793 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_SNAP_STICKY_SET(x)\  argument
794 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_SNAP_STICKY, x)
795 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_SNAP_STICKY_GET(x)\  argument
796 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_SNAP_STICKY, x)
799 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_LLC_STICKY_SET(x)\  argument
800 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_LLC_STICKY, x)
801 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_LLC_STICKY_GET(x)\  argument
802 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_LLC_STICKY, x)
805 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY_SET(x)\  argument
806 	FIELD_PREP(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)
807 #define ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY_GET(x)\  argument
808 	FIELD_GET(ANA_ACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)
815 #define ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT_SET(x)\  argument
816 	FIELD_PREP(ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT, x)
817 #define ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT_GET(x)\  argument
818 	FIELD_GET(ANA_AC_POL_POL_UPD_INT_CFG_POL_UPD_INT, x)
825 #define ANA_AC_POL_BDLB_DLB_CTRL_CLK_PERIOD_01NS_SET(x)\  argument
826 	FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_CLK_PERIOD_01NS, x)
827 #define ANA_AC_POL_BDLB_DLB_CTRL_CLK_PERIOD_01NS_GET(x)\  argument
828 	FIELD_GET(ANA_AC_POL_BDLB_DLB_CTRL_CLK_PERIOD_01NS, x)
831 #define ANA_AC_POL_BDLB_DLB_CTRL_BASE_TICK_CNT_SET(x)\  argument
832 	FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_BASE_TICK_CNT, x)
833 #define ANA_AC_POL_BDLB_DLB_CTRL_BASE_TICK_CNT_GET(x)\  argument
834 	FIELD_GET(ANA_AC_POL_BDLB_DLB_CTRL_BASE_TICK_CNT, x)
837 #define ANA_AC_POL_BDLB_DLB_CTRL_LEAK_ENA_SET(x)\  argument
838 	FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_LEAK_ENA, x)
839 #define ANA_AC_POL_BDLB_DLB_CTRL_LEAK_ENA_GET(x)\  argument
840 	FIELD_GET(ANA_AC_POL_BDLB_DLB_CTRL_LEAK_ENA, x)
843 #define ANA_AC_POL_BDLB_DLB_CTRL_DLB_ADD_ENA_SET(x)\  argument
844 	FIELD_PREP(ANA_AC_POL_BDLB_DLB_CTRL_DLB_ADD_ENA, x)
845 #define ANA_AC_POL_BDLB_DLB_CTRL_DLB_ADD_ENA_GET(x)\  argument
846 	FIELD_GET(ANA_AC_POL_BDLB_DLB_CTRL_DLB_ADD_ENA, x)
853 #define ANA_AC_POL_SLB_DLB_CTRL_CLK_PERIOD_01NS_SET(x)\  argument
854 	FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_CLK_PERIOD_01NS, x)
855 #define ANA_AC_POL_SLB_DLB_CTRL_CLK_PERIOD_01NS_GET(x)\  argument
856 	FIELD_GET(ANA_AC_POL_SLB_DLB_CTRL_CLK_PERIOD_01NS, x)
859 #define ANA_AC_POL_SLB_DLB_CTRL_BASE_TICK_CNT_SET(x)\  argument
860 	FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_BASE_TICK_CNT, x)
861 #define ANA_AC_POL_SLB_DLB_CTRL_BASE_TICK_CNT_GET(x)\  argument
862 	FIELD_GET(ANA_AC_POL_SLB_DLB_CTRL_BASE_TICK_CNT, x)
865 #define ANA_AC_POL_SLB_DLB_CTRL_LEAK_ENA_SET(x)\  argument
866 	FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_LEAK_ENA, x)
867 #define ANA_AC_POL_SLB_DLB_CTRL_LEAK_ENA_GET(x)\  argument
868 	FIELD_GET(ANA_AC_POL_SLB_DLB_CTRL_LEAK_ENA, x)
871 #define ANA_AC_POL_SLB_DLB_CTRL_DLB_ADD_ENA_SET(x)\  argument
872 	FIELD_PREP(ANA_AC_POL_SLB_DLB_CTRL_DLB_ADD_ENA, x)
873 #define ANA_AC_POL_SLB_DLB_CTRL_DLB_ADD_ENA_GET(x)\  argument
874 	FIELD_GET(ANA_AC_POL_SLB_DLB_CTRL_DLB_ADD_ENA, x)
881 #define ANA_AC_SDLB_XLB_START_LBSET_START_SET(x)\  argument
882 	FIELD_PREP(ANA_AC_SDLB_XLB_START_LBSET_START, x)
883 #define ANA_AC_SDLB_XLB_START_LBSET_START_GET(x)\  argument
884 	FIELD_GET(ANA_AC_SDLB_XLB_START_LBSET_START, x)
891 #define ANA_AC_SDLB_PUP_INTERVAL_PUP_INTERVAL_SET(x)\  argument
892 	FIELD_PREP(ANA_AC_SDLB_PUP_INTERVAL_PUP_INTERVAL, x)
893 #define ANA_AC_SDLB_PUP_INTERVAL_PUP_INTERVAL_GET(x)\  argument
894 	FIELD_GET(ANA_AC_SDLB_PUP_INTERVAL_PUP_INTERVAL, x)
901 #define ANA_AC_SDLB_PUP_CTRL_PUP_LB_DT_SET(x)\  argument
902 	FIELD_PREP(ANA_AC_SDLB_PUP_CTRL_PUP_LB_DT, x)
903 #define ANA_AC_SDLB_PUP_CTRL_PUP_LB_DT_GET(x)\  argument
904 	FIELD_GET(ANA_AC_SDLB_PUP_CTRL_PUP_LB_DT, x)
907 #define ANA_AC_SDLB_PUP_CTRL_PUP_ENA_SET(x)\  argument
908 	FIELD_PREP(ANA_AC_SDLB_PUP_CTRL_PUP_ENA, x)
909 #define ANA_AC_SDLB_PUP_CTRL_PUP_ENA_GET(x)\  argument
910 	FIELD_GET(ANA_AC_SDLB_PUP_CTRL_PUP_ENA, x)
917 #define ANA_AC_SDLB_LBGRP_MISC_THRES_SHIFT_SET(x)\  argument
918 	FIELD_PREP(ANA_AC_SDLB_LBGRP_MISC_THRES_SHIFT, x)
919 #define ANA_AC_SDLB_LBGRP_MISC_THRES_SHIFT_GET(x)\  argument
920 	FIELD_GET(ANA_AC_SDLB_LBGRP_MISC_THRES_SHIFT, x)
927 #define ANA_AC_SDLB_FRM_RATE_TOKENS_FRM_RATE_TOKENS_SET(x)\  argument
928 	FIELD_PREP(ANA_AC_SDLB_FRM_RATE_TOKENS_FRM_RATE_TOKENS, x)
929 #define ANA_AC_SDLB_FRM_RATE_TOKENS_FRM_RATE_TOKENS_GET(x)\  argument
930 	FIELD_GET(ANA_AC_SDLB_FRM_RATE_TOKENS_FRM_RATE_TOKENS, x)
937 #define ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_ONGOING_SET(x)\  argument
938 	FIELD_PREP(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_ONGOING, x)
939 #define ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_ONGOING_GET(x)\  argument
940 	FIELD_GET(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_ONGOING, x)
943 #define ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_WAIT_ACK_SET(x)\  argument
944 	FIELD_PREP(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_WAIT_ACK, x)
945 #define ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_WAIT_ACK_GET(x)\  argument
946 	FIELD_GET(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_WAIT_ACK, x)
949 #define ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_LBSET_NEXT_SET(x)\  argument
950 	FIELD_PREP(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_LBSET_NEXT, x)
951 #define ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_LBSET_NEXT_GET(x)\  argument
952 	FIELD_GET(ANA_AC_SDLB_LBGRP_STATE_TBL_PUP_LBSET_NEXT, x)
959 #define ANA_AC_SDLB_PUP_TOKENS_PUP_TOKENS_SET(x)\  argument
960 	FIELD_PREP(ANA_AC_SDLB_PUP_TOKENS_PUP_TOKENS, x)
961 #define ANA_AC_SDLB_PUP_TOKENS_PUP_TOKENS_GET(x)\  argument
962 	FIELD_GET(ANA_AC_SDLB_PUP_TOKENS_PUP_TOKENS, x)
969 #define ANA_AC_SDLB_THRES_THRES_SET(x)\  argument
970 	FIELD_PREP(ANA_AC_SDLB_THRES_THRES, x)
971 #define ANA_AC_SDLB_THRES_THRES_GET(x)\  argument
972 	FIELD_GET(ANA_AC_SDLB_THRES_THRES, x)
975 #define ANA_AC_SDLB_THRES_THRES_HYS_SET(x)\  argument
976 	FIELD_PREP(ANA_AC_SDLB_THRES_THRES_HYS, x)
977 #define ANA_AC_SDLB_THRES_THRES_HYS_GET(x)\  argument
978 	FIELD_GET(ANA_AC_SDLB_THRES_THRES_HYS, x)
985 #define ANA_AC_SDLB_XLB_NEXT_LBSET_NEXT_SET(x)\  argument
986 	FIELD_PREP(ANA_AC_SDLB_XLB_NEXT_LBSET_NEXT, x)
987 #define ANA_AC_SDLB_XLB_NEXT_LBSET_NEXT_GET(x)\  argument
988 	FIELD_GET(ANA_AC_SDLB_XLB_NEXT_LBSET_NEXT, x)
991 #define ANA_AC_SDLB_XLB_NEXT_LBGRP_SET(x)\  argument
992 	FIELD_PREP(ANA_AC_SDLB_XLB_NEXT_LBGRP, x)
993 #define ANA_AC_SDLB_XLB_NEXT_LBGRP_GET(x)\  argument
994 	FIELD_GET(ANA_AC_SDLB_XLB_NEXT_LBGRP, x)
1001 #define ANA_AC_SDLB_INH_CTRL_PUP_TOKENS_MAX_SET(x)\  argument
1002 	FIELD_PREP(ANA_AC_SDLB_INH_CTRL_PUP_TOKENS_MAX, x)
1003 #define ANA_AC_SDLB_INH_CTRL_PUP_TOKENS_MAX_GET(x)\  argument
1004 	FIELD_GET(ANA_AC_SDLB_INH_CTRL_PUP_TOKENS_MAX, x)
1007 #define ANA_AC_SDLB_INH_CTRL_INH_MODE_SET(x)\  argument
1008 	FIELD_PREP(ANA_AC_SDLB_INH_CTRL_INH_MODE, x)
1009 #define ANA_AC_SDLB_INH_CTRL_INH_MODE_GET(x)\  argument
1010 	FIELD_GET(ANA_AC_SDLB_INH_CTRL_INH_MODE, x)
1013 #define ANA_AC_SDLB_INH_CTRL_INH_LB_SET(x)\  argument
1014 	FIELD_PREP(ANA_AC_SDLB_INH_CTRL_INH_LB, x)
1015 #define ANA_AC_SDLB_INH_CTRL_INH_LB_GET(x)\  argument
1016 	FIELD_GET(ANA_AC_SDLB_INH_CTRL_INH_LB, x)
1023 #define ANA_AC_SDLB_INH_LBSET_ADDR_INH_LBSET_ADDR_SET(x)\  argument
1024 	FIELD_PREP(ANA_AC_SDLB_INH_LBSET_ADDR_INH_LBSET_ADDR, x)
1025 #define ANA_AC_SDLB_INH_LBSET_ADDR_INH_LBSET_ADDR_GET(x)\  argument
1026 	FIELD_GET(ANA_AC_SDLB_INH_LBSET_ADDR_INH_LBSET_ADDR, x)
1033 #define ANA_AC_SDLB_DLB_MISC_DLB_FRM_RATE_ENA_SET(x)\  argument
1034 	FIELD_PREP(ANA_AC_SDLB_DLB_MISC_DLB_FRM_RATE_ENA, x)
1035 #define ANA_AC_SDLB_DLB_MISC_DLB_FRM_RATE_ENA_GET(x)\  argument
1036 	FIELD_GET(ANA_AC_SDLB_DLB_MISC_DLB_FRM_RATE_ENA, x)
1039 #define ANA_AC_SDLB_DLB_MISC_MARK_ALL_FRMS_RED_ENA_SET(x)\  argument
1040 	FIELD_PREP(ANA_AC_SDLB_DLB_MISC_MARK_ALL_FRMS_RED_ENA, x)
1041 #define ANA_AC_SDLB_DLB_MISC_MARK_ALL_FRMS_RED_ENA_GET(x)\  argument
1042 	FIELD_GET(ANA_AC_SDLB_DLB_MISC_MARK_ALL_FRMS_RED_ENA, x)
1045 #define ANA_AC_SDLB_DLB_MISC_DLB_FRM_ADJ_SET(x)\  argument
1046 	FIELD_PREP(ANA_AC_SDLB_DLB_MISC_DLB_FRM_ADJ, x)
1047 #define ANA_AC_SDLB_DLB_MISC_DLB_FRM_ADJ_GET(x)\  argument
1048 	FIELD_GET(ANA_AC_SDLB_DLB_MISC_DLB_FRM_ADJ, x)
1055 #define ANA_AC_SDLB_DLB_CFG_DROP_ON_YELLOW_ENA_SET(x)\  argument
1056 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_DROP_ON_YELLOW_ENA, x)
1057 #define ANA_AC_SDLB_DLB_CFG_DROP_ON_YELLOW_ENA_GET(x)\  argument
1058 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_DROP_ON_YELLOW_ENA, x)
1061 #define ANA_AC_SDLB_DLB_CFG_DP_BYPASS_LVL_SET(x)\  argument
1062 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_DP_BYPASS_LVL, x)
1063 #define ANA_AC_SDLB_DLB_CFG_DP_BYPASS_LVL_GET(x)\  argument
1064 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_DP_BYPASS_LVL, x)
1067 #define ANA_AC_SDLB_DLB_CFG_HIER_DLB_DIS_SET(x)\  argument
1068 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_HIER_DLB_DIS, x)
1069 #define ANA_AC_SDLB_DLB_CFG_HIER_DLB_DIS_GET(x)\  argument
1070 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_HIER_DLB_DIS, x)
1073 #define ANA_AC_SDLB_DLB_CFG_ENCAP_DATA_DIS_SET(x)\  argument
1074 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_ENCAP_DATA_DIS, x)
1075 #define ANA_AC_SDLB_DLB_CFG_ENCAP_DATA_DIS_GET(x)\  argument
1076 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_ENCAP_DATA_DIS, x)
1079 #define ANA_AC_SDLB_DLB_CFG_COLOR_AWARE_LVL_SET(x)\  argument
1080 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_COLOR_AWARE_LVL, x)
1081 #define ANA_AC_SDLB_DLB_CFG_COLOR_AWARE_LVL_GET(x)\  argument
1082 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_COLOR_AWARE_LVL, x)
1085 #define ANA_AC_SDLB_DLB_CFG_CIR_INC_DP_VAL_SET(x)\  argument
1086 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_CIR_INC_DP_VAL, x)
1087 #define ANA_AC_SDLB_DLB_CFG_CIR_INC_DP_VAL_GET(x)\  argument
1088 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_CIR_INC_DP_VAL, x)
1091 #define ANA_AC_SDLB_DLB_CFG_DLB_MODE_SET(x)\  argument
1092 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_DLB_MODE, x)
1093 #define ANA_AC_SDLB_DLB_CFG_DLB_MODE_GET(x)\  argument
1094 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_DLB_MODE, x)
1097 #define ANA_AC_SDLB_DLB_CFG_TRAFFIC_TYPE_MASK_SET(x)\  argument
1098 	FIELD_PREP(ANA_AC_SDLB_DLB_CFG_TRAFFIC_TYPE_MASK, x)
1099 #define ANA_AC_SDLB_DLB_CFG_TRAFFIC_TYPE_MASK_GET(x)\  argument
1100 	FIELD_GET(ANA_AC_SDLB_DLB_CFG_TRAFFIC_TYPE_MASK, x)
1107 #define ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS_SET(x)\  argument
1108 	FIELD_PREP(ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS, x)
1109 #define ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS_GET(x)\  argument
1110 	FIELD_GET(ANA_CL_FILTER_CTRL_FILTER_SMAC_MC_DIS, x)
1113 #define ANA_CL_FILTER_CTRL_FILTER_NULL_MAC_DIS_SET(x)\  argument
1114 	FIELD_PREP(ANA_CL_FILTER_CTRL_FILTER_NULL_MAC_DIS, x)
1115 #define ANA_CL_FILTER_CTRL_FILTER_NULL_MAC_DIS_GET(x)\  argument
1116 	FIELD_GET(ANA_CL_FILTER_CTRL_FILTER_NULL_MAC_DIS, x)
1119 #define ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA_SET(x)\  argument
1120 	FIELD_PREP(ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA, x)
1121 #define ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA_GET(x)\  argument
1122 	FIELD_GET(ANA_CL_FILTER_CTRL_FORCE_FCS_UPDATE_ENA, x)
1129 #define ANA_CL_VLAN_FILTER_CTRL_TAG_REQUIRED_ENA_SET(x)\  argument
1130 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_TAG_REQUIRED_ENA, x)
1131 #define ANA_CL_VLAN_FILTER_CTRL_TAG_REQUIRED_ENA_GET(x)\  argument
1132 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_TAG_REQUIRED_ENA, x)
1135 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CTAG_DIS_SET(x)\  argument
1136 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CTAG_DIS, x)
1137 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CTAG_DIS_GET(x)\  argument
1138 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_PRIO_CTAG_DIS, x)
1141 #define ANA_CL_VLAN_FILTER_CTRL_CTAG_DIS_SET(x)\  argument
1142 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CTAG_DIS, x)
1143 #define ANA_CL_VLAN_FILTER_CTRL_CTAG_DIS_GET(x)\  argument
1144 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_CTAG_DIS, x)
1147 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_STAG_DIS_SET(x)\  argument
1148 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_STAG_DIS, x)
1149 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_STAG_DIS_GET(x)\  argument
1150 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_PRIO_STAG_DIS, x)
1153 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST1_STAG_DIS_SET(x)\  argument
1154 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST1_STAG_DIS, x)
1155 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST1_STAG_DIS_GET(x)\  argument
1156 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST1_STAG_DIS, x)
1159 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST2_STAG_DIS_SET(x)\  argument
1160 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST2_STAG_DIS, x)
1161 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST2_STAG_DIS_GET(x)\  argument
1162 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST2_STAG_DIS, x)
1165 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST3_STAG_DIS_SET(x)\  argument
1166 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST3_STAG_DIS, x)
1167 #define ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST3_STAG_DIS_GET(x)\  argument
1168 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_PRIO_CUST3_STAG_DIS, x)
1171 #define ANA_CL_VLAN_FILTER_CTRL_STAG_DIS_SET(x)\  argument
1172 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_STAG_DIS, x)
1173 #define ANA_CL_VLAN_FILTER_CTRL_STAG_DIS_GET(x)\  argument
1174 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_STAG_DIS, x)
1177 #define ANA_CL_VLAN_FILTER_CTRL_CUST1_STAG_DIS_SET(x)\  argument
1178 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CUST1_STAG_DIS, x)
1179 #define ANA_CL_VLAN_FILTER_CTRL_CUST1_STAG_DIS_GET(x)\  argument
1180 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_CUST1_STAG_DIS, x)
1183 #define ANA_CL_VLAN_FILTER_CTRL_CUST2_STAG_DIS_SET(x)\  argument
1184 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CUST2_STAG_DIS, x)
1185 #define ANA_CL_VLAN_FILTER_CTRL_CUST2_STAG_DIS_GET(x)\  argument
1186 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_CUST2_STAG_DIS, x)
1189 #define ANA_CL_VLAN_FILTER_CTRL_CUST3_STAG_DIS_SET(x)\  argument
1190 	FIELD_PREP(ANA_CL_VLAN_FILTER_CTRL_CUST3_STAG_DIS, x)
1191 #define ANA_CL_VLAN_FILTER_CTRL_CUST3_STAG_DIS_GET(x)\  argument
1192 	FIELD_GET(ANA_CL_VLAN_FILTER_CTRL_CUST3_STAG_DIS, x)
1199 #define ANA_CL_ETAG_FILTER_CTRL_ETAG_REQUIRED_ENA_SET(x)\  argument
1200 	FIELD_PREP(ANA_CL_ETAG_FILTER_CTRL_ETAG_REQUIRED_ENA, x)
1201 #define ANA_CL_ETAG_FILTER_CTRL_ETAG_REQUIRED_ENA_GET(x)\  argument
1202 	FIELD_GET(ANA_CL_ETAG_FILTER_CTRL_ETAG_REQUIRED_ENA, x)
1205 #define ANA_CL_ETAG_FILTER_CTRL_ETAG_DIS_SET(x)\  argument
1206 	FIELD_PREP(ANA_CL_ETAG_FILTER_CTRL_ETAG_DIS, x)
1207 #define ANA_CL_ETAG_FILTER_CTRL_ETAG_DIS_GET(x)\  argument
1208 	FIELD_GET(ANA_CL_ETAG_FILTER_CTRL_ETAG_DIS, x)
1215 #define ANA_CL_VLAN_CTRL_PORT_VOE_TPID_AWARE_DIS_SET(x)\  argument
1216 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VOE_TPID_AWARE_DIS, x)
1217 #define ANA_CL_VLAN_CTRL_PORT_VOE_TPID_AWARE_DIS_GET(x)\  argument
1218 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_VOE_TPID_AWARE_DIS, x)
1221 #define ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_PCP_SET(x)\  argument
1222 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_PCP, x)
1223 #define ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_PCP_GET(x)\  argument
1224 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_PCP, x)
1227 #define ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_DEI_SET(x)\  argument
1228 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_DEI, x)
1229 #define ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_DEI_GET(x)\  argument
1230 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_VOE_DEFAULT_DEI, x)
1233 #define ANA_CL_VLAN_CTRL_VLAN_PCP_DEI_TRANS_ENA_SET(x)\  argument
1234 	FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_PCP_DEI_TRANS_ENA, x)
1235 #define ANA_CL_VLAN_CTRL_VLAN_PCP_DEI_TRANS_ENA_GET(x)\  argument
1236 	FIELD_GET(ANA_CL_VLAN_CTRL_VLAN_PCP_DEI_TRANS_ENA, x)
1239 #define ANA_CL_VLAN_CTRL_VLAN_TAG_SEL_SET(x)\  argument
1240 	FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_TAG_SEL, x)
1241 #define ANA_CL_VLAN_CTRL_VLAN_TAG_SEL_GET(x)\  argument
1242 	FIELD_GET(ANA_CL_VLAN_CTRL_VLAN_TAG_SEL, x)
1245 #define ANA_CL_VLAN_CTRL_VLAN_AWARE_ENA_SET(x)\  argument
1246 	FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_AWARE_ENA, x)
1247 #define ANA_CL_VLAN_CTRL_VLAN_AWARE_ENA_GET(x)\  argument
1248 	FIELD_GET(ANA_CL_VLAN_CTRL_VLAN_AWARE_ENA, x)
1251 #define ANA_CL_VLAN_CTRL_VLAN_POP_CNT_SET(x)\  argument
1252 	FIELD_PREP(ANA_CL_VLAN_CTRL_VLAN_POP_CNT, x)
1253 #define ANA_CL_VLAN_CTRL_VLAN_POP_CNT_GET(x)\  argument
1254 	FIELD_GET(ANA_CL_VLAN_CTRL_VLAN_POP_CNT, x)
1257 #define ANA_CL_VLAN_CTRL_PORT_TAG_TYPE_SET(x)\  argument
1258 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_TAG_TYPE, x)
1259 #define ANA_CL_VLAN_CTRL_PORT_TAG_TYPE_GET(x)\  argument
1260 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_TAG_TYPE, x)
1263 #define ANA_CL_VLAN_CTRL_PORT_PCP_SET(x)\  argument
1264 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_PCP, x)
1265 #define ANA_CL_VLAN_CTRL_PORT_PCP_GET(x)\  argument
1266 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_PCP, x)
1269 #define ANA_CL_VLAN_CTRL_PORT_DEI_SET(x)\  argument
1270 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_DEI, x)
1271 #define ANA_CL_VLAN_CTRL_PORT_DEI_GET(x)\  argument
1272 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_DEI, x)
1275 #define ANA_CL_VLAN_CTRL_PORT_VID_SET(x)\  argument
1276 	FIELD_PREP(ANA_CL_VLAN_CTRL_PORT_VID, x)
1277 #define ANA_CL_VLAN_CTRL_PORT_VID_GET(x)\  argument
1278 	FIELD_GET(ANA_CL_VLAN_CTRL_PORT_VID, x)
1285 #define ANA_CL_VLAN_CTRL_2_VLAN_PUSH_CNT_SET(x)\  argument
1286 	FIELD_PREP(ANA_CL_VLAN_CTRL_2_VLAN_PUSH_CNT, x)
1287 #define ANA_CL_VLAN_CTRL_2_VLAN_PUSH_CNT_GET(x)\  argument
1288 	FIELD_GET(ANA_CL_VLAN_CTRL_2_VLAN_PUSH_CNT, x)
1295 #define ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_DP_VAL_SET(x)\  argument
1296 	FIELD_PREP(ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_DP_VAL, x)
1297 #define ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_DP_VAL_GET(x)\  argument
1298 	FIELD_GET(ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_DP_VAL, x)
1301 #define ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_QOS_VAL_SET(x)\  argument
1302 	FIELD_PREP(ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_QOS_VAL, x)
1303 #define ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_QOS_VAL_GET(x)\  argument
1304 	FIELD_GET(ANA_CL_PCP_DEI_MAP_CFG_PCP_DEI_QOS_VAL, x)
1311 #define ANA_CL_QOS_CFG_DEFAULT_COSID_ENA_SET(x)\  argument
1312 	FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_COSID_ENA, x)
1313 #define ANA_CL_QOS_CFG_DEFAULT_COSID_ENA_GET(x)\  argument
1314 	FIELD_GET(ANA_CL_QOS_CFG_DEFAULT_COSID_ENA, x)
1317 #define ANA_CL_QOS_CFG_DEFAULT_COSID_VAL_SET(x)\  argument
1318 	FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_COSID_VAL, x)
1319 #define ANA_CL_QOS_CFG_DEFAULT_COSID_VAL_GET(x)\  argument
1320 	FIELD_GET(ANA_CL_QOS_CFG_DEFAULT_COSID_VAL, x)
1323 #define ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL_SET(x)\  argument
1324 	FIELD_PREP(ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL, x)
1325 #define ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL_GET(x)\  argument
1326 	FIELD_GET(ANA_CL_QOS_CFG_DSCP_REWR_MODE_SEL, x)
1329 #define ANA_CL_QOS_CFG_DSCP_TRANSLATE_ENA_SET(x)\  argument
1330 	FIELD_PREP(ANA_CL_QOS_CFG_DSCP_TRANSLATE_ENA, x)
1331 #define ANA_CL_QOS_CFG_DSCP_TRANSLATE_ENA_GET(x)\  argument
1332 	FIELD_GET(ANA_CL_QOS_CFG_DSCP_TRANSLATE_ENA, x)
1335 #define ANA_CL_QOS_CFG_DSCP_KEEP_ENA_SET(x)\  argument
1336 	FIELD_PREP(ANA_CL_QOS_CFG_DSCP_KEEP_ENA, x)
1337 #define ANA_CL_QOS_CFG_DSCP_KEEP_ENA_GET(x)\  argument
1338 	FIELD_GET(ANA_CL_QOS_CFG_DSCP_KEEP_ENA, x)
1341 #define ANA_CL_QOS_CFG_KEEP_ENA_SET(x)\  argument
1342 	FIELD_PREP(ANA_CL_QOS_CFG_KEEP_ENA, x)
1343 #define ANA_CL_QOS_CFG_KEEP_ENA_GET(x)\  argument
1344 	FIELD_GET(ANA_CL_QOS_CFG_KEEP_ENA, x)
1347 #define ANA_CL_QOS_CFG_PCP_DEI_DP_ENA_SET(x)\  argument
1348 	FIELD_PREP(ANA_CL_QOS_CFG_PCP_DEI_DP_ENA, x)
1349 #define ANA_CL_QOS_CFG_PCP_DEI_DP_ENA_GET(x)\  argument
1350 	FIELD_GET(ANA_CL_QOS_CFG_PCP_DEI_DP_ENA, x)
1353 #define ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA_SET(x)\  argument
1354 	FIELD_PREP(ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA, x)
1355 #define ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA_GET(x)\  argument
1356 	FIELD_GET(ANA_CL_QOS_CFG_PCP_DEI_QOS_ENA, x)
1359 #define ANA_CL_QOS_CFG_DSCP_DP_ENA_SET(x)\  argument
1360 	FIELD_PREP(ANA_CL_QOS_CFG_DSCP_DP_ENA, x)
1361 #define ANA_CL_QOS_CFG_DSCP_DP_ENA_GET(x)\  argument
1362 	FIELD_GET(ANA_CL_QOS_CFG_DSCP_DP_ENA, x)
1365 #define ANA_CL_QOS_CFG_DSCP_QOS_ENA_SET(x)\  argument
1366 	FIELD_PREP(ANA_CL_QOS_CFG_DSCP_QOS_ENA, x)
1367 #define ANA_CL_QOS_CFG_DSCP_QOS_ENA_GET(x)\  argument
1368 	FIELD_GET(ANA_CL_QOS_CFG_DSCP_QOS_ENA, x)
1371 #define ANA_CL_QOS_CFG_DEFAULT_DP_VAL_SET(x)\  argument
1372 	FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_DP_VAL, x)
1373 #define ANA_CL_QOS_CFG_DEFAULT_DP_VAL_GET(x)\  argument
1374 	FIELD_GET(ANA_CL_QOS_CFG_DEFAULT_DP_VAL, x)
1377 #define ANA_CL_QOS_CFG_DEFAULT_QOS_VAL_SET(x)\  argument
1378 	FIELD_PREP(ANA_CL_QOS_CFG_DEFAULT_QOS_VAL, x)
1379 #define ANA_CL_QOS_CFG_DEFAULT_QOS_VAL_GET(x)\  argument
1380 	FIELD_GET(ANA_CL_QOS_CFG_DEFAULT_QOS_VAL, x)
1391 #define ANA_CL_ADV_CL_CFG_2_USE_CL_TCI0_ENA_SET(x)\  argument
1392 	FIELD_PREP(ANA_CL_ADV_CL_CFG_2_USE_CL_TCI0_ENA, x)
1393 #define ANA_CL_ADV_CL_CFG_2_USE_CL_TCI0_ENA_GET(x)\  argument
1394 	FIELD_GET(ANA_CL_ADV_CL_CFG_2_USE_CL_TCI0_ENA, x)
1397 #define ANA_CL_ADV_CL_CFG_2_USE_CL_DSCP_ENA_SET(x)\  argument
1398 	FIELD_PREP(ANA_CL_ADV_CL_CFG_2_USE_CL_DSCP_ENA, x)
1399 #define ANA_CL_ADV_CL_CFG_2_USE_CL_DSCP_ENA_GET(x)\  argument
1400 	FIELD_GET(ANA_CL_ADV_CL_CFG_2_USE_CL_DSCP_ENA, x)
1407 #define ANA_CL_ADV_CL_CFG_IP4_CLM_KEY_SEL_SET(x)\  argument
1408 	FIELD_PREP(ANA_CL_ADV_CL_CFG_IP4_CLM_KEY_SEL, x)
1409 #define ANA_CL_ADV_CL_CFG_IP4_CLM_KEY_SEL_GET(x)\  argument
1410 	FIELD_GET(ANA_CL_ADV_CL_CFG_IP4_CLM_KEY_SEL, x)
1413 #define ANA_CL_ADV_CL_CFG_IP6_CLM_KEY_SEL_SET(x)\  argument
1414 	FIELD_PREP(ANA_CL_ADV_CL_CFG_IP6_CLM_KEY_SEL, x)
1415 #define ANA_CL_ADV_CL_CFG_IP6_CLM_KEY_SEL_GET(x)\  argument
1416 	FIELD_GET(ANA_CL_ADV_CL_CFG_IP6_CLM_KEY_SEL, x)
1419 #define ANA_CL_ADV_CL_CFG_MPLS_UC_CLM_KEY_SEL_SET(x)\  argument
1420 	FIELD_PREP(ANA_CL_ADV_CL_CFG_MPLS_UC_CLM_KEY_SEL, x)
1421 #define ANA_CL_ADV_CL_CFG_MPLS_UC_CLM_KEY_SEL_GET(x)\  argument
1422 	FIELD_GET(ANA_CL_ADV_CL_CFG_MPLS_UC_CLM_KEY_SEL, x)
1425 #define ANA_CL_ADV_CL_CFG_MPLS_MC_CLM_KEY_SEL_SET(x)\  argument
1426 	FIELD_PREP(ANA_CL_ADV_CL_CFG_MPLS_MC_CLM_KEY_SEL, x)
1427 #define ANA_CL_ADV_CL_CFG_MPLS_MC_CLM_KEY_SEL_GET(x)\  argument
1428 	FIELD_GET(ANA_CL_ADV_CL_CFG_MPLS_MC_CLM_KEY_SEL, x)
1431 #define ANA_CL_ADV_CL_CFG_MLBS_CLM_KEY_SEL_SET(x)\  argument
1432 	FIELD_PREP(ANA_CL_ADV_CL_CFG_MLBS_CLM_KEY_SEL, x)
1433 #define ANA_CL_ADV_CL_CFG_MLBS_CLM_KEY_SEL_GET(x)\  argument
1434 	FIELD_GET(ANA_CL_ADV_CL_CFG_MLBS_CLM_KEY_SEL, x)
1437 #define ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL_SET(x)\  argument
1438 	FIELD_PREP(ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL, x)
1439 #define ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL_GET(x)\  argument
1440 	FIELD_GET(ANA_CL_ADV_CL_CFG_ETYPE_CLM_KEY_SEL, x)
1443 #define ANA_CL_ADV_CL_CFG_LOOKUP_ENA_SET(x)\  argument
1444 	FIELD_PREP(ANA_CL_ADV_CL_CFG_LOOKUP_ENA, x)
1445 #define ANA_CL_ADV_CL_CFG_LOOKUP_ENA_GET(x)\  argument
1446 	FIELD_GET(ANA_CL_ADV_CL_CFG_LOOKUP_ENA, x)
1453 #define ANA_CL_OWN_UPSID_OWN_UPSID_SET(x)\  argument
1454 	FIELD_PREP(ANA_CL_OWN_UPSID_OWN_UPSID, x)
1455 #define ANA_CL_OWN_UPSID_OWN_UPSID_GET(x)\  argument
1456 	FIELD_GET(ANA_CL_OWN_UPSID_OWN_UPSID, x)
1463 #define ANA_CL_DSCP_CFG_DSCP_TRANSLATE_VAL_SET(x)\  argument
1464 	FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_TRANSLATE_VAL, x)
1465 #define ANA_CL_DSCP_CFG_DSCP_TRANSLATE_VAL_GET(x)\  argument
1466 	FIELD_GET(ANA_CL_DSCP_CFG_DSCP_TRANSLATE_VAL, x)
1469 #define ANA_CL_DSCP_CFG_DSCP_QOS_VAL_SET(x)\  argument
1470 	FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_QOS_VAL, x)
1471 #define ANA_CL_DSCP_CFG_DSCP_QOS_VAL_GET(x)\  argument
1472 	FIELD_GET(ANA_CL_DSCP_CFG_DSCP_QOS_VAL, x)
1475 #define ANA_CL_DSCP_CFG_DSCP_DP_VAL_SET(x)\  argument
1476 	FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_DP_VAL, x)
1477 #define ANA_CL_DSCP_CFG_DSCP_DP_VAL_GET(x)\  argument
1478 	FIELD_GET(ANA_CL_DSCP_CFG_DSCP_DP_VAL, x)
1481 #define ANA_CL_DSCP_CFG_DSCP_REWR_ENA_SET(x)\  argument
1482 	FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_REWR_ENA, x)
1483 #define ANA_CL_DSCP_CFG_DSCP_REWR_ENA_GET(x)\  argument
1484 	FIELD_GET(ANA_CL_DSCP_CFG_DSCP_REWR_ENA, x)
1487 #define ANA_CL_DSCP_CFG_DSCP_TRUST_ENA_SET(x)\  argument
1488 	FIELD_PREP(ANA_CL_DSCP_CFG_DSCP_TRUST_ENA, x)
1489 #define ANA_CL_DSCP_CFG_DSCP_TRUST_ENA_GET(x)\  argument
1490 	FIELD_GET(ANA_CL_DSCP_CFG_DSCP_TRUST_ENA, x)
1497 #define ANA_CL_QOS_MAP_CFG_DSCP_REWR_VAL_SET(x)\  argument
1498 	FIELD_PREP(ANA_CL_QOS_MAP_CFG_DSCP_REWR_VAL, x)
1499 #define ANA_CL_QOS_MAP_CFG_DSCP_REWR_VAL_GET(x)\  argument
1500 	FIELD_GET(ANA_CL_QOS_MAP_CFG_DSCP_REWR_VAL, x)
1507 #define ANA_L2_FWD_CFG_MAC_TBL_SPLIT_SEL_SET(x)\  argument
1508 	FIELD_PREP(ANA_L2_FWD_CFG_MAC_TBL_SPLIT_SEL, x)
1509 #define ANA_L2_FWD_CFG_MAC_TBL_SPLIT_SEL_GET(x)\  argument
1510 	FIELD_GET(ANA_L2_FWD_CFG_MAC_TBL_SPLIT_SEL, x)
1513 #define ANA_L2_FWD_CFG_PORT_DEFAULT_BDLB_ENA_SET(x)\  argument
1514 	FIELD_PREP(ANA_L2_FWD_CFG_PORT_DEFAULT_BDLB_ENA, x)
1515 #define ANA_L2_FWD_CFG_PORT_DEFAULT_BDLB_ENA_GET(x)\  argument
1516 	FIELD_GET(ANA_L2_FWD_CFG_PORT_DEFAULT_BDLB_ENA, x)
1519 #define ANA_L2_FWD_CFG_QUEUE_DEFAULT_SDLB_ENA_SET(x)\  argument
1520 	FIELD_PREP(ANA_L2_FWD_CFG_QUEUE_DEFAULT_SDLB_ENA, x)
1521 #define ANA_L2_FWD_CFG_QUEUE_DEFAULT_SDLB_ENA_GET(x)\  argument
1522 	FIELD_GET(ANA_L2_FWD_CFG_QUEUE_DEFAULT_SDLB_ENA, x)
1525 #define ANA_L2_FWD_CFG_ISDX_LOOKUP_ENA_SET(x)\  argument
1526 	FIELD_PREP(ANA_L2_FWD_CFG_ISDX_LOOKUP_ENA, x)
1527 #define ANA_L2_FWD_CFG_ISDX_LOOKUP_ENA_GET(x)\  argument
1528 	FIELD_GET(ANA_L2_FWD_CFG_ISDX_LOOKUP_ENA, x)
1531 #define ANA_L2_FWD_CFG_CPU_DMAC_QU_SET(x)\  argument
1532 	FIELD_PREP(ANA_L2_FWD_CFG_CPU_DMAC_QU, x)
1533 #define ANA_L2_FWD_CFG_CPU_DMAC_QU_GET(x)\  argument
1534 	FIELD_GET(ANA_L2_FWD_CFG_CPU_DMAC_QU, x)
1537 #define ANA_L2_FWD_CFG_LOOPBACK_ENA_SET(x)\  argument
1538 	FIELD_PREP(ANA_L2_FWD_CFG_LOOPBACK_ENA, x)
1539 #define ANA_L2_FWD_CFG_LOOPBACK_ENA_GET(x)\  argument
1540 	FIELD_GET(ANA_L2_FWD_CFG_LOOPBACK_ENA, x)
1543 #define ANA_L2_FWD_CFG_CPU_DMAC_COPY_ENA_SET(x)\  argument
1544 	FIELD_PREP(ANA_L2_FWD_CFG_CPU_DMAC_COPY_ENA, x)
1545 #define ANA_L2_FWD_CFG_CPU_DMAC_COPY_ENA_GET(x)\  argument
1546 	FIELD_GET(ANA_L2_FWD_CFG_CPU_DMAC_COPY_ENA, x)
1549 #define ANA_L2_FWD_CFG_FILTER_MODE_SEL_SET(x)\  argument
1550 	FIELD_PREP(ANA_L2_FWD_CFG_FILTER_MODE_SEL, x)
1551 #define ANA_L2_FWD_CFG_FILTER_MODE_SEL_GET(x)\  argument
1552 	FIELD_GET(ANA_L2_FWD_CFG_FILTER_MODE_SEL, x)
1555 #define ANA_L2_FWD_CFG_FLOOD_MIRROR_ENA_SET(x)\  argument
1556 	FIELD_PREP(ANA_L2_FWD_CFG_FLOOD_MIRROR_ENA, x)
1557 #define ANA_L2_FWD_CFG_FLOOD_MIRROR_ENA_GET(x)\  argument
1558 	FIELD_GET(ANA_L2_FWD_CFG_FLOOD_MIRROR_ENA, x)
1561 #define ANA_L2_FWD_CFG_FLOOD_IGNORE_VLAN_ENA_SET(x)\  argument
1562 	FIELD_PREP(ANA_L2_FWD_CFG_FLOOD_IGNORE_VLAN_ENA, x)
1563 #define ANA_L2_FWD_CFG_FLOOD_IGNORE_VLAN_ENA_GET(x)\  argument
1564 	FIELD_GET(ANA_L2_FWD_CFG_FLOOD_IGNORE_VLAN_ENA, x)
1567 #define ANA_L2_FWD_CFG_FLOOD_CPU_COPY_ENA_SET(x)\  argument
1568 	FIELD_PREP(ANA_L2_FWD_CFG_FLOOD_CPU_COPY_ENA, x)
1569 #define ANA_L2_FWD_CFG_FLOOD_CPU_COPY_ENA_GET(x)\  argument
1570 	FIELD_GET(ANA_L2_FWD_CFG_FLOOD_CPU_COPY_ENA, x)
1573 #define ANA_L2_FWD_CFG_FWD_ENA_SET(x)\  argument
1574 	FIELD_PREP(ANA_L2_FWD_CFG_FWD_ENA, x)
1575 #define ANA_L2_FWD_CFG_FWD_ENA_GET(x)\  argument
1576 	FIELD_GET(ANA_L2_FWD_CFG_FWD_ENA, x)
1591 #define ANA_L2_AUTO_LRN_CFG2_AUTO_LRN_ENA2_SET(x)\  argument
1592 	FIELD_PREP(ANA_L2_AUTO_LRN_CFG2_AUTO_LRN_ENA2, x)
1593 #define ANA_L2_AUTO_LRN_CFG2_AUTO_LRN_ENA2_GET(x)\  argument
1594 	FIELD_GET(ANA_L2_AUTO_LRN_CFG2_AUTO_LRN_ENA2, x)
1601 #define ANA_L2_OWN_UPSID_OWN_UPSID_SET(x)\  argument
1602 	FIELD_PREP(ANA_L2_OWN_UPSID_OWN_UPSID, x)
1603 #define ANA_L2_OWN_UPSID_OWN_UPSID_GET(x)\  argument
1604 	FIELD_GET(ANA_L2_OWN_UPSID_OWN_UPSID, x)
1611 #define ANA_L2_DLB_CFG_DLB_IDX_SET(x)\  argument
1612 	FIELD_PREP(ANA_L2_DLB_CFG_DLB_IDX, x)
1613 #define ANA_L2_DLB_CFG_DLB_IDX_GET(x)\  argument
1614 	FIELD_GET(ANA_L2_DLB_CFG_DLB_IDX, x)
1621 #define ANA_L2_TSN_CFG_TSN_SFID_SET(x)\  argument
1622 	FIELD_PREP(ANA_L2_TSN_CFG_TSN_SFID, x)
1623 #define ANA_L2_TSN_CFG_TSN_SFID_GET(x)\  argument
1624 	FIELD_GET(ANA_L2_TSN_CFG_TSN_SFID, x)
1631 #define ANA_L3_VLAN_CTRL_VLAN_ENA_SET(x)\  argument
1632 	FIELD_PREP(ANA_L3_VLAN_CTRL_VLAN_ENA, x)
1633 #define ANA_L3_VLAN_CTRL_VLAN_ENA_GET(x)\  argument
1634 	FIELD_GET(ANA_L3_VLAN_CTRL_VLAN_ENA, x)
1641 #define ANA_L3_VLAN_CFG_VLAN_MSTP_PTR_SET(x)\  argument
1642 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_MSTP_PTR, x)
1643 #define ANA_L3_VLAN_CFG_VLAN_MSTP_PTR_GET(x)\  argument
1644 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_MSTP_PTR, x)
1647 #define ANA_L3_VLAN_CFG_VLAN_FID_SET(x)\  argument
1648 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_FID, x)
1649 #define ANA_L3_VLAN_CFG_VLAN_FID_GET(x)\  argument
1650 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_FID, x)
1653 #define ANA_L3_VLAN_CFG_VLAN_IGR_FILTER_ENA_SET(x)\  argument
1654 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_IGR_FILTER_ENA, x)
1655 #define ANA_L3_VLAN_CFG_VLAN_IGR_FILTER_ENA_GET(x)\  argument
1656 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_IGR_FILTER_ENA, x)
1659 #define ANA_L3_VLAN_CFG_VLAN_SEC_FWD_ENA_SET(x)\  argument
1660 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_SEC_FWD_ENA, x)
1661 #define ANA_L3_VLAN_CFG_VLAN_SEC_FWD_ENA_GET(x)\  argument
1662 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_SEC_FWD_ENA, x)
1665 #define ANA_L3_VLAN_CFG_VLAN_FLOOD_DIS_SET(x)\  argument
1666 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_FLOOD_DIS, x)
1667 #define ANA_L3_VLAN_CFG_VLAN_FLOOD_DIS_GET(x)\  argument
1668 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_FLOOD_DIS, x)
1671 #define ANA_L3_VLAN_CFG_VLAN_LRN_DIS_SET(x)\  argument
1672 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_LRN_DIS, x)
1673 #define ANA_L3_VLAN_CFG_VLAN_LRN_DIS_GET(x)\  argument
1674 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_LRN_DIS, x)
1677 #define ANA_L3_VLAN_CFG_VLAN_RLEG_ENA_SET(x)\  argument
1678 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_RLEG_ENA, x)
1679 #define ANA_L3_VLAN_CFG_VLAN_RLEG_ENA_GET(x)\  argument
1680 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_RLEG_ENA, x)
1683 #define ANA_L3_VLAN_CFG_VLAN_PRIVATE_ENA_SET(x)\  argument
1684 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_PRIVATE_ENA, x)
1685 #define ANA_L3_VLAN_CFG_VLAN_PRIVATE_ENA_GET(x)\  argument
1686 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_PRIVATE_ENA, x)
1689 #define ANA_L3_VLAN_CFG_VLAN_MIRROR_ENA_SET(x)\  argument
1690 	FIELD_PREP(ANA_L3_VLAN_CFG_VLAN_MIRROR_ENA, x)
1691 #define ANA_L3_VLAN_CFG_VLAN_MIRROR_ENA_GET(x)\  argument
1692 	FIELD_GET(ANA_L3_VLAN_CFG_VLAN_MIRROR_ENA, x)
1707 #define ANA_L3_VLAN_MASK_CFG2_VLAN_PORT_MASK2_SET(x)\  argument
1708 	FIELD_PREP(ANA_L3_VLAN_MASK_CFG2_VLAN_PORT_MASK2, x)
1709 #define ANA_L3_VLAN_MASK_CFG2_VLAN_PORT_MASK2_GET(x)\  argument
1710 	FIELD_GET(ANA_L3_VLAN_MASK_CFG2_VLAN_PORT_MASK2, x)
2073 #define ASM_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT_SET(x)\  argument
2074 	FIELD_PREP(ASM_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT, x)
2075 #define ASM_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT_GET(x)\  argument
2076 	FIELD_GET(ASM_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT, x)
2083 #define ASM_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT_SET(x)\  argument
2084 	FIELD_PREP(ASM_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT, x)
2085 #define ASM_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT_GET(x)\  argument
2086 	FIELD_GET(ASM_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT, x)
2093 #define ASM_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT_SET(x)\  argument
2094 	FIELD_PREP(ASM_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT, x)
2095 #define ASM_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT_GET(x)\  argument
2096 	FIELD_GET(ASM_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT, x)
2103 #define ASM_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT_SET(x)\  argument
2104 	FIELD_PREP(ASM_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT, x)
2105 #define ASM_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT_GET(x)\  argument
2106 	FIELD_GET(ASM_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT, x)
2113 #define ASM_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT_SET(x)\  argument
2114 	FIELD_PREP(ASM_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT, x)
2115 #define ASM_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT_GET(x)\  argument
2116 	FIELD_GET(ASM_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT, x)
2123 #define ASM_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT_SET(x)\  argument
2124 	FIELD_PREP(ASM_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT, x)
2125 #define ASM_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT_GET(x)\  argument
2126 	FIELD_GET(ASM_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT, x)
2133 #define ASM_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT_SET(x)\  argument
2134 	FIELD_PREP(ASM_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT, x)
2135 #define ASM_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT_GET(x)\  argument
2136 	FIELD_GET(ASM_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT, x)
2143 #define ASM_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT_SET(x)\  argument
2144 	FIELD_PREP(ASM_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT, x)
2145 #define ASM_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT_GET(x)\  argument
2146 	FIELD_GET(ASM_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT, x)
2157 #define ASM_STAT_CFG_STAT_CNT_CLR_SHOT_SET(x)\  argument
2158 	FIELD_PREP(ASM_STAT_CFG_STAT_CNT_CLR_SHOT, x)
2159 #define ASM_STAT_CFG_STAT_CNT_CLR_SHOT_GET(x)\  argument
2160 	FIELD_GET(ASM_STAT_CFG_STAT_CNT_CLR_SHOT, x)
2167 #define ASM_PORT_CFG_CSC_STAT_DIS_SET(x)\  argument
2168 	FIELD_PREP(ASM_PORT_CFG_CSC_STAT_DIS, x)
2169 #define ASM_PORT_CFG_CSC_STAT_DIS_GET(x)\  argument
2170 	FIELD_GET(ASM_PORT_CFG_CSC_STAT_DIS, x)
2173 #define ASM_PORT_CFG_HIH_AFTER_PREAMBLE_ENA_SET(x)\  argument
2174 	FIELD_PREP(ASM_PORT_CFG_HIH_AFTER_PREAMBLE_ENA, x)
2175 #define ASM_PORT_CFG_HIH_AFTER_PREAMBLE_ENA_GET(x)\  argument
2176 	FIELD_GET(ASM_PORT_CFG_HIH_AFTER_PREAMBLE_ENA, x)
2179 #define ASM_PORT_CFG_IGN_TAXI_ABORT_ENA_SET(x)\  argument
2180 	FIELD_PREP(ASM_PORT_CFG_IGN_TAXI_ABORT_ENA, x)
2181 #define ASM_PORT_CFG_IGN_TAXI_ABORT_ENA_GET(x)\  argument
2182 	FIELD_GET(ASM_PORT_CFG_IGN_TAXI_ABORT_ENA, x)
2185 #define ASM_PORT_CFG_NO_PREAMBLE_ENA_SET(x)\  argument
2186 	FIELD_PREP(ASM_PORT_CFG_NO_PREAMBLE_ENA, x)
2187 #define ASM_PORT_CFG_NO_PREAMBLE_ENA_GET(x)\  argument
2188 	FIELD_GET(ASM_PORT_CFG_NO_PREAMBLE_ENA, x)
2191 #define ASM_PORT_CFG_SKIP_PREAMBLE_ENA_SET(x)\  argument
2192 	FIELD_PREP(ASM_PORT_CFG_SKIP_PREAMBLE_ENA, x)
2193 #define ASM_PORT_CFG_SKIP_PREAMBLE_ENA_GET(x)\  argument
2194 	FIELD_GET(ASM_PORT_CFG_SKIP_PREAMBLE_ENA, x)
2197 #define ASM_PORT_CFG_FRM_AGING_DIS_SET(x)\  argument
2198 	FIELD_PREP(ASM_PORT_CFG_FRM_AGING_DIS, x)
2199 #define ASM_PORT_CFG_FRM_AGING_DIS_GET(x)\  argument
2200 	FIELD_GET(ASM_PORT_CFG_FRM_AGING_DIS, x)
2203 #define ASM_PORT_CFG_PAD_ENA_SET(x)\  argument
2204 	FIELD_PREP(ASM_PORT_CFG_PAD_ENA, x)
2205 #define ASM_PORT_CFG_PAD_ENA_GET(x)\  argument
2206 	FIELD_GET(ASM_PORT_CFG_PAD_ENA, x)
2209 #define ASM_PORT_CFG_INJ_DISCARD_CFG_SET(x)\  argument
2210 	FIELD_PREP(ASM_PORT_CFG_INJ_DISCARD_CFG, x)
2211 #define ASM_PORT_CFG_INJ_DISCARD_CFG_GET(x)\  argument
2212 	FIELD_GET(ASM_PORT_CFG_INJ_DISCARD_CFG, x)
2215 #define ASM_PORT_CFG_INJ_FORMAT_CFG_SET(x)\  argument
2216 	FIELD_PREP(ASM_PORT_CFG_INJ_FORMAT_CFG, x)
2217 #define ASM_PORT_CFG_INJ_FORMAT_CFG_GET(x)\  argument
2218 	FIELD_GET(ASM_PORT_CFG_INJ_FORMAT_CFG, x)
2221 #define ASM_PORT_CFG_VSTAX2_AWR_ENA_SET(x)\  argument
2222 	FIELD_PREP(ASM_PORT_CFG_VSTAX2_AWR_ENA, x)
2223 #define ASM_PORT_CFG_VSTAX2_AWR_ENA_GET(x)\  argument
2224 	FIELD_GET(ASM_PORT_CFG_VSTAX2_AWR_ENA, x)
2227 #define ASM_PORT_CFG_PFRM_FLUSH_SET(x)\  argument
2228 	FIELD_PREP(ASM_PORT_CFG_PFRM_FLUSH, x)
2229 #define ASM_PORT_CFG_PFRM_FLUSH_GET(x)\  argument
2230 	FIELD_GET(ASM_PORT_CFG_PFRM_FLUSH, x)
2237 #define ASM_RAM_INIT_RAM_INIT_SET(x)\  argument
2238 	FIELD_PREP(ASM_RAM_INIT_RAM_INIT, x)
2239 #define ASM_RAM_INIT_RAM_INIT_GET(x)\  argument
2240 	FIELD_GET(ASM_RAM_INIT_RAM_INIT, x)
2243 #define ASM_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
2244 	FIELD_PREP(ASM_RAM_INIT_RAM_CFG_HOOK, x)
2245 #define ASM_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
2246 	FIELD_GET(ASM_RAM_INIT_RAM_CFG_HOOK, x)
2253 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV_SET(x)\  argument
2254 	FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV, x)
2255 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV_GET(x)\  argument
2256 	FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_DIV, x)
2259 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV_SET(x)\  argument
2260 	FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV, x)
2261 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV_GET(x)\  argument
2262 	FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_PRE_DIV, x)
2265 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR_SET(x)\  argument
2266 	FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR, x)
2267 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR_GET(x)\  argument
2268 	FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_DIR, x)
2271 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL_SET(x)\  argument
2272 	FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL, x)
2273 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL_GET(x)\  argument
2274 	FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_SEL, x)
2277 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA_SET(x)\  argument
2278 	FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA, x)
2279 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA_GET(x)\  argument
2280 	FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_ROT_ENA, x)
2283 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA_SET(x)\  argument
2284 	FIELD_PREP(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA, x)
2285 #define CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA_GET(x)\  argument
2286 	FIELD_GET(CLKGEN_LCPLL1_CORE_CLK_CFG_CORE_CLK_ENA, x)
2293 #define CPU_PROC_CTRL_AARCH64_MODE_ENA_SET(x)\  argument
2294 	FIELD_PREP(CPU_PROC_CTRL_AARCH64_MODE_ENA, x)
2295 #define CPU_PROC_CTRL_AARCH64_MODE_ENA_GET(x)\  argument
2296 	FIELD_GET(CPU_PROC_CTRL_AARCH64_MODE_ENA, x)
2299 #define CPU_PROC_CTRL_L2_RST_INVALIDATE_DIS_SET(x)\  argument
2300 	FIELD_PREP(CPU_PROC_CTRL_L2_RST_INVALIDATE_DIS, x)
2301 #define CPU_PROC_CTRL_L2_RST_INVALIDATE_DIS_GET(x)\  argument
2302 	FIELD_GET(CPU_PROC_CTRL_L2_RST_INVALIDATE_DIS, x)
2305 #define CPU_PROC_CTRL_L1_RST_INVALIDATE_DIS_SET(x)\  argument
2306 	FIELD_PREP(CPU_PROC_CTRL_L1_RST_INVALIDATE_DIS, x)
2307 #define CPU_PROC_CTRL_L1_RST_INVALIDATE_DIS_GET(x)\  argument
2308 	FIELD_GET(CPU_PROC_CTRL_L1_RST_INVALIDATE_DIS, x)
2311 #define CPU_PROC_CTRL_BE_EXCEP_MODE_SET(x)\  argument
2312 	FIELD_PREP(CPU_PROC_CTRL_BE_EXCEP_MODE, x)
2313 #define CPU_PROC_CTRL_BE_EXCEP_MODE_GET(x)\  argument
2314 	FIELD_GET(CPU_PROC_CTRL_BE_EXCEP_MODE, x)
2317 #define CPU_PROC_CTRL_VINITHI_SET(x)\  argument
2318 	FIELD_PREP(CPU_PROC_CTRL_VINITHI, x)
2319 #define CPU_PROC_CTRL_VINITHI_GET(x)\  argument
2320 	FIELD_GET(CPU_PROC_CTRL_VINITHI, x)
2323 #define CPU_PROC_CTRL_CFGTE_SET(x)\  argument
2324 	FIELD_PREP(CPU_PROC_CTRL_CFGTE, x)
2325 #define CPU_PROC_CTRL_CFGTE_GET(x)\  argument
2326 	FIELD_GET(CPU_PROC_CTRL_CFGTE, x)
2329 #define CPU_PROC_CTRL_CP15S_DISABLE_SET(x)\  argument
2330 	FIELD_PREP(CPU_PROC_CTRL_CP15S_DISABLE, x)
2331 #define CPU_PROC_CTRL_CP15S_DISABLE_GET(x)\  argument
2332 	FIELD_GET(CPU_PROC_CTRL_CP15S_DISABLE, x)
2335 #define CPU_PROC_CTRL_PROC_CRYPTO_DISABLE_SET(x)\  argument
2336 	FIELD_PREP(CPU_PROC_CTRL_PROC_CRYPTO_DISABLE, x)
2337 #define CPU_PROC_CTRL_PROC_CRYPTO_DISABLE_GET(x)\  argument
2338 	FIELD_GET(CPU_PROC_CTRL_PROC_CRYPTO_DISABLE, x)
2341 #define CPU_PROC_CTRL_ACP_CACHE_FORCE_ENA_SET(x)\  argument
2342 	FIELD_PREP(CPU_PROC_CTRL_ACP_CACHE_FORCE_ENA, x)
2343 #define CPU_PROC_CTRL_ACP_CACHE_FORCE_ENA_GET(x)\  argument
2344 	FIELD_GET(CPU_PROC_CTRL_ACP_CACHE_FORCE_ENA, x)
2347 #define CPU_PROC_CTRL_ACP_AWCACHE_SET(x)\  argument
2348 	FIELD_PREP(CPU_PROC_CTRL_ACP_AWCACHE, x)
2349 #define CPU_PROC_CTRL_ACP_AWCACHE_GET(x)\  argument
2350 	FIELD_GET(CPU_PROC_CTRL_ACP_AWCACHE, x)
2353 #define CPU_PROC_CTRL_ACP_ARCACHE_SET(x)\  argument
2354 	FIELD_PREP(CPU_PROC_CTRL_ACP_ARCACHE, x)
2355 #define CPU_PROC_CTRL_ACP_ARCACHE_GET(x)\  argument
2356 	FIELD_GET(CPU_PROC_CTRL_ACP_ARCACHE, x)
2359 #define CPU_PROC_CTRL_L2_FLUSH_REQ_SET(x)\  argument
2360 	FIELD_PREP(CPU_PROC_CTRL_L2_FLUSH_REQ, x)
2361 #define CPU_PROC_CTRL_L2_FLUSH_REQ_GET(x)\  argument
2362 	FIELD_GET(CPU_PROC_CTRL_L2_FLUSH_REQ, x)
2365 #define CPU_PROC_CTRL_ACP_DISABLE_SET(x)\  argument
2366 	FIELD_PREP(CPU_PROC_CTRL_ACP_DISABLE, x)
2367 #define CPU_PROC_CTRL_ACP_DISABLE_GET(x)\  argument
2368 	FIELD_GET(CPU_PROC_CTRL_ACP_DISABLE, x)
2375 #define DEV10G_MAC_ENA_CFG_RX_ENA_SET(x)\  argument
2376 	FIELD_PREP(DEV10G_MAC_ENA_CFG_RX_ENA, x)
2377 #define DEV10G_MAC_ENA_CFG_RX_ENA_GET(x)\  argument
2378 	FIELD_GET(DEV10G_MAC_ENA_CFG_RX_ENA, x)
2381 #define DEV10G_MAC_ENA_CFG_TX_ENA_SET(x)\  argument
2382 	FIELD_PREP(DEV10G_MAC_ENA_CFG_TX_ENA, x)
2383 #define DEV10G_MAC_ENA_CFG_TX_ENA_GET(x)\  argument
2384 	FIELD_GET(DEV10G_MAC_ENA_CFG_TX_ENA, x)
2391 #define DEV10G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK_SET(x)\  argument
2392 	FIELD_PREP(DEV10G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)
2393 #define DEV10G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK_GET(x)\  argument
2394 	FIELD_GET(DEV10G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)
2397 #define DEV10G_MAC_MAXLEN_CFG_MAX_LEN_SET(x)\  argument
2398 	FIELD_PREP(DEV10G_MAC_MAXLEN_CFG_MAX_LEN, x)
2399 #define DEV10G_MAC_MAXLEN_CFG_MAX_LEN_GET(x)\  argument
2400 	FIELD_GET(DEV10G_MAC_MAXLEN_CFG_MAX_LEN, x)
2407 #define DEV10G_MAC_NUM_TAGS_CFG_NUM_TAGS_SET(x)\  argument
2408 	FIELD_PREP(DEV10G_MAC_NUM_TAGS_CFG_NUM_TAGS, x)
2409 #define DEV10G_MAC_NUM_TAGS_CFG_NUM_TAGS_GET(x)\  argument
2410 	FIELD_GET(DEV10G_MAC_NUM_TAGS_CFG_NUM_TAGS, x)
2417 #define DEV10G_MAC_TAGS_CFG_TAG_ID_SET(x)\  argument
2418 	FIELD_PREP(DEV10G_MAC_TAGS_CFG_TAG_ID, x)
2419 #define DEV10G_MAC_TAGS_CFG_TAG_ID_GET(x)\  argument
2420 	FIELD_GET(DEV10G_MAC_TAGS_CFG_TAG_ID, x)
2423 #define DEV10G_MAC_TAGS_CFG_TAG_ENA_SET(x)\  argument
2424 	FIELD_PREP(DEV10G_MAC_TAGS_CFG_TAG_ENA, x)
2425 #define DEV10G_MAC_TAGS_CFG_TAG_ENA_GET(x)\  argument
2426 	FIELD_GET(DEV10G_MAC_TAGS_CFG_TAG_ENA, x)
2433 #define DEV10G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA_SET(x)\  argument
2434 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)
2435 #define DEV10G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA_GET(x)\  argument
2436 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)
2439 #define DEV10G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA_SET(x)\  argument
2440 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)
2441 #define DEV10G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA_GET(x)\  argument
2442 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)
2445 #define DEV10G_MAC_ADV_CHK_CFG_SFD_CHK_ENA_SET(x)\  argument
2446 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)
2447 #define DEV10G_MAC_ADV_CHK_CFG_SFD_CHK_ENA_GET(x)\  argument
2448 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)
2451 #define DEV10G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS_SET(x)\  argument
2452 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)
2453 #define DEV10G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS_GET(x)\  argument
2454 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)
2457 #define DEV10G_MAC_ADV_CHK_CFG_PRM_CHK_ENA_SET(x)\  argument
2458 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)
2459 #define DEV10G_MAC_ADV_CHK_CFG_PRM_CHK_ENA_GET(x)\  argument
2460 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)
2463 #define DEV10G_MAC_ADV_CHK_CFG_OOR_ERR_ENA_SET(x)\  argument
2464 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)
2465 #define DEV10G_MAC_ADV_CHK_CFG_OOR_ERR_ENA_GET(x)\  argument
2466 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)
2469 #define DEV10G_MAC_ADV_CHK_CFG_INR_ERR_ENA_SET(x)\  argument
2470 	FIELD_PREP(DEV10G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)
2471 #define DEV10G_MAC_ADV_CHK_CFG_INR_ERR_ENA_GET(x)\  argument
2472 	FIELD_GET(DEV10G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)
2479 #define DEV10G_MAC_TX_MONITOR_STICKY_LOCAL_ERR_STATE_STICKY_SET(x)\  argument
2480 	FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_LOCAL_ERR_STATE_STICKY, x)
2481 #define DEV10G_MAC_TX_MONITOR_STICKY_LOCAL_ERR_STATE_STICKY_GET(x)\  argument
2482 	FIELD_GET(DEV10G_MAC_TX_MONITOR_STICKY_LOCAL_ERR_STATE_STICKY, x)
2485 #define DEV10G_MAC_TX_MONITOR_STICKY_REMOTE_ERR_STATE_STICKY_SET(x)\  argument
2486 	FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_REMOTE_ERR_STATE_STICKY, x)
2487 #define DEV10G_MAC_TX_MONITOR_STICKY_REMOTE_ERR_STATE_STICKY_GET(x)\  argument
2488 	FIELD_GET(DEV10G_MAC_TX_MONITOR_STICKY_REMOTE_ERR_STATE_STICKY, x)
2491 #define DEV10G_MAC_TX_MONITOR_STICKY_LINK_INTERRUPTION_STATE_STICKY_SET(x)\  argument
2492 	FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_LINK_INTERRUPTION_STATE_STICKY, x)
2493 #define DEV10G_MAC_TX_MONITOR_STICKY_LINK_INTERRUPTION_STATE_STICKY_GET(x)\  argument
2494 	FIELD_GET(DEV10G_MAC_TX_MONITOR_STICKY_LINK_INTERRUPTION_STATE_STICKY, x)
2497 #define DEV10G_MAC_TX_MONITOR_STICKY_IDLE_STATE_STICKY_SET(x)\  argument
2498 	FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_IDLE_STATE_STICKY, x)
2499 #define DEV10G_MAC_TX_MONITOR_STICKY_IDLE_STATE_STICKY_GET(x)\  argument
2500 	FIELD_GET(DEV10G_MAC_TX_MONITOR_STICKY_IDLE_STATE_STICKY, x)
2503 #define DEV10G_MAC_TX_MONITOR_STICKY_DIS_STATE_STICKY_SET(x)\  argument
2504 	FIELD_PREP(DEV10G_MAC_TX_MONITOR_STICKY_DIS_STATE_STICKY, x)
2505 #define DEV10G_MAC_TX_MONITOR_STICKY_DIS_STATE_STICKY_GET(x)\  argument
2506 	FIELD_GET(DEV10G_MAC_TX_MONITOR_STICKY_DIS_STATE_STICKY, x)
2513 #define DEV10G_DEV_RST_CTRL_PARDET_MODE_ENA_SET(x)\  argument
2514 	FIELD_PREP(DEV10G_DEV_RST_CTRL_PARDET_MODE_ENA, x)
2515 #define DEV10G_DEV_RST_CTRL_PARDET_MODE_ENA_GET(x)\  argument
2516 	FIELD_GET(DEV10G_DEV_RST_CTRL_PARDET_MODE_ENA, x)
2519 #define DEV10G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_SET(x)\  argument
2520 	FIELD_PREP(DEV10G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
2521 #define DEV10G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_GET(x)\  argument
2522 	FIELD_GET(DEV10G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
2525 #define DEV10G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS_SET(x)\  argument
2526 	FIELD_PREP(DEV10G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)
2527 #define DEV10G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS_GET(x)\  argument
2528 	FIELD_GET(DEV10G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)
2531 #define DEV10G_DEV_RST_CTRL_SERDES_SPEED_SEL_SET(x)\  argument
2532 	FIELD_PREP(DEV10G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)
2533 #define DEV10G_DEV_RST_CTRL_SERDES_SPEED_SEL_GET(x)\  argument
2534 	FIELD_GET(DEV10G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)
2537 #define DEV10G_DEV_RST_CTRL_SPEED_SEL_SET(x)\  argument
2538 	FIELD_PREP(DEV10G_DEV_RST_CTRL_SPEED_SEL, x)
2539 #define DEV10G_DEV_RST_CTRL_SPEED_SEL_GET(x)\  argument
2540 	FIELD_GET(DEV10G_DEV_RST_CTRL_SPEED_SEL, x)
2543 #define DEV10G_DEV_RST_CTRL_PCS_TX_RST_SET(x)\  argument
2544 	FIELD_PREP(DEV10G_DEV_RST_CTRL_PCS_TX_RST, x)
2545 #define DEV10G_DEV_RST_CTRL_PCS_TX_RST_GET(x)\  argument
2546 	FIELD_GET(DEV10G_DEV_RST_CTRL_PCS_TX_RST, x)
2549 #define DEV10G_DEV_RST_CTRL_PCS_RX_RST_SET(x)\  argument
2550 	FIELD_PREP(DEV10G_DEV_RST_CTRL_PCS_RX_RST, x)
2551 #define DEV10G_DEV_RST_CTRL_PCS_RX_RST_GET(x)\  argument
2552 	FIELD_GET(DEV10G_DEV_RST_CTRL_PCS_RX_RST, x)
2555 #define DEV10G_DEV_RST_CTRL_MAC_TX_RST_SET(x)\  argument
2556 	FIELD_PREP(DEV10G_DEV_RST_CTRL_MAC_TX_RST, x)
2557 #define DEV10G_DEV_RST_CTRL_MAC_TX_RST_GET(x)\  argument
2558 	FIELD_GET(DEV10G_DEV_RST_CTRL_MAC_TX_RST, x)
2561 #define DEV10G_DEV_RST_CTRL_MAC_RX_RST_SET(x)\  argument
2562 	FIELD_PREP(DEV10G_DEV_RST_CTRL_MAC_RX_RST, x)
2563 #define DEV10G_DEV_RST_CTRL_MAC_RX_RST_GET(x)\  argument
2564 	FIELD_GET(DEV10G_DEV_RST_CTRL_MAC_RX_RST, x)
2571 #define DEV10G_PCS25G_CFG_PCS25G_ENA_SET(x)\  argument
2572 	FIELD_PREP(DEV10G_PCS25G_CFG_PCS25G_ENA, x)
2573 #define DEV10G_PCS25G_CFG_PCS25G_ENA_GET(x)\  argument
2574 	FIELD_GET(DEV10G_PCS25G_CFG_PCS25G_ENA, x)
2581 #define DEV25G_MAC_ENA_CFG_RX_ENA_SET(x)\  argument
2582 	FIELD_PREP(DEV25G_MAC_ENA_CFG_RX_ENA, x)
2583 #define DEV25G_MAC_ENA_CFG_RX_ENA_GET(x)\  argument
2584 	FIELD_GET(DEV25G_MAC_ENA_CFG_RX_ENA, x)
2587 #define DEV25G_MAC_ENA_CFG_TX_ENA_SET(x)\  argument
2588 	FIELD_PREP(DEV25G_MAC_ENA_CFG_TX_ENA, x)
2589 #define DEV25G_MAC_ENA_CFG_TX_ENA_GET(x)\  argument
2590 	FIELD_GET(DEV25G_MAC_ENA_CFG_TX_ENA, x)
2597 #define DEV25G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK_SET(x)\  argument
2598 	FIELD_PREP(DEV25G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)
2599 #define DEV25G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK_GET(x)\  argument
2600 	FIELD_GET(DEV25G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)
2603 #define DEV25G_MAC_MAXLEN_CFG_MAX_LEN_SET(x)\  argument
2604 	FIELD_PREP(DEV25G_MAC_MAXLEN_CFG_MAX_LEN, x)
2605 #define DEV25G_MAC_MAXLEN_CFG_MAX_LEN_GET(x)\  argument
2606 	FIELD_GET(DEV25G_MAC_MAXLEN_CFG_MAX_LEN, x)
2613 #define DEV25G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA_SET(x)\  argument
2614 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)
2615 #define DEV25G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA_GET(x)\  argument
2616 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)
2619 #define DEV25G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA_SET(x)\  argument
2620 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)
2621 #define DEV25G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA_GET(x)\  argument
2622 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)
2625 #define DEV25G_MAC_ADV_CHK_CFG_SFD_CHK_ENA_SET(x)\  argument
2626 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)
2627 #define DEV25G_MAC_ADV_CHK_CFG_SFD_CHK_ENA_GET(x)\  argument
2628 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)
2631 #define DEV25G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS_SET(x)\  argument
2632 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)
2633 #define DEV25G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS_GET(x)\  argument
2634 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)
2637 #define DEV25G_MAC_ADV_CHK_CFG_PRM_CHK_ENA_SET(x)\  argument
2638 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)
2639 #define DEV25G_MAC_ADV_CHK_CFG_PRM_CHK_ENA_GET(x)\  argument
2640 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)
2643 #define DEV25G_MAC_ADV_CHK_CFG_OOR_ERR_ENA_SET(x)\  argument
2644 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)
2645 #define DEV25G_MAC_ADV_CHK_CFG_OOR_ERR_ENA_GET(x)\  argument
2646 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)
2649 #define DEV25G_MAC_ADV_CHK_CFG_INR_ERR_ENA_SET(x)\  argument
2650 	FIELD_PREP(DEV25G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)
2651 #define DEV25G_MAC_ADV_CHK_CFG_INR_ERR_ENA_GET(x)\  argument
2652 	FIELD_GET(DEV25G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)
2659 #define DEV25G_DEV_RST_CTRL_PARDET_MODE_ENA_SET(x)\  argument
2660 	FIELD_PREP(DEV25G_DEV_RST_CTRL_PARDET_MODE_ENA, x)
2661 #define DEV25G_DEV_RST_CTRL_PARDET_MODE_ENA_GET(x)\  argument
2662 	FIELD_GET(DEV25G_DEV_RST_CTRL_PARDET_MODE_ENA, x)
2665 #define DEV25G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_SET(x)\  argument
2666 	FIELD_PREP(DEV25G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
2667 #define DEV25G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_GET(x)\  argument
2668 	FIELD_GET(DEV25G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
2671 #define DEV25G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS_SET(x)\  argument
2672 	FIELD_PREP(DEV25G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)
2673 #define DEV25G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS_GET(x)\  argument
2674 	FIELD_GET(DEV25G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)
2677 #define DEV25G_DEV_RST_CTRL_SERDES_SPEED_SEL_SET(x)\  argument
2678 	FIELD_PREP(DEV25G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)
2679 #define DEV25G_DEV_RST_CTRL_SERDES_SPEED_SEL_GET(x)\  argument
2680 	FIELD_GET(DEV25G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)
2683 #define DEV25G_DEV_RST_CTRL_SPEED_SEL_SET(x)\  argument
2684 	FIELD_PREP(DEV25G_DEV_RST_CTRL_SPEED_SEL, x)
2685 #define DEV25G_DEV_RST_CTRL_SPEED_SEL_GET(x)\  argument
2686 	FIELD_GET(DEV25G_DEV_RST_CTRL_SPEED_SEL, x)
2689 #define DEV25G_DEV_RST_CTRL_PCS_TX_RST_SET(x)\  argument
2690 	FIELD_PREP(DEV25G_DEV_RST_CTRL_PCS_TX_RST, x)
2691 #define DEV25G_DEV_RST_CTRL_PCS_TX_RST_GET(x)\  argument
2692 	FIELD_GET(DEV25G_DEV_RST_CTRL_PCS_TX_RST, x)
2695 #define DEV25G_DEV_RST_CTRL_PCS_RX_RST_SET(x)\  argument
2696 	FIELD_PREP(DEV25G_DEV_RST_CTRL_PCS_RX_RST, x)
2697 #define DEV25G_DEV_RST_CTRL_PCS_RX_RST_GET(x)\  argument
2698 	FIELD_GET(DEV25G_DEV_RST_CTRL_PCS_RX_RST, x)
2701 #define DEV25G_DEV_RST_CTRL_MAC_TX_RST_SET(x)\  argument
2702 	FIELD_PREP(DEV25G_DEV_RST_CTRL_MAC_TX_RST, x)
2703 #define DEV25G_DEV_RST_CTRL_MAC_TX_RST_GET(x)\  argument
2704 	FIELD_GET(DEV25G_DEV_RST_CTRL_MAC_TX_RST, x)
2707 #define DEV25G_DEV_RST_CTRL_MAC_RX_RST_SET(x)\  argument
2708 	FIELD_PREP(DEV25G_DEV_RST_CTRL_MAC_RX_RST, x)
2709 #define DEV25G_DEV_RST_CTRL_MAC_RX_RST_GET(x)\  argument
2710 	FIELD_GET(DEV25G_DEV_RST_CTRL_MAC_RX_RST, x)
2717 #define DEV25G_PCS25G_CFG_PCS25G_ENA_SET(x)\  argument
2718 	FIELD_PREP(DEV25G_PCS25G_CFG_PCS25G_ENA, x)
2719 #define DEV25G_PCS25G_CFG_PCS25G_ENA_GET(x)\  argument
2720 	FIELD_GET(DEV25G_PCS25G_CFG_PCS25G_ENA, x)
2727 #define DEV25G_PCS25G_SD_CFG_SD_SEL_SET(x)\  argument
2728 	FIELD_PREP(DEV25G_PCS25G_SD_CFG_SD_SEL, x)
2729 #define DEV25G_PCS25G_SD_CFG_SD_SEL_GET(x)\  argument
2730 	FIELD_GET(DEV25G_PCS25G_SD_CFG_SD_SEL, x)
2733 #define DEV25G_PCS25G_SD_CFG_SD_POL_SET(x)\  argument
2734 	FIELD_PREP(DEV25G_PCS25G_SD_CFG_SD_POL, x)
2735 #define DEV25G_PCS25G_SD_CFG_SD_POL_GET(x)\  argument
2736 	FIELD_GET(DEV25G_PCS25G_SD_CFG_SD_POL, x)
2739 #define DEV25G_PCS25G_SD_CFG_SD_ENA_SET(x)\  argument
2740 	FIELD_PREP(DEV25G_PCS25G_SD_CFG_SD_ENA, x)
2741 #define DEV25G_PCS25G_SD_CFG_SD_ENA_GET(x)\  argument
2742 	FIELD_GET(DEV25G_PCS25G_SD_CFG_SD_ENA, x)
2749 #define DEV2G5_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_SET(x)\  argument
2750 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
2751 #define DEV2G5_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_GET(x)\  argument
2752 	FIELD_GET(DEV2G5_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
2755 #define DEV2G5_DEV_RST_CTRL_SPEED_SEL_SET(x)\  argument
2756 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_SPEED_SEL, x)
2757 #define DEV2G5_DEV_RST_CTRL_SPEED_SEL_GET(x)\  argument
2758 	FIELD_GET(DEV2G5_DEV_RST_CTRL_SPEED_SEL, x)
2761 #define DEV2G5_DEV_RST_CTRL_USX_PCS_TX_RST_SET(x)\  argument
2762 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_USX_PCS_TX_RST, x)
2763 #define DEV2G5_DEV_RST_CTRL_USX_PCS_TX_RST_GET(x)\  argument
2764 	FIELD_GET(DEV2G5_DEV_RST_CTRL_USX_PCS_TX_RST, x)
2767 #define DEV2G5_DEV_RST_CTRL_USX_PCS_RX_RST_SET(x)\  argument
2768 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_USX_PCS_RX_RST, x)
2769 #define DEV2G5_DEV_RST_CTRL_USX_PCS_RX_RST_GET(x)\  argument
2770 	FIELD_GET(DEV2G5_DEV_RST_CTRL_USX_PCS_RX_RST, x)
2773 #define DEV2G5_DEV_RST_CTRL_PCS_TX_RST_SET(x)\  argument
2774 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_PCS_TX_RST, x)
2775 #define DEV2G5_DEV_RST_CTRL_PCS_TX_RST_GET(x)\  argument
2776 	FIELD_GET(DEV2G5_DEV_RST_CTRL_PCS_TX_RST, x)
2779 #define DEV2G5_DEV_RST_CTRL_PCS_RX_RST_SET(x)\  argument
2780 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_PCS_RX_RST, x)
2781 #define DEV2G5_DEV_RST_CTRL_PCS_RX_RST_GET(x)\  argument
2782 	FIELD_GET(DEV2G5_DEV_RST_CTRL_PCS_RX_RST, x)
2785 #define DEV2G5_DEV_RST_CTRL_MAC_TX_RST_SET(x)\  argument
2786 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_MAC_TX_RST, x)
2787 #define DEV2G5_DEV_RST_CTRL_MAC_TX_RST_GET(x)\  argument
2788 	FIELD_GET(DEV2G5_DEV_RST_CTRL_MAC_TX_RST, x)
2791 #define DEV2G5_DEV_RST_CTRL_MAC_RX_RST_SET(x)\  argument
2792 	FIELD_PREP(DEV2G5_DEV_RST_CTRL_MAC_RX_RST, x)
2793 #define DEV2G5_DEV_RST_CTRL_MAC_RX_RST_GET(x)\  argument
2794 	FIELD_GET(DEV2G5_DEV_RST_CTRL_MAC_RX_RST, x)
2801 #define DEV2G5_MAC_ENA_CFG_RX_ENA_SET(x)\  argument
2802 	FIELD_PREP(DEV2G5_MAC_ENA_CFG_RX_ENA, x)
2803 #define DEV2G5_MAC_ENA_CFG_RX_ENA_GET(x)\  argument
2804 	FIELD_GET(DEV2G5_MAC_ENA_CFG_RX_ENA, x)
2807 #define DEV2G5_MAC_ENA_CFG_TX_ENA_SET(x)\  argument
2808 	FIELD_PREP(DEV2G5_MAC_ENA_CFG_TX_ENA, x)
2809 #define DEV2G5_MAC_ENA_CFG_TX_ENA_GET(x)\  argument
2810 	FIELD_GET(DEV2G5_MAC_ENA_CFG_TX_ENA, x)
2817 #define DEV2G5_MAC_MODE_CFG_FC_WORD_SYNC_ENA_SET(x)\  argument
2818 	FIELD_PREP(DEV2G5_MAC_MODE_CFG_FC_WORD_SYNC_ENA, x)
2819 #define DEV2G5_MAC_MODE_CFG_FC_WORD_SYNC_ENA_GET(x)\  argument
2820 	FIELD_GET(DEV2G5_MAC_MODE_CFG_FC_WORD_SYNC_ENA, x)
2823 #define DEV2G5_MAC_MODE_CFG_GIGA_MODE_ENA_SET(x)\  argument
2824 	FIELD_PREP(DEV2G5_MAC_MODE_CFG_GIGA_MODE_ENA, x)
2825 #define DEV2G5_MAC_MODE_CFG_GIGA_MODE_ENA_GET(x)\  argument
2826 	FIELD_GET(DEV2G5_MAC_MODE_CFG_GIGA_MODE_ENA, x)
2829 #define DEV2G5_MAC_MODE_CFG_FDX_ENA_SET(x)\  argument
2830 	FIELD_PREP(DEV2G5_MAC_MODE_CFG_FDX_ENA, x)
2831 #define DEV2G5_MAC_MODE_CFG_FDX_ENA_GET(x)\  argument
2832 	FIELD_GET(DEV2G5_MAC_MODE_CFG_FDX_ENA, x)
2839 #define DEV2G5_MAC_MAXLEN_CFG_MAX_LEN_SET(x)\  argument
2840 	FIELD_PREP(DEV2G5_MAC_MAXLEN_CFG_MAX_LEN, x)
2841 #define DEV2G5_MAC_MAXLEN_CFG_MAX_LEN_GET(x)\  argument
2842 	FIELD_GET(DEV2G5_MAC_MAXLEN_CFG_MAX_LEN, x)
2849 #define DEV2G5_MAC_TAGS_CFG_TAG_ID_SET(x)\  argument
2850 	FIELD_PREP(DEV2G5_MAC_TAGS_CFG_TAG_ID, x)
2851 #define DEV2G5_MAC_TAGS_CFG_TAG_ID_GET(x)\  argument
2852 	FIELD_GET(DEV2G5_MAC_TAGS_CFG_TAG_ID, x)
2855 #define DEV2G5_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA_SET(x)\  argument
2856 	FIELD_PREP(DEV2G5_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA, x)
2857 #define DEV2G5_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA_GET(x)\  argument
2858 	FIELD_GET(DEV2G5_MAC_TAGS_CFG_VLAN_LEN_AWR_ENA, x)
2861 #define DEV2G5_MAC_TAGS_CFG_PB_ENA_SET(x)\  argument
2862 	FIELD_PREP(DEV2G5_MAC_TAGS_CFG_PB_ENA, x)
2863 #define DEV2G5_MAC_TAGS_CFG_PB_ENA_GET(x)\  argument
2864 	FIELD_GET(DEV2G5_MAC_TAGS_CFG_PB_ENA, x)
2867 #define DEV2G5_MAC_TAGS_CFG_VLAN_AWR_ENA_SET(x)\  argument
2868 	FIELD_PREP(DEV2G5_MAC_TAGS_CFG_VLAN_AWR_ENA, x)
2869 #define DEV2G5_MAC_TAGS_CFG_VLAN_AWR_ENA_GET(x)\  argument
2870 	FIELD_GET(DEV2G5_MAC_TAGS_CFG_VLAN_AWR_ENA, x)
2877 #define DEV2G5_MAC_TAGS_CFG2_TAG_ID3_SET(x)\  argument
2878 	FIELD_PREP(DEV2G5_MAC_TAGS_CFG2_TAG_ID3, x)
2879 #define DEV2G5_MAC_TAGS_CFG2_TAG_ID3_GET(x)\  argument
2880 	FIELD_GET(DEV2G5_MAC_TAGS_CFG2_TAG_ID3, x)
2883 #define DEV2G5_MAC_TAGS_CFG2_TAG_ID2_SET(x)\  argument
2884 	FIELD_PREP(DEV2G5_MAC_TAGS_CFG2_TAG_ID2, x)
2885 #define DEV2G5_MAC_TAGS_CFG2_TAG_ID2_GET(x)\  argument
2886 	FIELD_GET(DEV2G5_MAC_TAGS_CFG2_TAG_ID2, x)
2893 #define DEV2G5_MAC_ADV_CHK_CFG_LEN_DROP_ENA_SET(x)\  argument
2894 	FIELD_PREP(DEV2G5_MAC_ADV_CHK_CFG_LEN_DROP_ENA, x)
2895 #define DEV2G5_MAC_ADV_CHK_CFG_LEN_DROP_ENA_GET(x)\  argument
2896 	FIELD_GET(DEV2G5_MAC_ADV_CHK_CFG_LEN_DROP_ENA, x)
2903 #define DEV2G5_MAC_IFG_CFG_RESTORE_OLD_IPG_CHECK_SET(x)\  argument
2904 	FIELD_PREP(DEV2G5_MAC_IFG_CFG_RESTORE_OLD_IPG_CHECK, x)
2905 #define DEV2G5_MAC_IFG_CFG_RESTORE_OLD_IPG_CHECK_GET(x)\  argument
2906 	FIELD_GET(DEV2G5_MAC_IFG_CFG_RESTORE_OLD_IPG_CHECK, x)
2909 #define DEV2G5_MAC_IFG_CFG_TX_IFG_SET(x)\  argument
2910 	FIELD_PREP(DEV2G5_MAC_IFG_CFG_TX_IFG, x)
2911 #define DEV2G5_MAC_IFG_CFG_TX_IFG_GET(x)\  argument
2912 	FIELD_GET(DEV2G5_MAC_IFG_CFG_TX_IFG, x)
2915 #define DEV2G5_MAC_IFG_CFG_RX_IFG2_SET(x)\  argument
2916 	FIELD_PREP(DEV2G5_MAC_IFG_CFG_RX_IFG2, x)
2917 #define DEV2G5_MAC_IFG_CFG_RX_IFG2_GET(x)\  argument
2918 	FIELD_GET(DEV2G5_MAC_IFG_CFG_RX_IFG2, x)
2921 #define DEV2G5_MAC_IFG_CFG_RX_IFG1_SET(x)\  argument
2922 	FIELD_PREP(DEV2G5_MAC_IFG_CFG_RX_IFG1, x)
2923 #define DEV2G5_MAC_IFG_CFG_RX_IFG1_GET(x)\  argument
2924 	FIELD_GET(DEV2G5_MAC_IFG_CFG_RX_IFG1, x)
2931 #define DEV2G5_MAC_HDX_CFG_BYPASS_COL_SYNC_SET(x)\  argument
2932 	FIELD_PREP(DEV2G5_MAC_HDX_CFG_BYPASS_COL_SYNC, x)
2933 #define DEV2G5_MAC_HDX_CFG_BYPASS_COL_SYNC_GET(x)\  argument
2934 	FIELD_GET(DEV2G5_MAC_HDX_CFG_BYPASS_COL_SYNC, x)
2937 #define DEV2G5_MAC_HDX_CFG_SEED_SET(x)\  argument
2938 	FIELD_PREP(DEV2G5_MAC_HDX_CFG_SEED, x)
2939 #define DEV2G5_MAC_HDX_CFG_SEED_GET(x)\  argument
2940 	FIELD_GET(DEV2G5_MAC_HDX_CFG_SEED, x)
2943 #define DEV2G5_MAC_HDX_CFG_SEED_LOAD_SET(x)\  argument
2944 	FIELD_PREP(DEV2G5_MAC_HDX_CFG_SEED_LOAD, x)
2945 #define DEV2G5_MAC_HDX_CFG_SEED_LOAD_GET(x)\  argument
2946 	FIELD_GET(DEV2G5_MAC_HDX_CFG_SEED_LOAD, x)
2949 #define DEV2G5_MAC_HDX_CFG_RETRY_AFTER_EXC_COL_ENA_SET(x)\  argument
2950 	FIELD_PREP(DEV2G5_MAC_HDX_CFG_RETRY_AFTER_EXC_COL_ENA, x)
2951 #define DEV2G5_MAC_HDX_CFG_RETRY_AFTER_EXC_COL_ENA_GET(x)\  argument
2952 	FIELD_GET(DEV2G5_MAC_HDX_CFG_RETRY_AFTER_EXC_COL_ENA, x)
2955 #define DEV2G5_MAC_HDX_CFG_LATE_COL_POS_SET(x)\  argument
2956 	FIELD_PREP(DEV2G5_MAC_HDX_CFG_LATE_COL_POS, x)
2957 #define DEV2G5_MAC_HDX_CFG_LATE_COL_POS_GET(x)\  argument
2958 	FIELD_GET(DEV2G5_MAC_HDX_CFG_LATE_COL_POS, x)
2965 #define DEV2G5_PCS1G_CFG_LINK_STATUS_TYPE_SET(x)\  argument
2966 	FIELD_PREP(DEV2G5_PCS1G_CFG_LINK_STATUS_TYPE, x)
2967 #define DEV2G5_PCS1G_CFG_LINK_STATUS_TYPE_GET(x)\  argument
2968 	FIELD_GET(DEV2G5_PCS1G_CFG_LINK_STATUS_TYPE, x)
2971 #define DEV2G5_PCS1G_CFG_AN_LINK_CTRL_ENA_SET(x)\  argument
2972 	FIELD_PREP(DEV2G5_PCS1G_CFG_AN_LINK_CTRL_ENA, x)
2973 #define DEV2G5_PCS1G_CFG_AN_LINK_CTRL_ENA_GET(x)\  argument
2974 	FIELD_GET(DEV2G5_PCS1G_CFG_AN_LINK_CTRL_ENA, x)
2977 #define DEV2G5_PCS1G_CFG_PCS_ENA_SET(x)\  argument
2978 	FIELD_PREP(DEV2G5_PCS1G_CFG_PCS_ENA, x)
2979 #define DEV2G5_PCS1G_CFG_PCS_ENA_GET(x)\  argument
2980 	FIELD_GET(DEV2G5_PCS1G_CFG_PCS_ENA, x)
2987 #define DEV2G5_PCS1G_MODE_CFG_UNIDIR_MODE_ENA_SET(x)\  argument
2988 	FIELD_PREP(DEV2G5_PCS1G_MODE_CFG_UNIDIR_MODE_ENA, x)
2989 #define DEV2G5_PCS1G_MODE_CFG_UNIDIR_MODE_ENA_GET(x)\  argument
2990 	FIELD_GET(DEV2G5_PCS1G_MODE_CFG_UNIDIR_MODE_ENA, x)
2993 #define DEV2G5_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA_SET(x)\  argument
2994 	FIELD_PREP(DEV2G5_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA, x)
2995 #define DEV2G5_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA_GET(x)\  argument
2996 	FIELD_GET(DEV2G5_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA, x)
2999 #define DEV2G5_PCS1G_MODE_CFG_SGMII_MODE_ENA_SET(x)\  argument
3000 	FIELD_PREP(DEV2G5_PCS1G_MODE_CFG_SGMII_MODE_ENA, x)
3001 #define DEV2G5_PCS1G_MODE_CFG_SGMII_MODE_ENA_GET(x)\  argument
3002 	FIELD_GET(DEV2G5_PCS1G_MODE_CFG_SGMII_MODE_ENA, x)
3009 #define DEV2G5_PCS1G_SD_CFG_SD_SEL_SET(x)\  argument
3010 	FIELD_PREP(DEV2G5_PCS1G_SD_CFG_SD_SEL, x)
3011 #define DEV2G5_PCS1G_SD_CFG_SD_SEL_GET(x)\  argument
3012 	FIELD_GET(DEV2G5_PCS1G_SD_CFG_SD_SEL, x)
3015 #define DEV2G5_PCS1G_SD_CFG_SD_POL_SET(x)\  argument
3016 	FIELD_PREP(DEV2G5_PCS1G_SD_CFG_SD_POL, x)
3017 #define DEV2G5_PCS1G_SD_CFG_SD_POL_GET(x)\  argument
3018 	FIELD_GET(DEV2G5_PCS1G_SD_CFG_SD_POL, x)
3021 #define DEV2G5_PCS1G_SD_CFG_SD_ENA_SET(x)\  argument
3022 	FIELD_PREP(DEV2G5_PCS1G_SD_CFG_SD_ENA, x)
3023 #define DEV2G5_PCS1G_SD_CFG_SD_ENA_GET(x)\  argument
3024 	FIELD_GET(DEV2G5_PCS1G_SD_CFG_SD_ENA, x)
3031 #define DEV2G5_PCS1G_ANEG_CFG_ADV_ABILITY_SET(x)\  argument
3032 	FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_ADV_ABILITY, x)
3033 #define DEV2G5_PCS1G_ANEG_CFG_ADV_ABILITY_GET(x)\  argument
3034 	FIELD_GET(DEV2G5_PCS1G_ANEG_CFG_ADV_ABILITY, x)
3037 #define DEV2G5_PCS1G_ANEG_CFG_SW_RESOLVE_ENA_SET(x)\  argument
3038 	FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_SW_RESOLVE_ENA, x)
3039 #define DEV2G5_PCS1G_ANEG_CFG_SW_RESOLVE_ENA_GET(x)\  argument
3040 	FIELD_GET(DEV2G5_PCS1G_ANEG_CFG_SW_RESOLVE_ENA, x)
3043 #define DEV2G5_PCS1G_ANEG_CFG_ANEG_RESTART_ONE_SHOT_SET(x)\  argument
3044 	FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_ANEG_RESTART_ONE_SHOT, x)
3045 #define DEV2G5_PCS1G_ANEG_CFG_ANEG_RESTART_ONE_SHOT_GET(x)\  argument
3046 	FIELD_GET(DEV2G5_PCS1G_ANEG_CFG_ANEG_RESTART_ONE_SHOT, x)
3049 #define DEV2G5_PCS1G_ANEG_CFG_ANEG_ENA_SET(x)\  argument
3050 	FIELD_PREP(DEV2G5_PCS1G_ANEG_CFG_ANEG_ENA, x)
3051 #define DEV2G5_PCS1G_ANEG_CFG_ANEG_ENA_GET(x)\  argument
3052 	FIELD_GET(DEV2G5_PCS1G_ANEG_CFG_ANEG_ENA, x)
3059 #define DEV2G5_PCS1G_LB_CFG_RA_ENA_SET(x)\  argument
3060 	FIELD_PREP(DEV2G5_PCS1G_LB_CFG_RA_ENA, x)
3061 #define DEV2G5_PCS1G_LB_CFG_RA_ENA_GET(x)\  argument
3062 	FIELD_GET(DEV2G5_PCS1G_LB_CFG_RA_ENA, x)
3065 #define DEV2G5_PCS1G_LB_CFG_GMII_PHY_LB_ENA_SET(x)\  argument
3066 	FIELD_PREP(DEV2G5_PCS1G_LB_CFG_GMII_PHY_LB_ENA, x)
3067 #define DEV2G5_PCS1G_LB_CFG_GMII_PHY_LB_ENA_GET(x)\  argument
3068 	FIELD_GET(DEV2G5_PCS1G_LB_CFG_GMII_PHY_LB_ENA, x)
3071 #define DEV2G5_PCS1G_LB_CFG_TBI_HOST_LB_ENA_SET(x)\  argument
3072 	FIELD_PREP(DEV2G5_PCS1G_LB_CFG_TBI_HOST_LB_ENA, x)
3073 #define DEV2G5_PCS1G_LB_CFG_TBI_HOST_LB_ENA_GET(x)\  argument
3074 	FIELD_GET(DEV2G5_PCS1G_LB_CFG_TBI_HOST_LB_ENA, x)
3081 #define DEV2G5_PCS1G_ANEG_STATUS_LP_ADV_ABILITY_SET(x)\  argument
3082 	FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_LP_ADV_ABILITY, x)
3083 #define DEV2G5_PCS1G_ANEG_STATUS_LP_ADV_ABILITY_GET(x)\  argument
3084 	FIELD_GET(DEV2G5_PCS1G_ANEG_STATUS_LP_ADV_ABILITY, x)
3087 #define DEV2G5_PCS1G_ANEG_STATUS_PR_SET(x)\  argument
3088 	FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_PR, x)
3089 #define DEV2G5_PCS1G_ANEG_STATUS_PR_GET(x)\  argument
3090 	FIELD_GET(DEV2G5_PCS1G_ANEG_STATUS_PR, x)
3093 #define DEV2G5_PCS1G_ANEG_STATUS_PAGE_RX_STICKY_SET(x)\  argument
3094 	FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_PAGE_RX_STICKY, x)
3095 #define DEV2G5_PCS1G_ANEG_STATUS_PAGE_RX_STICKY_GET(x)\  argument
3096 	FIELD_GET(DEV2G5_PCS1G_ANEG_STATUS_PAGE_RX_STICKY, x)
3099 #define DEV2G5_PCS1G_ANEG_STATUS_ANEG_COMPLETE_SET(x)\  argument
3100 	FIELD_PREP(DEV2G5_PCS1G_ANEG_STATUS_ANEG_COMPLETE, x)
3101 #define DEV2G5_PCS1G_ANEG_STATUS_ANEG_COMPLETE_GET(x)\  argument
3102 	FIELD_GET(DEV2G5_PCS1G_ANEG_STATUS_ANEG_COMPLETE, x)
3109 #define DEV2G5_PCS1G_LINK_STATUS_DELAY_VAR_SET(x)\  argument
3110 	FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_DELAY_VAR, x)
3111 #define DEV2G5_PCS1G_LINK_STATUS_DELAY_VAR_GET(x)\  argument
3112 	FIELD_GET(DEV2G5_PCS1G_LINK_STATUS_DELAY_VAR, x)
3115 #define DEV2G5_PCS1G_LINK_STATUS_SIGNAL_DETECT_SET(x)\  argument
3116 	FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_SIGNAL_DETECT, x)
3117 #define DEV2G5_PCS1G_LINK_STATUS_SIGNAL_DETECT_GET(x)\  argument
3118 	FIELD_GET(DEV2G5_PCS1G_LINK_STATUS_SIGNAL_DETECT, x)
3121 #define DEV2G5_PCS1G_LINK_STATUS_LINK_STATUS_SET(x)\  argument
3122 	FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_LINK_STATUS, x)
3123 #define DEV2G5_PCS1G_LINK_STATUS_LINK_STATUS_GET(x)\  argument
3124 	FIELD_GET(DEV2G5_PCS1G_LINK_STATUS_LINK_STATUS, x)
3127 #define DEV2G5_PCS1G_LINK_STATUS_SYNC_STATUS_SET(x)\  argument
3128 	FIELD_PREP(DEV2G5_PCS1G_LINK_STATUS_SYNC_STATUS, x)
3129 #define DEV2G5_PCS1G_LINK_STATUS_SYNC_STATUS_GET(x)\  argument
3130 	FIELD_GET(DEV2G5_PCS1G_LINK_STATUS_SYNC_STATUS, x)
3137 #define DEV2G5_PCS1G_STICKY_LINK_DOWN_STICKY_SET(x)\  argument
3138 	FIELD_PREP(DEV2G5_PCS1G_STICKY_LINK_DOWN_STICKY, x)
3139 #define DEV2G5_PCS1G_STICKY_LINK_DOWN_STICKY_GET(x)\  argument
3140 	FIELD_GET(DEV2G5_PCS1G_STICKY_LINK_DOWN_STICKY, x)
3143 #define DEV2G5_PCS1G_STICKY_OUT_OF_SYNC_STICKY_SET(x)\  argument
3144 	FIELD_PREP(DEV2G5_PCS1G_STICKY_OUT_OF_SYNC_STICKY, x)
3145 #define DEV2G5_PCS1G_STICKY_OUT_OF_SYNC_STICKY_GET(x)\  argument
3146 	FIELD_GET(DEV2G5_PCS1G_STICKY_OUT_OF_SYNC_STICKY, x)
3153 #define DEV2G5_PCS_FX100_CFG_SD_SEL_SET(x)\  argument
3154 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_SD_SEL, x)
3155 #define DEV2G5_PCS_FX100_CFG_SD_SEL_GET(x)\  argument
3156 	FIELD_GET(DEV2G5_PCS_FX100_CFG_SD_SEL, x)
3159 #define DEV2G5_PCS_FX100_CFG_SD_POL_SET(x)\  argument
3160 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_SD_POL, x)
3161 #define DEV2G5_PCS_FX100_CFG_SD_POL_GET(x)\  argument
3162 	FIELD_GET(DEV2G5_PCS_FX100_CFG_SD_POL, x)
3165 #define DEV2G5_PCS_FX100_CFG_SD_ENA_SET(x)\  argument
3166 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_SD_ENA, x)
3167 #define DEV2G5_PCS_FX100_CFG_SD_ENA_GET(x)\  argument
3168 	FIELD_GET(DEV2G5_PCS_FX100_CFG_SD_ENA, x)
3171 #define DEV2G5_PCS_FX100_CFG_LOOPBACK_ENA_SET(x)\  argument
3172 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_LOOPBACK_ENA, x)
3173 #define DEV2G5_PCS_FX100_CFG_LOOPBACK_ENA_GET(x)\  argument
3174 	FIELD_GET(DEV2G5_PCS_FX100_CFG_LOOPBACK_ENA, x)
3177 #define DEV2G5_PCS_FX100_CFG_SWAP_MII_ENA_SET(x)\  argument
3178 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_SWAP_MII_ENA, x)
3179 #define DEV2G5_PCS_FX100_CFG_SWAP_MII_ENA_GET(x)\  argument
3180 	FIELD_GET(DEV2G5_PCS_FX100_CFG_SWAP_MII_ENA, x)
3183 #define DEV2G5_PCS_FX100_CFG_RXBITSEL_SET(x)\  argument
3184 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_RXBITSEL, x)
3185 #define DEV2G5_PCS_FX100_CFG_RXBITSEL_GET(x)\  argument
3186 	FIELD_GET(DEV2G5_PCS_FX100_CFG_RXBITSEL, x)
3189 #define DEV2G5_PCS_FX100_CFG_SIGDET_CFG_SET(x)\  argument
3190 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_SIGDET_CFG, x)
3191 #define DEV2G5_PCS_FX100_CFG_SIGDET_CFG_GET(x)\  argument
3192 	FIELD_GET(DEV2G5_PCS_FX100_CFG_SIGDET_CFG, x)
3195 #define DEV2G5_PCS_FX100_CFG_LINKHYST_TM_ENA_SET(x)\  argument
3196 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_LINKHYST_TM_ENA, x)
3197 #define DEV2G5_PCS_FX100_CFG_LINKHYST_TM_ENA_GET(x)\  argument
3198 	FIELD_GET(DEV2G5_PCS_FX100_CFG_LINKHYST_TM_ENA, x)
3201 #define DEV2G5_PCS_FX100_CFG_LINKHYSTTIMER_SET(x)\  argument
3202 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_LINKHYSTTIMER, x)
3203 #define DEV2G5_PCS_FX100_CFG_LINKHYSTTIMER_GET(x)\  argument
3204 	FIELD_GET(DEV2G5_PCS_FX100_CFG_LINKHYSTTIMER, x)
3207 #define DEV2G5_PCS_FX100_CFG_UNIDIR_MODE_ENA_SET(x)\  argument
3208 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_UNIDIR_MODE_ENA, x)
3209 #define DEV2G5_PCS_FX100_CFG_UNIDIR_MODE_ENA_GET(x)\  argument
3210 	FIELD_GET(DEV2G5_PCS_FX100_CFG_UNIDIR_MODE_ENA, x)
3213 #define DEV2G5_PCS_FX100_CFG_FEFCHK_ENA_SET(x)\  argument
3214 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_FEFCHK_ENA, x)
3215 #define DEV2G5_PCS_FX100_CFG_FEFCHK_ENA_GET(x)\  argument
3216 	FIELD_GET(DEV2G5_PCS_FX100_CFG_FEFCHK_ENA, x)
3219 #define DEV2G5_PCS_FX100_CFG_FEFGEN_ENA_SET(x)\  argument
3220 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_FEFGEN_ENA, x)
3221 #define DEV2G5_PCS_FX100_CFG_FEFGEN_ENA_GET(x)\  argument
3222 	FIELD_GET(DEV2G5_PCS_FX100_CFG_FEFGEN_ENA, x)
3225 #define DEV2G5_PCS_FX100_CFG_PCS_ENA_SET(x)\  argument
3226 	FIELD_PREP(DEV2G5_PCS_FX100_CFG_PCS_ENA, x)
3227 #define DEV2G5_PCS_FX100_CFG_PCS_ENA_GET(x)\  argument
3228 	FIELD_GET(DEV2G5_PCS_FX100_CFG_PCS_ENA, x)
3235 #define DEV2G5_PCS_FX100_STATUS_EDGE_POS_PTP_SET(x)\  argument
3236 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_EDGE_POS_PTP, x)
3237 #define DEV2G5_PCS_FX100_STATUS_EDGE_POS_PTP_GET(x)\  argument
3238 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_EDGE_POS_PTP, x)
3241 #define DEV2G5_PCS_FX100_STATUS_PCS_ERROR_STICKY_SET(x)\  argument
3242 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_PCS_ERROR_STICKY, x)
3243 #define DEV2G5_PCS_FX100_STATUS_PCS_ERROR_STICKY_GET(x)\  argument
3244 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_PCS_ERROR_STICKY, x)
3247 #define DEV2G5_PCS_FX100_STATUS_FEF_FOUND_STICKY_SET(x)\  argument
3248 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_FEF_FOUND_STICKY, x)
3249 #define DEV2G5_PCS_FX100_STATUS_FEF_FOUND_STICKY_GET(x)\  argument
3250 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_FEF_FOUND_STICKY, x)
3253 #define DEV2G5_PCS_FX100_STATUS_SSD_ERROR_STICKY_SET(x)\  argument
3254 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SSD_ERROR_STICKY, x)
3255 #define DEV2G5_PCS_FX100_STATUS_SSD_ERROR_STICKY_GET(x)\  argument
3256 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_SSD_ERROR_STICKY, x)
3259 #define DEV2G5_PCS_FX100_STATUS_SYNC_LOST_STICKY_SET(x)\  argument
3260 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SYNC_LOST_STICKY, x)
3261 #define DEV2G5_PCS_FX100_STATUS_SYNC_LOST_STICKY_GET(x)\  argument
3262 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_SYNC_LOST_STICKY, x)
3265 #define DEV2G5_PCS_FX100_STATUS_FEF_STATUS_SET(x)\  argument
3266 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_FEF_STATUS, x)
3267 #define DEV2G5_PCS_FX100_STATUS_FEF_STATUS_GET(x)\  argument
3268 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_FEF_STATUS, x)
3271 #define DEV2G5_PCS_FX100_STATUS_SIGNAL_DETECT_SET(x)\  argument
3272 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SIGNAL_DETECT, x)
3273 #define DEV2G5_PCS_FX100_STATUS_SIGNAL_DETECT_GET(x)\  argument
3274 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_SIGNAL_DETECT, x)
3277 #define DEV2G5_PCS_FX100_STATUS_SYNC_STATUS_SET(x)\  argument
3278 	FIELD_PREP(DEV2G5_PCS_FX100_STATUS_SYNC_STATUS, x)
3279 #define DEV2G5_PCS_FX100_STATUS_SYNC_STATUS_GET(x)\  argument
3280 	FIELD_GET(DEV2G5_PCS_FX100_STATUS_SYNC_STATUS, x)
3287 #define DEV5G_MAC_ENA_CFG_RX_ENA_SET(x)\  argument
3288 	FIELD_PREP(DEV5G_MAC_ENA_CFG_RX_ENA, x)
3289 #define DEV5G_MAC_ENA_CFG_RX_ENA_GET(x)\  argument
3290 	FIELD_GET(DEV5G_MAC_ENA_CFG_RX_ENA, x)
3293 #define DEV5G_MAC_ENA_CFG_TX_ENA_SET(x)\  argument
3294 	FIELD_PREP(DEV5G_MAC_ENA_CFG_TX_ENA, x)
3295 #define DEV5G_MAC_ENA_CFG_TX_ENA_GET(x)\  argument
3296 	FIELD_GET(DEV5G_MAC_ENA_CFG_TX_ENA, x)
3303 #define DEV5G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK_SET(x)\  argument
3304 	FIELD_PREP(DEV5G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)
3305 #define DEV5G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK_GET(x)\  argument
3306 	FIELD_GET(DEV5G_MAC_MAXLEN_CFG_MAX_LEN_TAG_CHK, x)
3309 #define DEV5G_MAC_MAXLEN_CFG_MAX_LEN_SET(x)\  argument
3310 	FIELD_PREP(DEV5G_MAC_MAXLEN_CFG_MAX_LEN, x)
3311 #define DEV5G_MAC_MAXLEN_CFG_MAX_LEN_GET(x)\  argument
3312 	FIELD_GET(DEV5G_MAC_MAXLEN_CFG_MAX_LEN, x)
3319 #define DEV5G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA_SET(x)\  argument
3320 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)
3321 #define DEV5G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA_GET(x)\  argument
3322 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_EXT_EOP_CHK_ENA, x)
3325 #define DEV5G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA_SET(x)\  argument
3326 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)
3327 #define DEV5G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA_GET(x)\  argument
3328 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_EXT_SOP_CHK_ENA, x)
3331 #define DEV5G_MAC_ADV_CHK_CFG_SFD_CHK_ENA_SET(x)\  argument
3332 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)
3333 #define DEV5G_MAC_ADV_CHK_CFG_SFD_CHK_ENA_GET(x)\  argument
3334 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_SFD_CHK_ENA, x)
3337 #define DEV5G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS_SET(x)\  argument
3338 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)
3339 #define DEV5G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS_GET(x)\  argument
3340 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_PRM_SHK_CHK_DIS, x)
3343 #define DEV5G_MAC_ADV_CHK_CFG_PRM_CHK_ENA_SET(x)\  argument
3344 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)
3345 #define DEV5G_MAC_ADV_CHK_CFG_PRM_CHK_ENA_GET(x)\  argument
3346 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_PRM_CHK_ENA, x)
3349 #define DEV5G_MAC_ADV_CHK_CFG_OOR_ERR_ENA_SET(x)\  argument
3350 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)
3351 #define DEV5G_MAC_ADV_CHK_CFG_OOR_ERR_ENA_GET(x)\  argument
3352 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_OOR_ERR_ENA, x)
3355 #define DEV5G_MAC_ADV_CHK_CFG_INR_ERR_ENA_SET(x)\  argument
3356 	FIELD_PREP(DEV5G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)
3357 #define DEV5G_MAC_ADV_CHK_CFG_INR_ERR_ENA_GET(x)\  argument
3358 	FIELD_GET(DEV5G_MAC_ADV_CHK_CFG_INR_ERR_ENA, x)
3681 #define DEV5G_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT_SET(x)\  argument
3682 	FIELD_PREP(DEV5G_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT, x)
3683 #define DEV5G_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT_GET(x)\  argument
3684 	FIELD_GET(DEV5G_RX_IN_BYTES_MSB_CNT_RX_IN_BYTES_MSB_CNT, x)
3695 #define DEV5G_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT_SET(x)\  argument
3696 	FIELD_PREP(DEV5G_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT, x)
3697 #define DEV5G_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT_GET(x)\  argument
3698 	FIELD_GET(DEV5G_RX_OK_BYTES_MSB_CNT_RX_OK_BYTES_MSB_CNT, x)
3709 #define DEV5G_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT_SET(x)\  argument
3710 	FIELD_PREP(DEV5G_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT, x)
3711 #define DEV5G_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT_GET(x)\  argument
3712 	FIELD_GET(DEV5G_RX_BAD_BYTES_MSB_CNT_RX_BAD_BYTES_MSB_CNT, x)
3723 #define DEV5G_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT_SET(x)\  argument
3724 	FIELD_PREP(DEV5G_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT, x)
3725 #define DEV5G_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT_GET(x)\  argument
3726 	FIELD_GET(DEV5G_TX_OUT_BYTES_MSB_CNT_TX_OUT_BYTES_MSB_CNT, x)
3737 #define DEV5G_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT_SET(x)\  argument
3738 	FIELD_PREP(DEV5G_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT, x)
3739 #define DEV5G_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT_GET(x)\  argument
3740 	FIELD_GET(DEV5G_TX_OK_BYTES_MSB_CNT_TX_OK_BYTES_MSB_CNT, x)
3751 #define DEV5G_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT_SET(x)\  argument
3752 	FIELD_PREP(DEV5G_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT, x)
3753 #define DEV5G_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT_GET(x)\  argument
3754 	FIELD_GET(DEV5G_PMAC_RX_OK_BYTES_MSB_CNT_PMAC_RX_OK_BYTES_MSB_CNT, x)
3765 #define DEV5G_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT_SET(x)\  argument
3766 	FIELD_PREP(DEV5G_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT, x)
3767 #define DEV5G_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT_GET(x)\  argument
3768 	FIELD_GET(DEV5G_PMAC_RX_BAD_BYTES_MSB_CNT_PMAC_RX_BAD_BYTES_MSB_CNT, x)
3779 #define DEV5G_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT_SET(x)\  argument
3780 	FIELD_PREP(DEV5G_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT, x)
3781 #define DEV5G_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT_GET(x)\  argument
3782 	FIELD_GET(DEV5G_PMAC_TX_OK_BYTES_MSB_CNT_PMAC_TX_OK_BYTES_MSB_CNT, x)
3789 #define DEV5G_DEV_RST_CTRL_PARDET_MODE_ENA_SET(x)\  argument
3790 	FIELD_PREP(DEV5G_DEV_RST_CTRL_PARDET_MODE_ENA, x)
3791 #define DEV5G_DEV_RST_CTRL_PARDET_MODE_ENA_GET(x)\  argument
3792 	FIELD_GET(DEV5G_DEV_RST_CTRL_PARDET_MODE_ENA, x)
3795 #define DEV5G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_SET(x)\  argument
3796 	FIELD_PREP(DEV5G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
3797 #define DEV5G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS_GET(x)\  argument
3798 	FIELD_GET(DEV5G_DEV_RST_CTRL_USXGMII_OSET_FILTER_DIS, x)
3801 #define DEV5G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS_SET(x)\  argument
3802 	FIELD_PREP(DEV5G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)
3803 #define DEV5G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS_GET(x)\  argument
3804 	FIELD_GET(DEV5G_DEV_RST_CTRL_MUXED_USXGMII_NETWORK_PORTS, x)
3807 #define DEV5G_DEV_RST_CTRL_SERDES_SPEED_SEL_SET(x)\  argument
3808 	FIELD_PREP(DEV5G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)
3809 #define DEV5G_DEV_RST_CTRL_SERDES_SPEED_SEL_GET(x)\  argument
3810 	FIELD_GET(DEV5G_DEV_RST_CTRL_SERDES_SPEED_SEL, x)
3813 #define DEV5G_DEV_RST_CTRL_SPEED_SEL_SET(x)\  argument
3814 	FIELD_PREP(DEV5G_DEV_RST_CTRL_SPEED_SEL, x)
3815 #define DEV5G_DEV_RST_CTRL_SPEED_SEL_GET(x)\  argument
3816 	FIELD_GET(DEV5G_DEV_RST_CTRL_SPEED_SEL, x)
3819 #define DEV5G_DEV_RST_CTRL_PCS_TX_RST_SET(x)\  argument
3820 	FIELD_PREP(DEV5G_DEV_RST_CTRL_PCS_TX_RST, x)
3821 #define DEV5G_DEV_RST_CTRL_PCS_TX_RST_GET(x)\  argument
3822 	FIELD_GET(DEV5G_DEV_RST_CTRL_PCS_TX_RST, x)
3825 #define DEV5G_DEV_RST_CTRL_PCS_RX_RST_SET(x)\  argument
3826 	FIELD_PREP(DEV5G_DEV_RST_CTRL_PCS_RX_RST, x)
3827 #define DEV5G_DEV_RST_CTRL_PCS_RX_RST_GET(x)\  argument
3828 	FIELD_GET(DEV5G_DEV_RST_CTRL_PCS_RX_RST, x)
3831 #define DEV5G_DEV_RST_CTRL_MAC_TX_RST_SET(x)\  argument
3832 	FIELD_PREP(DEV5G_DEV_RST_CTRL_MAC_TX_RST, x)
3833 #define DEV5G_DEV_RST_CTRL_MAC_TX_RST_GET(x)\  argument
3834 	FIELD_GET(DEV5G_DEV_RST_CTRL_MAC_TX_RST, x)
3837 #define DEV5G_DEV_RST_CTRL_MAC_RX_RST_SET(x)\  argument
3838 	FIELD_PREP(DEV5G_DEV_RST_CTRL_MAC_RX_RST, x)
3839 #define DEV5G_DEV_RST_CTRL_MAC_RX_RST_GET(x)\  argument
3840 	FIELD_GET(DEV5G_DEV_RST_CTRL_MAC_RX_RST, x)
3847 #define DSM_RAM_INIT_RAM_INIT_SET(x)\  argument
3848 	FIELD_PREP(DSM_RAM_INIT_RAM_INIT, x)
3849 #define DSM_RAM_INIT_RAM_INIT_GET(x)\  argument
3850 	FIELD_GET(DSM_RAM_INIT_RAM_INIT, x)
3853 #define DSM_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
3854 	FIELD_PREP(DSM_RAM_INIT_RAM_CFG_HOOK, x)
3855 #define DSM_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
3856 	FIELD_GET(DSM_RAM_INIT_RAM_CFG_HOOK, x)
3863 #define DSM_BUF_CFG_CSC_STAT_DIS_SET(x)\  argument
3864 	FIELD_PREP(DSM_BUF_CFG_CSC_STAT_DIS, x)
3865 #define DSM_BUF_CFG_CSC_STAT_DIS_GET(x)\  argument
3866 	FIELD_GET(DSM_BUF_CFG_CSC_STAT_DIS, x)
3869 #define DSM_BUF_CFG_AGING_ENA_SET(x)\  argument
3870 	FIELD_PREP(DSM_BUF_CFG_AGING_ENA, x)
3871 #define DSM_BUF_CFG_AGING_ENA_GET(x)\  argument
3872 	FIELD_GET(DSM_BUF_CFG_AGING_ENA, x)
3875 #define DSM_BUF_CFG_UNDERFLOW_WATCHDOG_DIS_SET(x)\  argument
3876 	FIELD_PREP(DSM_BUF_CFG_UNDERFLOW_WATCHDOG_DIS, x)
3877 #define DSM_BUF_CFG_UNDERFLOW_WATCHDOG_DIS_GET(x)\  argument
3878 	FIELD_GET(DSM_BUF_CFG_UNDERFLOW_WATCHDOG_DIS, x)
3881 #define DSM_BUF_CFG_UNDERFLOW_WATCHDOG_TIMEOUT_SET(x)\  argument
3882 	FIELD_PREP(DSM_BUF_CFG_UNDERFLOW_WATCHDOG_TIMEOUT, x)
3883 #define DSM_BUF_CFG_UNDERFLOW_WATCHDOG_TIMEOUT_GET(x)\  argument
3884 	FIELD_GET(DSM_BUF_CFG_UNDERFLOW_WATCHDOG_TIMEOUT, x)
3891 #define DSM_DEV_TX_STOP_WM_CFG_FAST_STARTUP_ENA_SET(x)\  argument
3892 	FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_FAST_STARTUP_ENA, x)
3893 #define DSM_DEV_TX_STOP_WM_CFG_FAST_STARTUP_ENA_GET(x)\  argument
3894 	FIELD_GET(DSM_DEV_TX_STOP_WM_CFG_FAST_STARTUP_ENA, x)
3897 #define DSM_DEV_TX_STOP_WM_CFG_DEV10G_SHADOW_ENA_SET(x)\  argument
3898 	FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_DEV10G_SHADOW_ENA, x)
3899 #define DSM_DEV_TX_STOP_WM_CFG_DEV10G_SHADOW_ENA_GET(x)\  argument
3900 	FIELD_GET(DSM_DEV_TX_STOP_WM_CFG_DEV10G_SHADOW_ENA, x)
3903 #define DSM_DEV_TX_STOP_WM_CFG_DEV_TX_STOP_WM_SET(x)\  argument
3904 	FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_DEV_TX_STOP_WM, x)
3905 #define DSM_DEV_TX_STOP_WM_CFG_DEV_TX_STOP_WM_GET(x)\  argument
3906 	FIELD_GET(DSM_DEV_TX_STOP_WM_CFG_DEV_TX_STOP_WM, x)
3909 #define DSM_DEV_TX_STOP_WM_CFG_DEV_TX_CNT_CLR_SET(x)\  argument
3910 	FIELD_PREP(DSM_DEV_TX_STOP_WM_CFG_DEV_TX_CNT_CLR, x)
3911 #define DSM_DEV_TX_STOP_WM_CFG_DEV_TX_CNT_CLR_GET(x)\  argument
3912 	FIELD_GET(DSM_DEV_TX_STOP_WM_CFG_DEV_TX_CNT_CLR, x)
3919 #define DSM_RX_PAUSE_CFG_RX_PAUSE_EN_SET(x)\  argument
3920 	FIELD_PREP(DSM_RX_PAUSE_CFG_RX_PAUSE_EN, x)
3921 #define DSM_RX_PAUSE_CFG_RX_PAUSE_EN_GET(x)\  argument
3922 	FIELD_GET(DSM_RX_PAUSE_CFG_RX_PAUSE_EN, x)
3925 #define DSM_RX_PAUSE_CFG_FC_OBEY_LOCAL_SET(x)\  argument
3926 	FIELD_PREP(DSM_RX_PAUSE_CFG_FC_OBEY_LOCAL, x)
3927 #define DSM_RX_PAUSE_CFG_FC_OBEY_LOCAL_GET(x)\  argument
3928 	FIELD_GET(DSM_RX_PAUSE_CFG_FC_OBEY_LOCAL, x)
3935 #define DSM_MAC_CFG_TX_PAUSE_VAL_SET(x)\  argument
3936 	FIELD_PREP(DSM_MAC_CFG_TX_PAUSE_VAL, x)
3937 #define DSM_MAC_CFG_TX_PAUSE_VAL_GET(x)\  argument
3938 	FIELD_GET(DSM_MAC_CFG_TX_PAUSE_VAL, x)
3941 #define DSM_MAC_CFG_HDX_BACKPREASSURE_SET(x)\  argument
3942 	FIELD_PREP(DSM_MAC_CFG_HDX_BACKPREASSURE, x)
3943 #define DSM_MAC_CFG_HDX_BACKPREASSURE_GET(x)\  argument
3944 	FIELD_GET(DSM_MAC_CFG_HDX_BACKPREASSURE, x)
3947 #define DSM_MAC_CFG_SEND_PAUSE_FRM_TWICE_SET(x)\  argument
3948 	FIELD_PREP(DSM_MAC_CFG_SEND_PAUSE_FRM_TWICE, x)
3949 #define DSM_MAC_CFG_SEND_PAUSE_FRM_TWICE_GET(x)\  argument
3950 	FIELD_GET(DSM_MAC_CFG_SEND_PAUSE_FRM_TWICE, x)
3953 #define DSM_MAC_CFG_TX_PAUSE_XON_XOFF_SET(x)\  argument
3954 	FIELD_PREP(DSM_MAC_CFG_TX_PAUSE_XON_XOFF, x)
3955 #define DSM_MAC_CFG_TX_PAUSE_XON_XOFF_GET(x)\  argument
3956 	FIELD_GET(DSM_MAC_CFG_TX_PAUSE_XON_XOFF, x)
3963 #define DSM_MAC_ADDR_BASE_HIGH_CFG_MAC_ADDR_HIGH_SET(x)\  argument
3964 	FIELD_PREP(DSM_MAC_ADDR_BASE_HIGH_CFG_MAC_ADDR_HIGH, x)
3965 #define DSM_MAC_ADDR_BASE_HIGH_CFG_MAC_ADDR_HIGH_GET(x)\  argument
3966 	FIELD_GET(DSM_MAC_ADDR_BASE_HIGH_CFG_MAC_ADDR_HIGH, x)
3973 #define DSM_MAC_ADDR_BASE_LOW_CFG_MAC_ADDR_LOW_SET(x)\  argument
3974 	FIELD_PREP(DSM_MAC_ADDR_BASE_LOW_CFG_MAC_ADDR_LOW, x)
3975 #define DSM_MAC_ADDR_BASE_LOW_CFG_MAC_ADDR_LOW_GET(x)\  argument
3976 	FIELD_GET(DSM_MAC_ADDR_BASE_LOW_CFG_MAC_ADDR_LOW, x)
3983 #define DSM_TAXI_CAL_CFG_CAL_IDX_SET(x)\  argument
3984 	FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_IDX, x)
3985 #define DSM_TAXI_CAL_CFG_CAL_IDX_GET(x)\  argument
3986 	FIELD_GET(DSM_TAXI_CAL_CFG_CAL_IDX, x)
3989 #define DSM_TAXI_CAL_CFG_CAL_CUR_LEN_SET(x)\  argument
3990 	FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_CUR_LEN, x)
3991 #define DSM_TAXI_CAL_CFG_CAL_CUR_LEN_GET(x)\  argument
3992 	FIELD_GET(DSM_TAXI_CAL_CFG_CAL_CUR_LEN, x)
3995 #define DSM_TAXI_CAL_CFG_CAL_CUR_VAL_SET(x)\  argument
3996 	FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_CUR_VAL, x)
3997 #define DSM_TAXI_CAL_CFG_CAL_CUR_VAL_GET(x)\  argument
3998 	FIELD_GET(DSM_TAXI_CAL_CFG_CAL_CUR_VAL, x)
4001 #define DSM_TAXI_CAL_CFG_CAL_PGM_VAL_SET(x)\  argument
4002 	FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_PGM_VAL, x)
4003 #define DSM_TAXI_CAL_CFG_CAL_PGM_VAL_GET(x)\  argument
4004 	FIELD_GET(DSM_TAXI_CAL_CFG_CAL_PGM_VAL, x)
4007 #define DSM_TAXI_CAL_CFG_CAL_PGM_ENA_SET(x)\  argument
4008 	FIELD_PREP(DSM_TAXI_CAL_CFG_CAL_PGM_ENA, x)
4009 #define DSM_TAXI_CAL_CFG_CAL_PGM_ENA_GET(x)\  argument
4010 	FIELD_GET(DSM_TAXI_CAL_CFG_CAL_PGM_ENA, x)
4017 #define EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL_SET(x)\  argument
4018 	FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL, x)
4019 #define EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL_GET(x)\  argument
4020 	FIELD_GET(EACL_VCAP_ES2_KEY_SEL_IP6_KEY_SEL, x)
4023 #define EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL_SET(x)\  argument
4024 	FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL, x)
4025 #define EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL_GET(x)\  argument
4026 	FIELD_GET(EACL_VCAP_ES2_KEY_SEL_IP4_KEY_SEL, x)
4029 #define EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL_SET(x)\  argument
4030 	FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL, x)
4031 #define EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL_GET(x)\  argument
4032 	FIELD_GET(EACL_VCAP_ES2_KEY_SEL_ARP_KEY_SEL, x)
4035 #define EACL_VCAP_ES2_KEY_SEL_KEY_ENA_SET(x)\  argument
4036 	FIELD_PREP(EACL_VCAP_ES2_KEY_SEL_KEY_ENA, x)
4037 #define EACL_VCAP_ES2_KEY_SEL_KEY_ENA_GET(x)\  argument
4038 	FIELD_GET(EACL_VCAP_ES2_KEY_SEL_KEY_ENA, x)
4049 #define EACL_POL_EACL_CFG_EACL_CNT_MARKED_AS_DROPPED_SET(x)\  argument
4050 	FIELD_PREP(EACL_POL_EACL_CFG_EACL_CNT_MARKED_AS_DROPPED, x)
4051 #define EACL_POL_EACL_CFG_EACL_CNT_MARKED_AS_DROPPED_GET(x)\  argument
4052 	FIELD_GET(EACL_POL_EACL_CFG_EACL_CNT_MARKED_AS_DROPPED, x)
4055 #define EACL_POL_EACL_CFG_EACL_ALLOW_FP_COPY_SET(x)\  argument
4056 	FIELD_PREP(EACL_POL_EACL_CFG_EACL_ALLOW_FP_COPY, x)
4057 #define EACL_POL_EACL_CFG_EACL_ALLOW_FP_COPY_GET(x)\  argument
4058 	FIELD_GET(EACL_POL_EACL_CFG_EACL_ALLOW_FP_COPY, x)
4061 #define EACL_POL_EACL_CFG_EACL_ALLOW_CPU_COPY_SET(x)\  argument
4062 	FIELD_PREP(EACL_POL_EACL_CFG_EACL_ALLOW_CPU_COPY, x)
4063 #define EACL_POL_EACL_CFG_EACL_ALLOW_CPU_COPY_GET(x)\  argument
4064 	FIELD_GET(EACL_POL_EACL_CFG_EACL_ALLOW_CPU_COPY, x)
4067 #define EACL_POL_EACL_CFG_EACL_FORCE_CLOSE_SET(x)\  argument
4068 	FIELD_PREP(EACL_POL_EACL_CFG_EACL_FORCE_CLOSE, x)
4069 #define EACL_POL_EACL_CFG_EACL_FORCE_CLOSE_GET(x)\  argument
4070 	FIELD_GET(EACL_POL_EACL_CFG_EACL_FORCE_CLOSE, x)
4073 #define EACL_POL_EACL_CFG_EACL_FORCE_OPEN_SET(x)\  argument
4074 	FIELD_PREP(EACL_POL_EACL_CFG_EACL_FORCE_OPEN, x)
4075 #define EACL_POL_EACL_CFG_EACL_FORCE_OPEN_GET(x)\  argument
4076 	FIELD_GET(EACL_POL_EACL_CFG_EACL_FORCE_OPEN, x)
4079 #define EACL_POL_EACL_CFG_EACL_FORCE_INIT_SET(x)\  argument
4080 	FIELD_PREP(EACL_POL_EACL_CFG_EACL_FORCE_INIT, x)
4081 #define EACL_POL_EACL_CFG_EACL_FORCE_INIT_GET(x)\  argument
4082 	FIELD_GET(EACL_POL_EACL_CFG_EACL_FORCE_INIT, x)
4089 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY_SET(x)\  argument
4090 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)
4091 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY_GET(x)\  argument
4092 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP_7TUPLE_STICKY, x)
4095 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY_SET(x)\  argument
4096 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)
4097 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY_GET(x)\  argument
4098 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_VID_STICKY, x)
4101 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY_SET(x)\  argument
4102 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)
4103 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY_GET(x)\  argument
4104 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP6_STD_STICKY, x)
4107 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY_SET(x)\  argument
4108 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)
4109 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY_GET(x)\  argument
4110 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_TCPUDP_STICKY, x)
4113 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY_SET(x)\  argument
4114 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)
4115 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY_GET(x)\  argument
4116 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_VID_STICKY, x)
4119 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY_SET(x)\  argument
4120 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)
4121 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY_GET(x)\  argument
4122 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_IP4_OTHER_STICKY, x)
4125 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY_SET(x)\  argument
4126 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)
4127 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY_GET(x)\  argument
4128 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_ARP_STICKY, x)
4131 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY_SET(x)\  argument
4132 	FIELD_PREP(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)
4133 #define EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY_GET(x)\  argument
4134 	FIELD_GET(EACL_SEC_LOOKUP_STICKY_SEC_TYPE_MAC_ETYPE_STICKY, x)
4141 #define EACL_RAM_INIT_RAM_INIT_SET(x)\  argument
4142 	FIELD_PREP(EACL_RAM_INIT_RAM_INIT, x)
4143 #define EACL_RAM_INIT_RAM_INIT_GET(x)\  argument
4144 	FIELD_GET(EACL_RAM_INIT_RAM_INIT, x)
4147 #define EACL_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
4148 	FIELD_PREP(EACL_RAM_INIT_RAM_CFG_HOOK, x)
4149 #define EACL_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
4150 	FIELD_GET(EACL_RAM_INIT_RAM_CFG_HOOK, x)
4157 #define FDMA_CH_ACTIVATE_CH_ACTIVATE_SET(x)\  argument
4158 	FIELD_PREP(FDMA_CH_ACTIVATE_CH_ACTIVATE, x)
4159 #define FDMA_CH_ACTIVATE_CH_ACTIVATE_GET(x)\  argument
4160 	FIELD_GET(FDMA_CH_ACTIVATE_CH_ACTIVATE, x)
4167 #define FDMA_CH_RELOAD_CH_RELOAD_SET(x)\  argument
4168 	FIELD_PREP(FDMA_CH_RELOAD_CH_RELOAD, x)
4169 #define FDMA_CH_RELOAD_CH_RELOAD_GET(x)\  argument
4170 	FIELD_GET(FDMA_CH_RELOAD_CH_RELOAD, x)
4177 #define FDMA_CH_DISABLE_CH_DISABLE_SET(x)\  argument
4178 	FIELD_PREP(FDMA_CH_DISABLE_CH_DISABLE, x)
4179 #define FDMA_CH_DISABLE_CH_DISABLE_GET(x)\  argument
4180 	FIELD_GET(FDMA_CH_DISABLE_CH_DISABLE, x)
4203 #define FDMA_CH_CFG_CH_XTR_STATUS_MODE_SET(x)\  argument
4204 	FIELD_PREP(FDMA_CH_CFG_CH_XTR_STATUS_MODE, x)
4205 #define FDMA_CH_CFG_CH_XTR_STATUS_MODE_GET(x)\  argument
4206 	FIELD_GET(FDMA_CH_CFG_CH_XTR_STATUS_MODE, x)
4209 #define FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(x)\  argument
4210 	FIELD_PREP(FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY, x)
4211 #define FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_GET(x)\  argument
4212 	FIELD_GET(FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY, x)
4215 #define FDMA_CH_CFG_CH_INJ_PORT_SET(x)\  argument
4216 	FIELD_PREP(FDMA_CH_CFG_CH_INJ_PORT, x)
4217 #define FDMA_CH_CFG_CH_INJ_PORT_GET(x)\  argument
4218 	FIELD_GET(FDMA_CH_CFG_CH_INJ_PORT, x)
4221 #define FDMA_CH_CFG_CH_DCB_DB_CNT_SET(x)\  argument
4222 	FIELD_PREP(FDMA_CH_CFG_CH_DCB_DB_CNT, x)
4223 #define FDMA_CH_CFG_CH_DCB_DB_CNT_GET(x)\  argument
4224 	FIELD_GET(FDMA_CH_CFG_CH_DCB_DB_CNT, x)
4227 #define FDMA_CH_CFG_CH_MEM_SET(x)\  argument
4228 	FIELD_PREP(FDMA_CH_CFG_CH_MEM, x)
4229 #define FDMA_CH_CFG_CH_MEM_GET(x)\  argument
4230 	FIELD_GET(FDMA_CH_CFG_CH_MEM, x)
4237 #define FDMA_CH_TRANSLATE_OFFSET_SET(x)\  argument
4238 	FIELD_PREP(FDMA_CH_TRANSLATE_OFFSET, x)
4239 #define FDMA_CH_TRANSLATE_OFFSET_GET(x)\  argument
4240 	FIELD_GET(FDMA_CH_TRANSLATE_OFFSET, x)
4247 #define FDMA_XTR_CFG_XTR_FIFO_WM_SET(x)\  argument
4248 	FIELD_PREP(FDMA_XTR_CFG_XTR_FIFO_WM, x)
4249 #define FDMA_XTR_CFG_XTR_FIFO_WM_GET(x)\  argument
4250 	FIELD_GET(FDMA_XTR_CFG_XTR_FIFO_WM, x)
4253 #define FDMA_XTR_CFG_XTR_ARB_SAT_SET(x)\  argument
4254 	FIELD_PREP(FDMA_XTR_CFG_XTR_ARB_SAT, x)
4255 #define FDMA_XTR_CFG_XTR_ARB_SAT_GET(x)\  argument
4256 	FIELD_GET(FDMA_XTR_CFG_XTR_ARB_SAT, x)
4263 #define FDMA_PORT_CTRL_INJ_STOP_SET(x)\  argument
4264 	FIELD_PREP(FDMA_PORT_CTRL_INJ_STOP, x)
4265 #define FDMA_PORT_CTRL_INJ_STOP_GET(x)\  argument
4266 	FIELD_GET(FDMA_PORT_CTRL_INJ_STOP, x)
4269 #define FDMA_PORT_CTRL_INJ_STOP_FORCE_SET(x)\  argument
4270 	FIELD_PREP(FDMA_PORT_CTRL_INJ_STOP_FORCE, x)
4271 #define FDMA_PORT_CTRL_INJ_STOP_FORCE_GET(x)\  argument
4272 	FIELD_GET(FDMA_PORT_CTRL_INJ_STOP_FORCE, x)
4275 #define FDMA_PORT_CTRL_XTR_STOP_SET(x)\  argument
4276 	FIELD_PREP(FDMA_PORT_CTRL_XTR_STOP, x)
4277 #define FDMA_PORT_CTRL_XTR_STOP_GET(x)\  argument
4278 	FIELD_GET(FDMA_PORT_CTRL_XTR_STOP, x)
4281 #define FDMA_PORT_CTRL_XTR_BUF_IS_EMPTY_SET(x)\  argument
4282 	FIELD_PREP(FDMA_PORT_CTRL_XTR_BUF_IS_EMPTY, x)
4283 #define FDMA_PORT_CTRL_XTR_BUF_IS_EMPTY_GET(x)\  argument
4284 	FIELD_GET(FDMA_PORT_CTRL_XTR_BUF_IS_EMPTY, x)
4287 #define FDMA_PORT_CTRL_XTR_BUF_RST_SET(x)\  argument
4288 	FIELD_PREP(FDMA_PORT_CTRL_XTR_BUF_RST, x)
4289 #define FDMA_PORT_CTRL_XTR_BUF_RST_GET(x)\  argument
4290 	FIELD_GET(FDMA_PORT_CTRL_XTR_BUF_RST, x)
4297 #define FDMA_INTR_DCB_INTR_DCB_SET(x)\  argument
4298 	FIELD_PREP(FDMA_INTR_DCB_INTR_DCB, x)
4299 #define FDMA_INTR_DCB_INTR_DCB_GET(x)\  argument
4300 	FIELD_GET(FDMA_INTR_DCB_INTR_DCB, x)
4307 #define FDMA_INTR_DCB_ENA_INTR_DCB_ENA_SET(x)\  argument
4308 	FIELD_PREP(FDMA_INTR_DCB_ENA_INTR_DCB_ENA, x)
4309 #define FDMA_INTR_DCB_ENA_INTR_DCB_ENA_GET(x)\  argument
4310 	FIELD_GET(FDMA_INTR_DCB_ENA_INTR_DCB_ENA, x)
4317 #define FDMA_INTR_DB_INTR_DB_SET(x)\  argument
4318 	FIELD_PREP(FDMA_INTR_DB_INTR_DB, x)
4319 #define FDMA_INTR_DB_INTR_DB_GET(x)\  argument
4320 	FIELD_GET(FDMA_INTR_DB_INTR_DB, x)
4327 #define FDMA_INTR_DB_ENA_INTR_DB_ENA_SET(x)\  argument
4328 	FIELD_PREP(FDMA_INTR_DB_ENA_INTR_DB_ENA, x)
4329 #define FDMA_INTR_DB_ENA_INTR_DB_ENA_GET(x)\  argument
4330 	FIELD_GET(FDMA_INTR_DB_ENA_INTR_DB_ENA, x)
4337 #define FDMA_INTR_ERR_INTR_PORT_ERR_SET(x)\  argument
4338 	FIELD_PREP(FDMA_INTR_ERR_INTR_PORT_ERR, x)
4339 #define FDMA_INTR_ERR_INTR_PORT_ERR_GET(x)\  argument
4340 	FIELD_GET(FDMA_INTR_ERR_INTR_PORT_ERR, x)
4343 #define FDMA_INTR_ERR_INTR_CH_ERR_SET(x)\  argument
4344 	FIELD_PREP(FDMA_INTR_ERR_INTR_CH_ERR, x)
4345 #define FDMA_INTR_ERR_INTR_CH_ERR_GET(x)\  argument
4346 	FIELD_GET(FDMA_INTR_ERR_INTR_CH_ERR, x)
4353 #define FDMA_ERRORS_ERR_XTR_WR_SET(x)\  argument
4354 	FIELD_PREP(FDMA_ERRORS_ERR_XTR_WR, x)
4355 #define FDMA_ERRORS_ERR_XTR_WR_GET(x)\  argument
4356 	FIELD_GET(FDMA_ERRORS_ERR_XTR_WR, x)
4359 #define FDMA_ERRORS_ERR_XTR_OVF_SET(x)\  argument
4360 	FIELD_PREP(FDMA_ERRORS_ERR_XTR_OVF, x)
4361 #define FDMA_ERRORS_ERR_XTR_OVF_GET(x)\  argument
4362 	FIELD_GET(FDMA_ERRORS_ERR_XTR_OVF, x)
4365 #define FDMA_ERRORS_ERR_XTR_TAXI32_OVF_SET(x)\  argument
4366 	FIELD_PREP(FDMA_ERRORS_ERR_XTR_TAXI32_OVF, x)
4367 #define FDMA_ERRORS_ERR_XTR_TAXI32_OVF_GET(x)\  argument
4368 	FIELD_GET(FDMA_ERRORS_ERR_XTR_TAXI32_OVF, x)
4371 #define FDMA_ERRORS_ERR_DCB_XTR_DATAL_SET(x)\  argument
4372 	FIELD_PREP(FDMA_ERRORS_ERR_DCB_XTR_DATAL, x)
4373 #define FDMA_ERRORS_ERR_DCB_XTR_DATAL_GET(x)\  argument
4374 	FIELD_GET(FDMA_ERRORS_ERR_DCB_XTR_DATAL, x)
4377 #define FDMA_ERRORS_ERR_DCB_RD_SET(x)\  argument
4378 	FIELD_PREP(FDMA_ERRORS_ERR_DCB_RD, x)
4379 #define FDMA_ERRORS_ERR_DCB_RD_GET(x)\  argument
4380 	FIELD_GET(FDMA_ERRORS_ERR_DCB_RD, x)
4383 #define FDMA_ERRORS_ERR_INJ_RD_SET(x)\  argument
4384 	FIELD_PREP(FDMA_ERRORS_ERR_INJ_RD, x)
4385 #define FDMA_ERRORS_ERR_INJ_RD_GET(x)\  argument
4386 	FIELD_GET(FDMA_ERRORS_ERR_INJ_RD, x)
4389 #define FDMA_ERRORS_ERR_INJ_OUT_OF_SYNC_SET(x)\  argument
4390 	FIELD_PREP(FDMA_ERRORS_ERR_INJ_OUT_OF_SYNC, x)
4391 #define FDMA_ERRORS_ERR_INJ_OUT_OF_SYNC_GET(x)\  argument
4392 	FIELD_GET(FDMA_ERRORS_ERR_INJ_OUT_OF_SYNC, x)
4395 #define FDMA_ERRORS_ERR_CH_WR_SET(x)\  argument
4396 	FIELD_PREP(FDMA_ERRORS_ERR_CH_WR, x)
4397 #define FDMA_ERRORS_ERR_CH_WR_GET(x)\  argument
4398 	FIELD_GET(FDMA_ERRORS_ERR_CH_WR, x)
4405 #define FDMA_ERRORS_2_ERR_XTR_FRAG_SET(x)\  argument
4406 	FIELD_PREP(FDMA_ERRORS_2_ERR_XTR_FRAG, x)
4407 #define FDMA_ERRORS_2_ERR_XTR_FRAG_GET(x)\  argument
4408 	FIELD_GET(FDMA_ERRORS_2_ERR_XTR_FRAG, x)
4415 #define FDMA_CTRL_NRESET_SET(x)\  argument
4416 	FIELD_PREP(FDMA_CTRL_NRESET, x)
4417 #define FDMA_CTRL_NRESET_GET(x)\  argument
4418 	FIELD_GET(FDMA_CTRL_NRESET, x)
4425 #define GCB_CHIP_ID_REV_ID_SET(x)\  argument
4426 	FIELD_PREP(GCB_CHIP_ID_REV_ID, x)
4427 #define GCB_CHIP_ID_REV_ID_GET(x)\  argument
4428 	FIELD_GET(GCB_CHIP_ID_REV_ID, x)
4431 #define GCB_CHIP_ID_PART_ID_SET(x)\  argument
4432 	FIELD_PREP(GCB_CHIP_ID_PART_ID, x)
4433 #define GCB_CHIP_ID_PART_ID_GET(x)\  argument
4434 	FIELD_GET(GCB_CHIP_ID_PART_ID, x)
4437 #define GCB_CHIP_ID_MFG_ID_SET(x)\  argument
4438 	FIELD_PREP(GCB_CHIP_ID_MFG_ID, x)
4439 #define GCB_CHIP_ID_MFG_ID_GET(x)\  argument
4440 	FIELD_GET(GCB_CHIP_ID_MFG_ID, x)
4443 #define GCB_CHIP_ID_ONE_SET(x)\  argument
4444 	FIELD_PREP(GCB_CHIP_ID_ONE, x)
4445 #define GCB_CHIP_ID_ONE_GET(x)\  argument
4446 	FIELD_GET(GCB_CHIP_ID_ONE, x)
4453 #define GCB_SOFT_RST_SOFT_NON_CFG_RST_SET(x)\  argument
4454 	FIELD_PREP(GCB_SOFT_RST_SOFT_NON_CFG_RST, x)
4455 #define GCB_SOFT_RST_SOFT_NON_CFG_RST_GET(x)\  argument
4456 	FIELD_GET(GCB_SOFT_RST_SOFT_NON_CFG_RST, x)
4459 #define GCB_SOFT_RST_SOFT_SWC_RST_SET(x)\  argument
4460 	FIELD_PREP(GCB_SOFT_RST_SOFT_SWC_RST, x)
4461 #define GCB_SOFT_RST_SOFT_SWC_RST_GET(x)\  argument
4462 	FIELD_GET(GCB_SOFT_RST_SOFT_SWC_RST, x)
4465 #define GCB_SOFT_RST_SOFT_CHIP_RST_SET(x)\  argument
4466 	FIELD_PREP(GCB_SOFT_RST_SOFT_CHIP_RST, x)
4467 #define GCB_SOFT_RST_SOFT_CHIP_RST_GET(x)\  argument
4468 	FIELD_GET(GCB_SOFT_RST_SOFT_CHIP_RST, x)
4475 #define GCB_HW_SGPIO_SD_CFG_SD_HIGH_ENA_SET(x)\  argument
4476 	FIELD_PREP(GCB_HW_SGPIO_SD_CFG_SD_HIGH_ENA, x)
4477 #define GCB_HW_SGPIO_SD_CFG_SD_HIGH_ENA_GET(x)\  argument
4478 	FIELD_GET(GCB_HW_SGPIO_SD_CFG_SD_HIGH_ENA, x)
4481 #define GCB_HW_SGPIO_SD_CFG_SD_MAP_SEL_SET(x)\  argument
4482 	FIELD_PREP(GCB_HW_SGPIO_SD_CFG_SD_MAP_SEL, x)
4483 #define GCB_HW_SGPIO_SD_CFG_SD_MAP_SEL_GET(x)\  argument
4484 	FIELD_GET(GCB_HW_SGPIO_SD_CFG_SD_MAP_SEL, x)
4491 #define GCB_HW_SGPIO_TO_SD_MAP_CFG_SGPIO_TO_SD_SEL_SET(x)\  argument
4492 	FIELD_PREP(GCB_HW_SGPIO_TO_SD_MAP_CFG_SGPIO_TO_SD_SEL, x)
4493 #define GCB_HW_SGPIO_TO_SD_MAP_CFG_SGPIO_TO_SD_SEL_GET(x)\  argument
4494 	FIELD_GET(GCB_HW_SGPIO_TO_SD_MAP_CFG_SGPIO_TO_SD_SEL, x)
4501 #define GCB_SIO_CLOCK_SIO_CLK_FREQ_SET(x)\  argument
4502 	FIELD_PREP(GCB_SIO_CLOCK_SIO_CLK_FREQ, x)
4503 #define GCB_SIO_CLOCK_SIO_CLK_FREQ_GET(x)\  argument
4504 	FIELD_GET(GCB_SIO_CLOCK_SIO_CLK_FREQ, x)
4507 #define GCB_SIO_CLOCK_SYS_CLK_PERIOD_SET(x)\  argument
4508 	FIELD_PREP(GCB_SIO_CLOCK_SYS_CLK_PERIOD, x)
4509 #define GCB_SIO_CLOCK_SYS_CLK_PERIOD_GET(x)\  argument
4510 	FIELD_GET(GCB_SIO_CLOCK_SYS_CLK_PERIOD, x)
4517 #define HSCH_CIR_CFG_CIR_RATE_SET(x)\  argument
4518 	FIELD_PREP(HSCH_CIR_CFG_CIR_RATE, x)
4519 #define HSCH_CIR_CFG_CIR_RATE_GET(x)\  argument
4520 	FIELD_GET(HSCH_CIR_CFG_CIR_RATE, x)
4523 #define HSCH_CIR_CFG_CIR_BURST_SET(x)\  argument
4524 	FIELD_PREP(HSCH_CIR_CFG_CIR_BURST, x)
4525 #define HSCH_CIR_CFG_CIR_BURST_GET(x)\  argument
4526 	FIELD_GET(HSCH_CIR_CFG_CIR_BURST, x)
4533 #define HSCH_EIR_CFG_EIR_RATE_SET(x)\  argument
4534 	FIELD_PREP(HSCH_EIR_CFG_EIR_RATE, x)
4535 #define HSCH_EIR_CFG_EIR_RATE_GET(x)\  argument
4536 	FIELD_GET(HSCH_EIR_CFG_EIR_RATE, x)
4539 #define HSCH_EIR_CFG_EIR_BURST_SET(x)\  argument
4540 	FIELD_PREP(HSCH_EIR_CFG_EIR_BURST, x)
4541 #define HSCH_EIR_CFG_EIR_BURST_GET(x)\  argument
4542 	FIELD_GET(HSCH_EIR_CFG_EIR_BURST, x)
4549 #define HSCH_SE_CFG_SE_DWRR_CNT_SET(x)\  argument
4550 	FIELD_PREP(HSCH_SE_CFG_SE_DWRR_CNT, x)
4551 #define HSCH_SE_CFG_SE_DWRR_CNT_GET(x)\  argument
4552 	FIELD_GET(HSCH_SE_CFG_SE_DWRR_CNT, x)
4555 #define HSCH_SE_CFG_SE_AVB_ENA_SET(x)\  argument
4556 	FIELD_PREP(HSCH_SE_CFG_SE_AVB_ENA, x)
4557 #define HSCH_SE_CFG_SE_AVB_ENA_GET(x)\  argument
4558 	FIELD_GET(HSCH_SE_CFG_SE_AVB_ENA, x)
4561 #define HSCH_SE_CFG_SE_FRM_MODE_SET(x)\  argument
4562 	FIELD_PREP(HSCH_SE_CFG_SE_FRM_MODE, x)
4563 #define HSCH_SE_CFG_SE_FRM_MODE_GET(x)\  argument
4564 	FIELD_GET(HSCH_SE_CFG_SE_FRM_MODE, x)
4567 #define HSCH_SE_CFG_SE_DWRR_FRM_MODE_SET(x)\  argument
4568 	FIELD_PREP(HSCH_SE_CFG_SE_DWRR_FRM_MODE, x)
4569 #define HSCH_SE_CFG_SE_DWRR_FRM_MODE_GET(x)\  argument
4570 	FIELD_GET(HSCH_SE_CFG_SE_DWRR_FRM_MODE, x)
4573 #define HSCH_SE_CFG_SE_STOP_SET(x)\  argument
4574 	FIELD_PREP(HSCH_SE_CFG_SE_STOP, x)
4575 #define HSCH_SE_CFG_SE_STOP_GET(x)\  argument
4576 	FIELD_GET(HSCH_SE_CFG_SE_STOP, x)
4583 #define HSCH_SE_CONNECT_SE_LEAK_LINK_SET(x)\  argument
4584 	FIELD_PREP(HSCH_SE_CONNECT_SE_LEAK_LINK, x)
4585 #define HSCH_SE_CONNECT_SE_LEAK_LINK_GET(x)\  argument
4586 	FIELD_GET(HSCH_SE_CONNECT_SE_LEAK_LINK, x)
4593 #define HSCH_SE_DLB_SENSE_SE_DLB_PRIO_SET(x)\  argument
4594 	FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_PRIO, x)
4595 #define HSCH_SE_DLB_SENSE_SE_DLB_PRIO_GET(x)\  argument
4596 	FIELD_GET(HSCH_SE_DLB_SENSE_SE_DLB_PRIO, x)
4599 #define HSCH_SE_DLB_SENSE_SE_DLB_DPORT_SET(x)\  argument
4600 	FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_DPORT, x)
4601 #define HSCH_SE_DLB_SENSE_SE_DLB_DPORT_GET(x)\  argument
4602 	FIELD_GET(HSCH_SE_DLB_SENSE_SE_DLB_DPORT, x)
4605 #define HSCH_SE_DLB_SENSE_SE_DLB_SE_ENA_SET(x)\  argument
4606 	FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_SE_ENA, x)
4607 #define HSCH_SE_DLB_SENSE_SE_DLB_SE_ENA_GET(x)\  argument
4608 	FIELD_GET(HSCH_SE_DLB_SENSE_SE_DLB_SE_ENA, x)
4611 #define HSCH_SE_DLB_SENSE_SE_DLB_PRIO_ENA_SET(x)\  argument
4612 	FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_PRIO_ENA, x)
4613 #define HSCH_SE_DLB_SENSE_SE_DLB_PRIO_ENA_GET(x)\  argument
4614 	FIELD_GET(HSCH_SE_DLB_SENSE_SE_DLB_PRIO_ENA, x)
4617 #define HSCH_SE_DLB_SENSE_SE_DLB_DPORT_ENA_SET(x)\  argument
4618 	FIELD_PREP(HSCH_SE_DLB_SENSE_SE_DLB_DPORT_ENA, x)
4619 #define HSCH_SE_DLB_SENSE_SE_DLB_DPORT_ENA_GET(x)\  argument
4620 	FIELD_GET(HSCH_SE_DLB_SENSE_SE_DLB_DPORT_ENA, x)
4627 #define HSCH_DWRR_ENTRY_DWRR_COST_SET(x)\  argument
4628 	FIELD_PREP(HSCH_DWRR_ENTRY_DWRR_COST, x)
4629 #define HSCH_DWRR_ENTRY_DWRR_COST_GET(x)\  argument
4630 	FIELD_GET(HSCH_DWRR_ENTRY_DWRR_COST, x)
4633 #define HSCH_DWRR_ENTRY_DWRR_BALANCE_SET(x)\  argument
4634 	FIELD_PREP(HSCH_DWRR_ENTRY_DWRR_BALANCE, x)
4635 #define HSCH_DWRR_ENTRY_DWRR_BALANCE_GET(x)\  argument
4636 	FIELD_GET(HSCH_DWRR_ENTRY_DWRR_BALANCE, x)
4643 #define HSCH_HSCH_CFG_CFG_CFG_SE_IDX_SET(x)\  argument
4644 	FIELD_PREP(HSCH_HSCH_CFG_CFG_CFG_SE_IDX, x)
4645 #define HSCH_HSCH_CFG_CFG_CFG_SE_IDX_GET(x)\  argument
4646 	FIELD_GET(HSCH_HSCH_CFG_CFG_CFG_SE_IDX, x)
4649 #define HSCH_HSCH_CFG_CFG_HSCH_LAYER_SET(x)\  argument
4650 	FIELD_PREP(HSCH_HSCH_CFG_CFG_HSCH_LAYER, x)
4651 #define HSCH_HSCH_CFG_CFG_HSCH_LAYER_GET(x)\  argument
4652 	FIELD_GET(HSCH_HSCH_CFG_CFG_HSCH_LAYER, x)
4655 #define HSCH_HSCH_CFG_CFG_CSR_GRANT_SET(x)\  argument
4656 	FIELD_PREP(HSCH_HSCH_CFG_CFG_CSR_GRANT, x)
4657 #define HSCH_HSCH_CFG_CFG_CSR_GRANT_GET(x)\  argument
4658 	FIELD_GET(HSCH_HSCH_CFG_CFG_CSR_GRANT, x)
4665 #define HSCH_SYS_CLK_PER_100PS_SET(x)\  argument
4666 	FIELD_PREP(HSCH_SYS_CLK_PER_100PS, x)
4667 #define HSCH_SYS_CLK_PER_100PS_GET(x)\  argument
4668 	FIELD_GET(HSCH_SYS_CLK_PER_100PS, x)
4675 #define HSCH_HSCH_TIMER_CFG_LEAK_TIME_SET(x)\  argument
4676 	FIELD_PREP(HSCH_HSCH_TIMER_CFG_LEAK_TIME, x)
4677 #define HSCH_HSCH_TIMER_CFG_LEAK_TIME_GET(x)\  argument
4678 	FIELD_GET(HSCH_HSCH_TIMER_CFG_LEAK_TIME, x)
4685 #define HSCH_HSCH_LEAK_CFG_LEAK_FIRST_SET(x)\  argument
4686 	FIELD_PREP(HSCH_HSCH_LEAK_CFG_LEAK_FIRST, x)
4687 #define HSCH_HSCH_LEAK_CFG_LEAK_FIRST_GET(x)\  argument
4688 	FIELD_GET(HSCH_HSCH_LEAK_CFG_LEAK_FIRST, x)
4691 #define HSCH_HSCH_LEAK_CFG_LEAK_ERR_SET(x)\  argument
4692 	FIELD_PREP(HSCH_HSCH_LEAK_CFG_LEAK_ERR, x)
4693 #define HSCH_HSCH_LEAK_CFG_LEAK_ERR_GET(x)\  argument
4694 	FIELD_GET(HSCH_HSCH_LEAK_CFG_LEAK_ERR, x)
4701 #define HSCH_FLUSH_CTRL_FLUSH_ENA_SET(x)\  argument
4702 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_ENA, x)
4703 #define HSCH_FLUSH_CTRL_FLUSH_ENA_GET(x)\  argument
4704 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_ENA, x)
4707 #define HSCH_FLUSH_CTRL_FLUSH_SRC_SET(x)\  argument
4708 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_SRC, x)
4709 #define HSCH_FLUSH_CTRL_FLUSH_SRC_GET(x)\  argument
4710 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_SRC, x)
4713 #define HSCH_FLUSH_CTRL_FLUSH_DST_SET(x)\  argument
4714 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_DST, x)
4715 #define HSCH_FLUSH_CTRL_FLUSH_DST_GET(x)\  argument
4716 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_DST, x)
4719 #define HSCH_FLUSH_CTRL_FLUSH_PORT_SET(x)\  argument
4720 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_PORT, x)
4721 #define HSCH_FLUSH_CTRL_FLUSH_PORT_GET(x)\  argument
4722 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_PORT, x)
4725 #define HSCH_FLUSH_CTRL_FLUSH_QUEUE_SET(x)\  argument
4726 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_QUEUE, x)
4727 #define HSCH_FLUSH_CTRL_FLUSH_QUEUE_GET(x)\  argument
4728 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_QUEUE, x)
4731 #define HSCH_FLUSH_CTRL_FLUSH_SE_SET(x)\  argument
4732 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_SE, x)
4733 #define HSCH_FLUSH_CTRL_FLUSH_SE_GET(x)\  argument
4734 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_SE, x)
4737 #define HSCH_FLUSH_CTRL_FLUSH_HIER_SET(x)\  argument
4738 	FIELD_PREP(HSCH_FLUSH_CTRL_FLUSH_HIER, x)
4739 #define HSCH_FLUSH_CTRL_FLUSH_HIER_GET(x)\  argument
4740 	FIELD_GET(HSCH_FLUSH_CTRL_FLUSH_HIER, x)
4747 #define HSCH_PORT_MODE_DEQUEUE_DIS_SET(x)\  argument
4748 	FIELD_PREP(HSCH_PORT_MODE_DEQUEUE_DIS, x)
4749 #define HSCH_PORT_MODE_DEQUEUE_DIS_GET(x)\  argument
4750 	FIELD_GET(HSCH_PORT_MODE_DEQUEUE_DIS, x)
4753 #define HSCH_PORT_MODE_AGE_DIS_SET(x)\  argument
4754 	FIELD_PREP(HSCH_PORT_MODE_AGE_DIS, x)
4755 #define HSCH_PORT_MODE_AGE_DIS_GET(x)\  argument
4756 	FIELD_GET(HSCH_PORT_MODE_AGE_DIS, x)
4759 #define HSCH_PORT_MODE_TRUNC_ENA_SET(x)\  argument
4760 	FIELD_PREP(HSCH_PORT_MODE_TRUNC_ENA, x)
4761 #define HSCH_PORT_MODE_TRUNC_ENA_GET(x)\  argument
4762 	FIELD_GET(HSCH_PORT_MODE_TRUNC_ENA, x)
4765 #define HSCH_PORT_MODE_EIR_REMARK_ENA_SET(x)\  argument
4766 	FIELD_PREP(HSCH_PORT_MODE_EIR_REMARK_ENA, x)
4767 #define HSCH_PORT_MODE_EIR_REMARK_ENA_GET(x)\  argument
4768 	FIELD_GET(HSCH_PORT_MODE_EIR_REMARK_ENA, x)
4771 #define HSCH_PORT_MODE_CPU_PRIO_MODE_SET(x)\  argument
4772 	FIELD_PREP(HSCH_PORT_MODE_CPU_PRIO_MODE, x)
4773 #define HSCH_PORT_MODE_CPU_PRIO_MODE_GET(x)\  argument
4774 	FIELD_GET(HSCH_PORT_MODE_CPU_PRIO_MODE, x)
4781 #define HSCH_OUTB_SHARE_ENA_OUTB_SHARE_ENA_SET(x)\  argument
4782 	FIELD_PREP(HSCH_OUTB_SHARE_ENA_OUTB_SHARE_ENA, x)
4783 #define HSCH_OUTB_SHARE_ENA_OUTB_SHARE_ENA_GET(x)\  argument
4784 	FIELD_GET(HSCH_OUTB_SHARE_ENA_OUTB_SHARE_ENA, x)
4791 #define HSCH_RESET_CFG_CORE_ENA_SET(x)\  argument
4792 	FIELD_PREP(HSCH_RESET_CFG_CORE_ENA, x)
4793 #define HSCH_RESET_CFG_CORE_ENA_GET(x)\  argument
4794 	FIELD_GET(HSCH_RESET_CFG_CORE_ENA, x)
4801 #define HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY_SET(x)\  argument
4802 	FIELD_PREP(HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY, x)
4803 #define HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY_GET(x)\  argument
4804 	FIELD_GET(HSCH_TAS_STATEMACHINE_CFG_REVISIT_DLY, x)
4811 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_COL_SET(x)\  argument
4812 	FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_COL, x)
4813 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_COL_GET(x)\  argument
4814 	FIELD_GET(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_COL, x)
4817 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_TYPE_SET(x)\  argument
4818 	FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_TYPE, x)
4819 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_TYPE_GET(x)\  argument
4820 	FIELD_GET(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_TYPE, x)
4823 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_ROW_SET(x)\  argument
4824 	FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_ROW, x)
4825 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_ROW_GET(x)\  argument
4826 	FIELD_GET(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_DIRECT_ROW, x)
4829 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_SET(x)\  argument
4830 	FIELD_PREP(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD, x)
4831 #define LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD_GET(x)\  argument
4832 	FIELD_GET(LRN_COMMON_ACCESS_CTRL_CPU_ACCESS_CMD, x)
4835 #define LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_SET(x)\  argument
4836 	FIELD_PREP(LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT, x)
4837 #define LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT_GET(x)\  argument
4838 	FIELD_GET(LRN_COMMON_ACCESS_CTRL_MAC_TABLE_ACCESS_SHOT, x)
4845 #define LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_FID_SET(x)\  argument
4846 	FIELD_PREP(LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_FID, x)
4847 #define LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_FID_GET(x)\  argument
4848 	FIELD_GET(LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_FID, x)
4851 #define LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_MAC_MSB_SET(x)\  argument
4852 	FIELD_PREP(LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_MAC_MSB, x)
4853 #define LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_MAC_MSB_GET(x)\  argument
4854 	FIELD_GET(LRN_MAC_ACCESS_CFG_0_MAC_ENTRY_MAC_MSB, x)
4865 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_SRC_KILL_FWD_SET(x)\  argument
4866 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_SRC_KILL_FWD, x)
4867 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_SRC_KILL_FWD_GET(x)\  argument
4868 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_SRC_KILL_FWD, x)
4871 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_NXT_LRN_ALL_SET(x)\  argument
4872 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_NXT_LRN_ALL, x)
4873 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_NXT_LRN_ALL_GET(x)\  argument
4874 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_NXT_LRN_ALL, x)
4877 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_QU_SET(x)\  argument
4878 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_QU, x)
4879 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_QU_GET(x)\  argument
4880 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_QU, x)
4883 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_COPY_SET(x)\  argument
4884 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_COPY, x)
4885 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_COPY_GET(x)\  argument
4886 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_CPU_COPY, x)
4889 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLAN_IGNORE_SET(x)\  argument
4890 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLAN_IGNORE, x)
4891 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLAN_IGNORE_GET(x)\  argument
4892 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLAN_IGNORE, x)
4895 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_MIRROR_SET(x)\  argument
4896 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_MIRROR, x)
4897 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_MIRROR_GET(x)\  argument
4898 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_MIRROR, x)
4901 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_FLAG_SET(x)\  argument
4902 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_FLAG, x)
4903 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_FLAG_GET(x)\  argument
4904 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_FLAG, x)
4907 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_INTERVAL_SET(x)\  argument
4908 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_INTERVAL, x)
4909 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_INTERVAL_GET(x)\  argument
4910 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_AGE_INTERVAL, x)
4913 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_LOCKED_SET(x)\  argument
4914 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_LOCKED, x)
4915 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_LOCKED_GET(x)\  argument
4916 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_LOCKED, x)
4919 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD_SET(x)\  argument
4920 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD, x)
4921 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD_GET(x)\  argument
4922 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_VLD, x)
4925 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE_SET(x)\  argument
4926 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE, x)
4927 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE_GET(x)\  argument
4928 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_TYPE, x)
4931 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_SET(x)\  argument
4932 	FIELD_PREP(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR, x)
4933 #define LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_GET(x)\  argument
4934 	FIELD_GET(LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR, x)
4941 #define LRN_MAC_ACCESS_CFG_3_MAC_ENTRY_ISDX_LIMIT_IDX_SET(x)\  argument
4942 	FIELD_PREP(LRN_MAC_ACCESS_CFG_3_MAC_ENTRY_ISDX_LIMIT_IDX, x)
4943 #define LRN_MAC_ACCESS_CFG_3_MAC_ENTRY_ISDX_LIMIT_IDX_GET(x)\  argument
4944 	FIELD_GET(LRN_MAC_ACCESS_CFG_3_MAC_ENTRY_ISDX_LIMIT_IDX, x)
4951 #define LRN_SCAN_NEXT_CFG_SCAN_AGE_FLAG_UPDATE_SEL_SET(x)\  argument
4952 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_AGE_FLAG_UPDATE_SEL, x)
4953 #define LRN_SCAN_NEXT_CFG_SCAN_AGE_FLAG_UPDATE_SEL_GET(x)\  argument
4954 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_AGE_FLAG_UPDATE_SEL, x)
4957 #define LRN_SCAN_NEXT_CFG_SCAN_NXT_LRN_ALL_UPDATE_SEL_SET(x)\  argument
4958 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NXT_LRN_ALL_UPDATE_SEL, x)
4959 #define LRN_SCAN_NEXT_CFG_SCAN_NXT_LRN_ALL_UPDATE_SEL_GET(x)\  argument
4960 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NXT_LRN_ALL_UPDATE_SEL, x)
4963 #define LRN_SCAN_NEXT_CFG_SCAN_AGE_FILTER_SEL_SET(x)\  argument
4964 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_AGE_FILTER_SEL, x)
4965 #define LRN_SCAN_NEXT_CFG_SCAN_AGE_FILTER_SEL_GET(x)\  argument
4966 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_AGE_FILTER_SEL, x)
4969 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_MOVE_FOUND_ENA_SET(x)\  argument
4970 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_MOVE_FOUND_ENA, x)
4971 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_MOVE_FOUND_ENA_GET(x)\  argument
4972 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NEXT_MOVE_FOUND_ENA, x)
4975 #define LRN_SCAN_NEXT_CFG_NXT_LRN_ALL_FILTER_ENA_SET(x)\  argument
4976 	FIELD_PREP(LRN_SCAN_NEXT_CFG_NXT_LRN_ALL_FILTER_ENA, x)
4977 #define LRN_SCAN_NEXT_CFG_NXT_LRN_ALL_FILTER_ENA_GET(x)\  argument
4978 	FIELD_GET(LRN_SCAN_NEXT_CFG_NXT_LRN_ALL_FILTER_ENA, x)
4981 #define LRN_SCAN_NEXT_CFG_SCAN_USE_PORT_FILTER_ENA_SET(x)\  argument
4982 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_USE_PORT_FILTER_ENA, x)
4983 #define LRN_SCAN_NEXT_CFG_SCAN_USE_PORT_FILTER_ENA_GET(x)\  argument
4984 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_USE_PORT_FILTER_ENA, x)
4987 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_REMOVE_FOUND_ENA_SET(x)\  argument
4988 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_REMOVE_FOUND_ENA, x)
4989 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_REMOVE_FOUND_ENA_GET(x)\  argument
4990 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NEXT_REMOVE_FOUND_ENA, x)
4993 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA_SET(x)\  argument
4994 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA, x)
4995 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA_GET(x)\  argument
4996 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NEXT_UNTIL_FOUND_ENA, x)
4999 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_INC_AGE_BITS_ENA_SET(x)\  argument
5000 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_INC_AGE_BITS_ENA, x)
5001 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_INC_AGE_BITS_ENA_GET(x)\  argument
5002 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NEXT_INC_AGE_BITS_ENA, x)
5005 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_AGED_ONLY_ENA_SET(x)\  argument
5006 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_AGED_ONLY_ENA, x)
5007 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_AGED_ONLY_ENA_GET(x)\  argument
5008 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NEXT_AGED_ONLY_ENA, x)
5011 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_IGNORE_LOCKED_ENA_SET(x)\  argument
5012 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_NEXT_IGNORE_LOCKED_ENA, x)
5013 #define LRN_SCAN_NEXT_CFG_SCAN_NEXT_IGNORE_LOCKED_ENA_GET(x)\  argument
5014 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_NEXT_IGNORE_LOCKED_ENA, x)
5017 #define LRN_SCAN_NEXT_CFG_SCAN_AGE_INTERVAL_MASK_SET(x)\  argument
5018 	FIELD_PREP(LRN_SCAN_NEXT_CFG_SCAN_AGE_INTERVAL_MASK, x)
5019 #define LRN_SCAN_NEXT_CFG_SCAN_AGE_INTERVAL_MASK_GET(x)\  argument
5020 	FIELD_GET(LRN_SCAN_NEXT_CFG_SCAN_AGE_INTERVAL_MASK, x)
5023 #define LRN_SCAN_NEXT_CFG_ISDX_LIMIT_IDX_FILTER_ENA_SET(x)\  argument
5024 	FIELD_PREP(LRN_SCAN_NEXT_CFG_ISDX_LIMIT_IDX_FILTER_ENA, x)
5025 #define LRN_SCAN_NEXT_CFG_ISDX_LIMIT_IDX_FILTER_ENA_GET(x)\  argument
5026 	FIELD_GET(LRN_SCAN_NEXT_CFG_ISDX_LIMIT_IDX_FILTER_ENA, x)
5029 #define LRN_SCAN_NEXT_CFG_FID_FILTER_ENA_SET(x)\  argument
5030 	FIELD_PREP(LRN_SCAN_NEXT_CFG_FID_FILTER_ENA, x)
5031 #define LRN_SCAN_NEXT_CFG_FID_FILTER_ENA_GET(x)\  argument
5032 	FIELD_GET(LRN_SCAN_NEXT_CFG_FID_FILTER_ENA, x)
5035 #define LRN_SCAN_NEXT_CFG_ADDR_FILTER_ENA_SET(x)\  argument
5036 	FIELD_PREP(LRN_SCAN_NEXT_CFG_ADDR_FILTER_ENA, x)
5037 #define LRN_SCAN_NEXT_CFG_ADDR_FILTER_ENA_GET(x)\  argument
5038 	FIELD_GET(LRN_SCAN_NEXT_CFG_ADDR_FILTER_ENA, x)
5045 #define LRN_SCAN_NEXT_CFG_1_PORT_MOVE_NEW_ADDR_SET(x)\  argument
5046 	FIELD_PREP(LRN_SCAN_NEXT_CFG_1_PORT_MOVE_NEW_ADDR, x)
5047 #define LRN_SCAN_NEXT_CFG_1_PORT_MOVE_NEW_ADDR_GET(x)\  argument
5048 	FIELD_GET(LRN_SCAN_NEXT_CFG_1_PORT_MOVE_NEW_ADDR, x)
5051 #define LRN_SCAN_NEXT_CFG_1_SCAN_ENTRY_ADDR_MASK_SET(x)\  argument
5052 	FIELD_PREP(LRN_SCAN_NEXT_CFG_1_SCAN_ENTRY_ADDR_MASK, x)
5053 #define LRN_SCAN_NEXT_CFG_1_SCAN_ENTRY_ADDR_MASK_GET(x)\  argument
5054 	FIELD_GET(LRN_SCAN_NEXT_CFG_1_SCAN_ENTRY_ADDR_MASK, x)
5061 #define LRN_AUTOAGE_CFG_UNIT_SIZE_SET(x)\  argument
5062 	FIELD_PREP(LRN_AUTOAGE_CFG_UNIT_SIZE, x)
5063 #define LRN_AUTOAGE_CFG_UNIT_SIZE_GET(x)\  argument
5064 	FIELD_GET(LRN_AUTOAGE_CFG_UNIT_SIZE, x)
5067 #define LRN_AUTOAGE_CFG_PERIOD_VAL_SET(x)\  argument
5068 	FIELD_PREP(LRN_AUTOAGE_CFG_PERIOD_VAL, x)
5069 #define LRN_AUTOAGE_CFG_PERIOD_VAL_GET(x)\  argument
5070 	FIELD_GET(LRN_AUTOAGE_CFG_PERIOD_VAL, x)
5077 #define LRN_AUTOAGE_CFG_1_PAUSE_AUTO_AGE_ENA_SET(x)\  argument
5078 	FIELD_PREP(LRN_AUTOAGE_CFG_1_PAUSE_AUTO_AGE_ENA, x)
5079 #define LRN_AUTOAGE_CFG_1_PAUSE_AUTO_AGE_ENA_GET(x)\  argument
5080 	FIELD_GET(LRN_AUTOAGE_CFG_1_PAUSE_AUTO_AGE_ENA, x)
5083 #define LRN_AUTOAGE_CFG_1_CELLS_BETWEEN_ENTRY_SCAN_SET(x)\  argument
5084 	FIELD_PREP(LRN_AUTOAGE_CFG_1_CELLS_BETWEEN_ENTRY_SCAN, x)
5085 #define LRN_AUTOAGE_CFG_1_CELLS_BETWEEN_ENTRY_SCAN_GET(x)\  argument
5086 	FIELD_GET(LRN_AUTOAGE_CFG_1_CELLS_BETWEEN_ENTRY_SCAN, x)
5089 #define LRN_AUTOAGE_CFG_1_CLK_PERIOD_01NS_SET(x)\  argument
5090 	FIELD_PREP(LRN_AUTOAGE_CFG_1_CLK_PERIOD_01NS, x)
5091 #define LRN_AUTOAGE_CFG_1_CLK_PERIOD_01NS_GET(x)\  argument
5092 	FIELD_GET(LRN_AUTOAGE_CFG_1_CLK_PERIOD_01NS, x)
5095 #define LRN_AUTOAGE_CFG_1_USE_PORT_FILTER_ENA_SET(x)\  argument
5096 	FIELD_PREP(LRN_AUTOAGE_CFG_1_USE_PORT_FILTER_ENA, x)
5097 #define LRN_AUTOAGE_CFG_1_USE_PORT_FILTER_ENA_GET(x)\  argument
5098 	FIELD_GET(LRN_AUTOAGE_CFG_1_USE_PORT_FILTER_ENA, x)
5101 #define LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_SHOT_SET(x)\  argument
5102 	FIELD_PREP(LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_SHOT, x)
5103 #define LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_SHOT_GET(x)\  argument
5104 	FIELD_GET(LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_SHOT, x)
5107 #define LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_STOP_SHOT_SET(x)\  argument
5108 	FIELD_PREP(LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_STOP_SHOT, x)
5109 #define LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_STOP_SHOT_GET(x)\  argument
5110 	FIELD_GET(LRN_AUTOAGE_CFG_1_FORCE_HW_SCAN_STOP_SHOT, x)
5113 #define LRN_AUTOAGE_CFG_1_FORCE_IDLE_ENA_SET(x)\  argument
5114 	FIELD_PREP(LRN_AUTOAGE_CFG_1_FORCE_IDLE_ENA, x)
5115 #define LRN_AUTOAGE_CFG_1_FORCE_IDLE_ENA_GET(x)\  argument
5116 	FIELD_GET(LRN_AUTOAGE_CFG_1_FORCE_IDLE_ENA, x)
5123 #define LRN_AUTOAGE_CFG_2_NEXT_ROW_SET(x)\  argument
5124 	FIELD_PREP(LRN_AUTOAGE_CFG_2_NEXT_ROW, x)
5125 #define LRN_AUTOAGE_CFG_2_NEXT_ROW_GET(x)\  argument
5126 	FIELD_GET(LRN_AUTOAGE_CFG_2_NEXT_ROW, x)
5129 #define LRN_AUTOAGE_CFG_2_SCAN_ONGOING_STATUS_SET(x)\  argument
5130 	FIELD_PREP(LRN_AUTOAGE_CFG_2_SCAN_ONGOING_STATUS, x)
5131 #define LRN_AUTOAGE_CFG_2_SCAN_ONGOING_STATUS_GET(x)\  argument
5132 	FIELD_GET(LRN_AUTOAGE_CFG_2_SCAN_ONGOING_STATUS, x)
5139 #define PCEP_RCTRL_2_OUT_0_MSG_CODE_SET(x)\  argument
5140 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_MSG_CODE, x)
5141 #define PCEP_RCTRL_2_OUT_0_MSG_CODE_GET(x)\  argument
5142 	FIELD_GET(PCEP_RCTRL_2_OUT_0_MSG_CODE, x)
5145 #define PCEP_RCTRL_2_OUT_0_TAG_SET(x)\  argument
5146 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_TAG, x)
5147 #define PCEP_RCTRL_2_OUT_0_TAG_GET(x)\  argument
5148 	FIELD_GET(PCEP_RCTRL_2_OUT_0_TAG, x)
5151 #define PCEP_RCTRL_2_OUT_0_TAG_SUBSTITUTE_EN_SET(x)\  argument
5152 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_TAG_SUBSTITUTE_EN, x)
5153 #define PCEP_RCTRL_2_OUT_0_TAG_SUBSTITUTE_EN_GET(x)\  argument
5154 	FIELD_GET(PCEP_RCTRL_2_OUT_0_TAG_SUBSTITUTE_EN, x)
5157 #define PCEP_RCTRL_2_OUT_0_FUNC_BYPASS_SET(x)\  argument
5158 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_FUNC_BYPASS, x)
5159 #define PCEP_RCTRL_2_OUT_0_FUNC_BYPASS_GET(x)\  argument
5160 	FIELD_GET(PCEP_RCTRL_2_OUT_0_FUNC_BYPASS, x)
5163 #define PCEP_RCTRL_2_OUT_0_SNP_SET(x)\  argument
5164 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_SNP, x)
5165 #define PCEP_RCTRL_2_OUT_0_SNP_GET(x)\  argument
5166 	FIELD_GET(PCEP_RCTRL_2_OUT_0_SNP, x)
5169 #define PCEP_RCTRL_2_OUT_0_INHIBIT_PAYLOAD_SET(x)\  argument
5170 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_INHIBIT_PAYLOAD, x)
5171 #define PCEP_RCTRL_2_OUT_0_INHIBIT_PAYLOAD_GET(x)\  argument
5172 	FIELD_GET(PCEP_RCTRL_2_OUT_0_INHIBIT_PAYLOAD, x)
5175 #define PCEP_RCTRL_2_OUT_0_HEADER_SUBSTITUTE_EN_SET(x)\  argument
5176 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_HEADER_SUBSTITUTE_EN, x)
5177 #define PCEP_RCTRL_2_OUT_0_HEADER_SUBSTITUTE_EN_GET(x)\  argument
5178 	FIELD_GET(PCEP_RCTRL_2_OUT_0_HEADER_SUBSTITUTE_EN, x)
5181 #define PCEP_RCTRL_2_OUT_0_CFG_SHIFT_MODE_SET(x)\  argument
5182 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_CFG_SHIFT_MODE, x)
5183 #define PCEP_RCTRL_2_OUT_0_CFG_SHIFT_MODE_GET(x)\  argument
5184 	FIELD_GET(PCEP_RCTRL_2_OUT_0_CFG_SHIFT_MODE, x)
5187 #define PCEP_RCTRL_2_OUT_0_INVERT_MODE_SET(x)\  argument
5188 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_INVERT_MODE, x)
5189 #define PCEP_RCTRL_2_OUT_0_INVERT_MODE_GET(x)\  argument
5190 	FIELD_GET(PCEP_RCTRL_2_OUT_0_INVERT_MODE, x)
5193 #define PCEP_RCTRL_2_OUT_0_REGION_EN_SET(x)\  argument
5194 	FIELD_PREP(PCEP_RCTRL_2_OUT_0_REGION_EN, x)
5195 #define PCEP_RCTRL_2_OUT_0_REGION_EN_GET(x)\  argument
5196 	FIELD_GET(PCEP_RCTRL_2_OUT_0_REGION_EN, x)
5203 #define PCEP_ADDR_LWR_OUT_0_LWR_BASE_HW_SET(x)\  argument
5204 	FIELD_PREP(PCEP_ADDR_LWR_OUT_0_LWR_BASE_HW, x)
5205 #define PCEP_ADDR_LWR_OUT_0_LWR_BASE_HW_GET(x)\  argument
5206 	FIELD_GET(PCEP_ADDR_LWR_OUT_0_LWR_BASE_HW, x)
5209 #define PCEP_ADDR_LWR_OUT_0_LWR_BASE_RW_SET(x)\  argument
5210 	FIELD_PREP(PCEP_ADDR_LWR_OUT_0_LWR_BASE_RW, x)
5211 #define PCEP_ADDR_LWR_OUT_0_LWR_BASE_RW_GET(x)\  argument
5212 	FIELD_GET(PCEP_ADDR_LWR_OUT_0_LWR_BASE_RW, x)
5223 #define PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_HW_SET(x)\  argument
5224 	FIELD_PREP(PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_HW, x)
5225 #define PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_HW_GET(x)\  argument
5226 	FIELD_GET(PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_HW, x)
5229 #define PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_RW_SET(x)\  argument
5230 	FIELD_PREP(PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_RW, x)
5231 #define PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_RW_GET(x)\  argument
5232 	FIELD_GET(PCEP_ADDR_LIM_OUT_0_LIMIT_ADDR_RW, x)
5247 #define PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_RW_SET(x)\  argument
5248 	FIELD_PREP(PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_RW, x)
5249 #define PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_RW_GET(x)\  argument
5250 	FIELD_GET(PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_RW, x)
5253 #define PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_HW_SET(x)\  argument
5254 	FIELD_PREP(PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_HW, x)
5255 #define PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_HW_GET(x)\  argument
5256 	FIELD_GET(PCEP_ADDR_UPR_LIM_OUT_0_UPPR_LIMIT_ADDR_HW, x)
5263 #define PCS10G_BR_PCS_CFG_PCS_ENA_SET(x)\  argument
5264 	FIELD_PREP(PCS10G_BR_PCS_CFG_PCS_ENA, x)
5265 #define PCS10G_BR_PCS_CFG_PCS_ENA_GET(x)\  argument
5266 	FIELD_GET(PCS10G_BR_PCS_CFG_PCS_ENA, x)
5269 #define PCS10G_BR_PCS_CFG_PMA_LOOPBACK_ENA_SET(x)\  argument
5270 	FIELD_PREP(PCS10G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)
5271 #define PCS10G_BR_PCS_CFG_PMA_LOOPBACK_ENA_GET(x)\  argument
5272 	FIELD_GET(PCS10G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)
5275 #define PCS10G_BR_PCS_CFG_SH_CNT_MAX_SET(x)\  argument
5276 	FIELD_PREP(PCS10G_BR_PCS_CFG_SH_CNT_MAX, x)
5277 #define PCS10G_BR_PCS_CFG_SH_CNT_MAX_GET(x)\  argument
5278 	FIELD_GET(PCS10G_BR_PCS_CFG_SH_CNT_MAX, x)
5281 #define PCS10G_BR_PCS_CFG_RX_DATA_FLIP_SET(x)\  argument
5282 	FIELD_PREP(PCS10G_BR_PCS_CFG_RX_DATA_FLIP, x)
5283 #define PCS10G_BR_PCS_CFG_RX_DATA_FLIP_GET(x)\  argument
5284 	FIELD_GET(PCS10G_BR_PCS_CFG_RX_DATA_FLIP, x)
5287 #define PCS10G_BR_PCS_CFG_RESYNC_ENA_SET(x)\  argument
5288 	FIELD_PREP(PCS10G_BR_PCS_CFG_RESYNC_ENA, x)
5289 #define PCS10G_BR_PCS_CFG_RESYNC_ENA_GET(x)\  argument
5290 	FIELD_GET(PCS10G_BR_PCS_CFG_RESYNC_ENA, x)
5293 #define PCS10G_BR_PCS_CFG_LF_GEN_DIS_SET(x)\  argument
5294 	FIELD_PREP(PCS10G_BR_PCS_CFG_LF_GEN_DIS, x)
5295 #define PCS10G_BR_PCS_CFG_LF_GEN_DIS_GET(x)\  argument
5296 	FIELD_GET(PCS10G_BR_PCS_CFG_LF_GEN_DIS, x)
5299 #define PCS10G_BR_PCS_CFG_RX_TEST_MODE_SET(x)\  argument
5300 	FIELD_PREP(PCS10G_BR_PCS_CFG_RX_TEST_MODE, x)
5301 #define PCS10G_BR_PCS_CFG_RX_TEST_MODE_GET(x)\  argument
5302 	FIELD_GET(PCS10G_BR_PCS_CFG_RX_TEST_MODE, x)
5305 #define PCS10G_BR_PCS_CFG_RX_SCR_DISABLE_SET(x)\  argument
5306 	FIELD_PREP(PCS10G_BR_PCS_CFG_RX_SCR_DISABLE, x)
5307 #define PCS10G_BR_PCS_CFG_RX_SCR_DISABLE_GET(x)\  argument
5308 	FIELD_GET(PCS10G_BR_PCS_CFG_RX_SCR_DISABLE, x)
5311 #define PCS10G_BR_PCS_CFG_TX_DATA_FLIP_SET(x)\  argument
5312 	FIELD_PREP(PCS10G_BR_PCS_CFG_TX_DATA_FLIP, x)
5313 #define PCS10G_BR_PCS_CFG_TX_DATA_FLIP_GET(x)\  argument
5314 	FIELD_GET(PCS10G_BR_PCS_CFG_TX_DATA_FLIP, x)
5317 #define PCS10G_BR_PCS_CFG_AN_LINK_CTRL_ENA_SET(x)\  argument
5318 	FIELD_PREP(PCS10G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)
5319 #define PCS10G_BR_PCS_CFG_AN_LINK_CTRL_ENA_GET(x)\  argument
5320 	FIELD_GET(PCS10G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)
5323 #define PCS10G_BR_PCS_CFG_TX_TEST_MODE_SET(x)\  argument
5324 	FIELD_PREP(PCS10G_BR_PCS_CFG_TX_TEST_MODE, x)
5325 #define PCS10G_BR_PCS_CFG_TX_TEST_MODE_GET(x)\  argument
5326 	FIELD_GET(PCS10G_BR_PCS_CFG_TX_TEST_MODE, x)
5329 #define PCS10G_BR_PCS_CFG_TX_SCR_DISABLE_SET(x)\  argument
5330 	FIELD_PREP(PCS10G_BR_PCS_CFG_TX_SCR_DISABLE, x)
5331 #define PCS10G_BR_PCS_CFG_TX_SCR_DISABLE_GET(x)\  argument
5332 	FIELD_GET(PCS10G_BR_PCS_CFG_TX_SCR_DISABLE, x)
5339 #define PCS10G_BR_PCS_SD_CFG_SD_SEL_SET(x)\  argument
5340 	FIELD_PREP(PCS10G_BR_PCS_SD_CFG_SD_SEL, x)
5341 #define PCS10G_BR_PCS_SD_CFG_SD_SEL_GET(x)\  argument
5342 	FIELD_GET(PCS10G_BR_PCS_SD_CFG_SD_SEL, x)
5345 #define PCS10G_BR_PCS_SD_CFG_SD_POL_SET(x)\  argument
5346 	FIELD_PREP(PCS10G_BR_PCS_SD_CFG_SD_POL, x)
5347 #define PCS10G_BR_PCS_SD_CFG_SD_POL_GET(x)\  argument
5348 	FIELD_GET(PCS10G_BR_PCS_SD_CFG_SD_POL, x)
5351 #define PCS10G_BR_PCS_SD_CFG_SD_ENA_SET(x)\  argument
5352 	FIELD_PREP(PCS10G_BR_PCS_SD_CFG_SD_ENA, x)
5353 #define PCS10G_BR_PCS_SD_CFG_SD_ENA_GET(x)\  argument
5354 	FIELD_GET(PCS10G_BR_PCS_SD_CFG_SD_ENA, x)
5361 #define PCS25G_BR_PCS_CFG_PCS_ENA_SET(x)\  argument
5362 	FIELD_PREP(PCS25G_BR_PCS_CFG_PCS_ENA, x)
5363 #define PCS25G_BR_PCS_CFG_PCS_ENA_GET(x)\  argument
5364 	FIELD_GET(PCS25G_BR_PCS_CFG_PCS_ENA, x)
5367 #define PCS25G_BR_PCS_CFG_PMA_LOOPBACK_ENA_SET(x)\  argument
5368 	FIELD_PREP(PCS25G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)
5369 #define PCS25G_BR_PCS_CFG_PMA_LOOPBACK_ENA_GET(x)\  argument
5370 	FIELD_GET(PCS25G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)
5373 #define PCS25G_BR_PCS_CFG_SH_CNT_MAX_SET(x)\  argument
5374 	FIELD_PREP(PCS25G_BR_PCS_CFG_SH_CNT_MAX, x)
5375 #define PCS25G_BR_PCS_CFG_SH_CNT_MAX_GET(x)\  argument
5376 	FIELD_GET(PCS25G_BR_PCS_CFG_SH_CNT_MAX, x)
5379 #define PCS25G_BR_PCS_CFG_RX_DATA_FLIP_SET(x)\  argument
5380 	FIELD_PREP(PCS25G_BR_PCS_CFG_RX_DATA_FLIP, x)
5381 #define PCS25G_BR_PCS_CFG_RX_DATA_FLIP_GET(x)\  argument
5382 	FIELD_GET(PCS25G_BR_PCS_CFG_RX_DATA_FLIP, x)
5385 #define PCS25G_BR_PCS_CFG_RESYNC_ENA_SET(x)\  argument
5386 	FIELD_PREP(PCS25G_BR_PCS_CFG_RESYNC_ENA, x)
5387 #define PCS25G_BR_PCS_CFG_RESYNC_ENA_GET(x)\  argument
5388 	FIELD_GET(PCS25G_BR_PCS_CFG_RESYNC_ENA, x)
5391 #define PCS25G_BR_PCS_CFG_LF_GEN_DIS_SET(x)\  argument
5392 	FIELD_PREP(PCS25G_BR_PCS_CFG_LF_GEN_DIS, x)
5393 #define PCS25G_BR_PCS_CFG_LF_GEN_DIS_GET(x)\  argument
5394 	FIELD_GET(PCS25G_BR_PCS_CFG_LF_GEN_DIS, x)
5397 #define PCS25G_BR_PCS_CFG_RX_TEST_MODE_SET(x)\  argument
5398 	FIELD_PREP(PCS25G_BR_PCS_CFG_RX_TEST_MODE, x)
5399 #define PCS25G_BR_PCS_CFG_RX_TEST_MODE_GET(x)\  argument
5400 	FIELD_GET(PCS25G_BR_PCS_CFG_RX_TEST_MODE, x)
5403 #define PCS25G_BR_PCS_CFG_RX_SCR_DISABLE_SET(x)\  argument
5404 	FIELD_PREP(PCS25G_BR_PCS_CFG_RX_SCR_DISABLE, x)
5405 #define PCS25G_BR_PCS_CFG_RX_SCR_DISABLE_GET(x)\  argument
5406 	FIELD_GET(PCS25G_BR_PCS_CFG_RX_SCR_DISABLE, x)
5409 #define PCS25G_BR_PCS_CFG_TX_DATA_FLIP_SET(x)\  argument
5410 	FIELD_PREP(PCS25G_BR_PCS_CFG_TX_DATA_FLIP, x)
5411 #define PCS25G_BR_PCS_CFG_TX_DATA_FLIP_GET(x)\  argument
5412 	FIELD_GET(PCS25G_BR_PCS_CFG_TX_DATA_FLIP, x)
5415 #define PCS25G_BR_PCS_CFG_AN_LINK_CTRL_ENA_SET(x)\  argument
5416 	FIELD_PREP(PCS25G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)
5417 #define PCS25G_BR_PCS_CFG_AN_LINK_CTRL_ENA_GET(x)\  argument
5418 	FIELD_GET(PCS25G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)
5421 #define PCS25G_BR_PCS_CFG_TX_TEST_MODE_SET(x)\  argument
5422 	FIELD_PREP(PCS25G_BR_PCS_CFG_TX_TEST_MODE, x)
5423 #define PCS25G_BR_PCS_CFG_TX_TEST_MODE_GET(x)\  argument
5424 	FIELD_GET(PCS25G_BR_PCS_CFG_TX_TEST_MODE, x)
5427 #define PCS25G_BR_PCS_CFG_TX_SCR_DISABLE_SET(x)\  argument
5428 	FIELD_PREP(PCS25G_BR_PCS_CFG_TX_SCR_DISABLE, x)
5429 #define PCS25G_BR_PCS_CFG_TX_SCR_DISABLE_GET(x)\  argument
5430 	FIELD_GET(PCS25G_BR_PCS_CFG_TX_SCR_DISABLE, x)
5437 #define PCS25G_BR_PCS_SD_CFG_SD_SEL_SET(x)\  argument
5438 	FIELD_PREP(PCS25G_BR_PCS_SD_CFG_SD_SEL, x)
5439 #define PCS25G_BR_PCS_SD_CFG_SD_SEL_GET(x)\  argument
5440 	FIELD_GET(PCS25G_BR_PCS_SD_CFG_SD_SEL, x)
5443 #define PCS25G_BR_PCS_SD_CFG_SD_POL_SET(x)\  argument
5444 	FIELD_PREP(PCS25G_BR_PCS_SD_CFG_SD_POL, x)
5445 #define PCS25G_BR_PCS_SD_CFG_SD_POL_GET(x)\  argument
5446 	FIELD_GET(PCS25G_BR_PCS_SD_CFG_SD_POL, x)
5449 #define PCS25G_BR_PCS_SD_CFG_SD_ENA_SET(x)\  argument
5450 	FIELD_PREP(PCS25G_BR_PCS_SD_CFG_SD_ENA, x)
5451 #define PCS25G_BR_PCS_SD_CFG_SD_ENA_GET(x)\  argument
5452 	FIELD_GET(PCS25G_BR_PCS_SD_CFG_SD_ENA, x)
5459 #define PCS5G_BR_PCS_CFG_PCS_ENA_SET(x)\  argument
5460 	FIELD_PREP(PCS5G_BR_PCS_CFG_PCS_ENA, x)
5461 #define PCS5G_BR_PCS_CFG_PCS_ENA_GET(x)\  argument
5462 	FIELD_GET(PCS5G_BR_PCS_CFG_PCS_ENA, x)
5465 #define PCS5G_BR_PCS_CFG_PMA_LOOPBACK_ENA_SET(x)\  argument
5466 	FIELD_PREP(PCS5G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)
5467 #define PCS5G_BR_PCS_CFG_PMA_LOOPBACK_ENA_GET(x)\  argument
5468 	FIELD_GET(PCS5G_BR_PCS_CFG_PMA_LOOPBACK_ENA, x)
5471 #define PCS5G_BR_PCS_CFG_SH_CNT_MAX_SET(x)\  argument
5472 	FIELD_PREP(PCS5G_BR_PCS_CFG_SH_CNT_MAX, x)
5473 #define PCS5G_BR_PCS_CFG_SH_CNT_MAX_GET(x)\  argument
5474 	FIELD_GET(PCS5G_BR_PCS_CFG_SH_CNT_MAX, x)
5477 #define PCS5G_BR_PCS_CFG_RX_DATA_FLIP_SET(x)\  argument
5478 	FIELD_PREP(PCS5G_BR_PCS_CFG_RX_DATA_FLIP, x)
5479 #define PCS5G_BR_PCS_CFG_RX_DATA_FLIP_GET(x)\  argument
5480 	FIELD_GET(PCS5G_BR_PCS_CFG_RX_DATA_FLIP, x)
5483 #define PCS5G_BR_PCS_CFG_RESYNC_ENA_SET(x)\  argument
5484 	FIELD_PREP(PCS5G_BR_PCS_CFG_RESYNC_ENA, x)
5485 #define PCS5G_BR_PCS_CFG_RESYNC_ENA_GET(x)\  argument
5486 	FIELD_GET(PCS5G_BR_PCS_CFG_RESYNC_ENA, x)
5489 #define PCS5G_BR_PCS_CFG_LF_GEN_DIS_SET(x)\  argument
5490 	FIELD_PREP(PCS5G_BR_PCS_CFG_LF_GEN_DIS, x)
5491 #define PCS5G_BR_PCS_CFG_LF_GEN_DIS_GET(x)\  argument
5492 	FIELD_GET(PCS5G_BR_PCS_CFG_LF_GEN_DIS, x)
5495 #define PCS5G_BR_PCS_CFG_RX_TEST_MODE_SET(x)\  argument
5496 	FIELD_PREP(PCS5G_BR_PCS_CFG_RX_TEST_MODE, x)
5497 #define PCS5G_BR_PCS_CFG_RX_TEST_MODE_GET(x)\  argument
5498 	FIELD_GET(PCS5G_BR_PCS_CFG_RX_TEST_MODE, x)
5501 #define PCS5G_BR_PCS_CFG_RX_SCR_DISABLE_SET(x)\  argument
5502 	FIELD_PREP(PCS5G_BR_PCS_CFG_RX_SCR_DISABLE, x)
5503 #define PCS5G_BR_PCS_CFG_RX_SCR_DISABLE_GET(x)\  argument
5504 	FIELD_GET(PCS5G_BR_PCS_CFG_RX_SCR_DISABLE, x)
5507 #define PCS5G_BR_PCS_CFG_TX_DATA_FLIP_SET(x)\  argument
5508 	FIELD_PREP(PCS5G_BR_PCS_CFG_TX_DATA_FLIP, x)
5509 #define PCS5G_BR_PCS_CFG_TX_DATA_FLIP_GET(x)\  argument
5510 	FIELD_GET(PCS5G_BR_PCS_CFG_TX_DATA_FLIP, x)
5513 #define PCS5G_BR_PCS_CFG_AN_LINK_CTRL_ENA_SET(x)\  argument
5514 	FIELD_PREP(PCS5G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)
5515 #define PCS5G_BR_PCS_CFG_AN_LINK_CTRL_ENA_GET(x)\  argument
5516 	FIELD_GET(PCS5G_BR_PCS_CFG_AN_LINK_CTRL_ENA, x)
5519 #define PCS5G_BR_PCS_CFG_TX_TEST_MODE_SET(x)\  argument
5520 	FIELD_PREP(PCS5G_BR_PCS_CFG_TX_TEST_MODE, x)
5521 #define PCS5G_BR_PCS_CFG_TX_TEST_MODE_GET(x)\  argument
5522 	FIELD_GET(PCS5G_BR_PCS_CFG_TX_TEST_MODE, x)
5525 #define PCS5G_BR_PCS_CFG_TX_SCR_DISABLE_SET(x)\  argument
5526 	FIELD_PREP(PCS5G_BR_PCS_CFG_TX_SCR_DISABLE, x)
5527 #define PCS5G_BR_PCS_CFG_TX_SCR_DISABLE_GET(x)\  argument
5528 	FIELD_GET(PCS5G_BR_PCS_CFG_TX_SCR_DISABLE, x)
5535 #define PCS5G_BR_PCS_SD_CFG_SD_SEL_SET(x)\  argument
5536 	FIELD_PREP(PCS5G_BR_PCS_SD_CFG_SD_SEL, x)
5537 #define PCS5G_BR_PCS_SD_CFG_SD_SEL_GET(x)\  argument
5538 	FIELD_GET(PCS5G_BR_PCS_SD_CFG_SD_SEL, x)
5541 #define PCS5G_BR_PCS_SD_CFG_SD_POL_SET(x)\  argument
5542 	FIELD_PREP(PCS5G_BR_PCS_SD_CFG_SD_POL, x)
5543 #define PCS5G_BR_PCS_SD_CFG_SD_POL_GET(x)\  argument
5544 	FIELD_GET(PCS5G_BR_PCS_SD_CFG_SD_POL, x)
5547 #define PCS5G_BR_PCS_SD_CFG_SD_ENA_SET(x)\  argument
5548 	FIELD_PREP(PCS5G_BR_PCS_SD_CFG_SD_ENA, x)
5549 #define PCS5G_BR_PCS_SD_CFG_SD_ENA_GET(x)\  argument
5550 	FIELD_GET(PCS5G_BR_PCS_SD_CFG_SD_ENA, x)
5557 #define PORT_CONF_DEV5G_MODES_DEV5G_D0_MODE_SET(x)\  argument
5558 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D0_MODE, x)
5559 #define PORT_CONF_DEV5G_MODES_DEV5G_D0_MODE_GET(x)\  argument
5560 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D0_MODE, x)
5563 #define PORT_CONF_DEV5G_MODES_DEV5G_D1_MODE_SET(x)\  argument
5564 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D1_MODE, x)
5565 #define PORT_CONF_DEV5G_MODES_DEV5G_D1_MODE_GET(x)\  argument
5566 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D1_MODE, x)
5569 #define PORT_CONF_DEV5G_MODES_DEV5G_D2_MODE_SET(x)\  argument
5570 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D2_MODE, x)
5571 #define PORT_CONF_DEV5G_MODES_DEV5G_D2_MODE_GET(x)\  argument
5572 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D2_MODE, x)
5575 #define PORT_CONF_DEV5G_MODES_DEV5G_D3_MODE_SET(x)\  argument
5576 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D3_MODE, x)
5577 #define PORT_CONF_DEV5G_MODES_DEV5G_D3_MODE_GET(x)\  argument
5578 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D3_MODE, x)
5581 #define PORT_CONF_DEV5G_MODES_DEV5G_D4_MODE_SET(x)\  argument
5582 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D4_MODE, x)
5583 #define PORT_CONF_DEV5G_MODES_DEV5G_D4_MODE_GET(x)\  argument
5584 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D4_MODE, x)
5587 #define PORT_CONF_DEV5G_MODES_DEV5G_D5_MODE_SET(x)\  argument
5588 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D5_MODE, x)
5589 #define PORT_CONF_DEV5G_MODES_DEV5G_D5_MODE_GET(x)\  argument
5590 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D5_MODE, x)
5593 #define PORT_CONF_DEV5G_MODES_DEV5G_D6_MODE_SET(x)\  argument
5594 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D6_MODE, x)
5595 #define PORT_CONF_DEV5G_MODES_DEV5G_D6_MODE_GET(x)\  argument
5596 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D6_MODE, x)
5599 #define PORT_CONF_DEV5G_MODES_DEV5G_D7_MODE_SET(x)\  argument
5600 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D7_MODE, x)
5601 #define PORT_CONF_DEV5G_MODES_DEV5G_D7_MODE_GET(x)\  argument
5602 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D7_MODE, x)
5605 #define PORT_CONF_DEV5G_MODES_DEV5G_D8_MODE_SET(x)\  argument
5606 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D8_MODE, x)
5607 #define PORT_CONF_DEV5G_MODES_DEV5G_D8_MODE_GET(x)\  argument
5608 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D8_MODE, x)
5611 #define PORT_CONF_DEV5G_MODES_DEV5G_D9_MODE_SET(x)\  argument
5612 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D9_MODE, x)
5613 #define PORT_CONF_DEV5G_MODES_DEV5G_D9_MODE_GET(x)\  argument
5614 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D9_MODE, x)
5617 #define PORT_CONF_DEV5G_MODES_DEV5G_D10_MODE_SET(x)\  argument
5618 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D10_MODE, x)
5619 #define PORT_CONF_DEV5G_MODES_DEV5G_D10_MODE_GET(x)\  argument
5620 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D10_MODE, x)
5623 #define PORT_CONF_DEV5G_MODES_DEV5G_D11_MODE_SET(x)\  argument
5624 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D11_MODE, x)
5625 #define PORT_CONF_DEV5G_MODES_DEV5G_D11_MODE_GET(x)\  argument
5626 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D11_MODE, x)
5629 #define PORT_CONF_DEV5G_MODES_DEV5G_D64_MODE_SET(x)\  argument
5630 	FIELD_PREP(PORT_CONF_DEV5G_MODES_DEV5G_D64_MODE, x)
5631 #define PORT_CONF_DEV5G_MODES_DEV5G_D64_MODE_GET(x)\  argument
5632 	FIELD_GET(PORT_CONF_DEV5G_MODES_DEV5G_D64_MODE, x)
5639 #define PORT_CONF_DEV10G_MODES_DEV10G_D12_MODE_SET(x)\  argument
5640 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D12_MODE, x)
5641 #define PORT_CONF_DEV10G_MODES_DEV10G_D12_MODE_GET(x)\  argument
5642 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D12_MODE, x)
5645 #define PORT_CONF_DEV10G_MODES_DEV10G_D13_MODE_SET(x)\  argument
5646 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D13_MODE, x)
5647 #define PORT_CONF_DEV10G_MODES_DEV10G_D13_MODE_GET(x)\  argument
5648 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D13_MODE, x)
5651 #define PORT_CONF_DEV10G_MODES_DEV10G_D14_MODE_SET(x)\  argument
5652 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D14_MODE, x)
5653 #define PORT_CONF_DEV10G_MODES_DEV10G_D14_MODE_GET(x)\  argument
5654 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D14_MODE, x)
5657 #define PORT_CONF_DEV10G_MODES_DEV10G_D15_MODE_SET(x)\  argument
5658 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D15_MODE, x)
5659 #define PORT_CONF_DEV10G_MODES_DEV10G_D15_MODE_GET(x)\  argument
5660 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D15_MODE, x)
5663 #define PORT_CONF_DEV10G_MODES_DEV10G_D48_MODE_SET(x)\  argument
5664 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D48_MODE, x)
5665 #define PORT_CONF_DEV10G_MODES_DEV10G_D48_MODE_GET(x)\  argument
5666 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D48_MODE, x)
5669 #define PORT_CONF_DEV10G_MODES_DEV10G_D49_MODE_SET(x)\  argument
5670 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D49_MODE, x)
5671 #define PORT_CONF_DEV10G_MODES_DEV10G_D49_MODE_GET(x)\  argument
5672 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D49_MODE, x)
5675 #define PORT_CONF_DEV10G_MODES_DEV10G_D50_MODE_SET(x)\  argument
5676 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D50_MODE, x)
5677 #define PORT_CONF_DEV10G_MODES_DEV10G_D50_MODE_GET(x)\  argument
5678 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D50_MODE, x)
5681 #define PORT_CONF_DEV10G_MODES_DEV10G_D51_MODE_SET(x)\  argument
5682 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D51_MODE, x)
5683 #define PORT_CONF_DEV10G_MODES_DEV10G_D51_MODE_GET(x)\  argument
5684 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D51_MODE, x)
5687 #define PORT_CONF_DEV10G_MODES_DEV10G_D52_MODE_SET(x)\  argument
5688 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D52_MODE, x)
5689 #define PORT_CONF_DEV10G_MODES_DEV10G_D52_MODE_GET(x)\  argument
5690 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D52_MODE, x)
5693 #define PORT_CONF_DEV10G_MODES_DEV10G_D53_MODE_SET(x)\  argument
5694 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D53_MODE, x)
5695 #define PORT_CONF_DEV10G_MODES_DEV10G_D53_MODE_GET(x)\  argument
5696 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D53_MODE, x)
5699 #define PORT_CONF_DEV10G_MODES_DEV10G_D54_MODE_SET(x)\  argument
5700 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D54_MODE, x)
5701 #define PORT_CONF_DEV10G_MODES_DEV10G_D54_MODE_GET(x)\  argument
5702 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D54_MODE, x)
5705 #define PORT_CONF_DEV10G_MODES_DEV10G_D55_MODE_SET(x)\  argument
5706 	FIELD_PREP(PORT_CONF_DEV10G_MODES_DEV10G_D55_MODE, x)
5707 #define PORT_CONF_DEV10G_MODES_DEV10G_D55_MODE_GET(x)\  argument
5708 	FIELD_GET(PORT_CONF_DEV10G_MODES_DEV10G_D55_MODE, x)
5715 #define PORT_CONF_DEV25G_MODES_DEV25G_D56_MODE_SET(x)\  argument
5716 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D56_MODE, x)
5717 #define PORT_CONF_DEV25G_MODES_DEV25G_D56_MODE_GET(x)\  argument
5718 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D56_MODE, x)
5721 #define PORT_CONF_DEV25G_MODES_DEV25G_D57_MODE_SET(x)\  argument
5722 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D57_MODE, x)
5723 #define PORT_CONF_DEV25G_MODES_DEV25G_D57_MODE_GET(x)\  argument
5724 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D57_MODE, x)
5727 #define PORT_CONF_DEV25G_MODES_DEV25G_D58_MODE_SET(x)\  argument
5728 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D58_MODE, x)
5729 #define PORT_CONF_DEV25G_MODES_DEV25G_D58_MODE_GET(x)\  argument
5730 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D58_MODE, x)
5733 #define PORT_CONF_DEV25G_MODES_DEV25G_D59_MODE_SET(x)\  argument
5734 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D59_MODE, x)
5735 #define PORT_CONF_DEV25G_MODES_DEV25G_D59_MODE_GET(x)\  argument
5736 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D59_MODE, x)
5739 #define PORT_CONF_DEV25G_MODES_DEV25G_D60_MODE_SET(x)\  argument
5740 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D60_MODE, x)
5741 #define PORT_CONF_DEV25G_MODES_DEV25G_D60_MODE_GET(x)\  argument
5742 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D60_MODE, x)
5745 #define PORT_CONF_DEV25G_MODES_DEV25G_D61_MODE_SET(x)\  argument
5746 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D61_MODE, x)
5747 #define PORT_CONF_DEV25G_MODES_DEV25G_D61_MODE_GET(x)\  argument
5748 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D61_MODE, x)
5751 #define PORT_CONF_DEV25G_MODES_DEV25G_D62_MODE_SET(x)\  argument
5752 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D62_MODE, x)
5753 #define PORT_CONF_DEV25G_MODES_DEV25G_D62_MODE_GET(x)\  argument
5754 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D62_MODE, x)
5757 #define PORT_CONF_DEV25G_MODES_DEV25G_D63_MODE_SET(x)\  argument
5758 	FIELD_PREP(PORT_CONF_DEV25G_MODES_DEV25G_D63_MODE, x)
5759 #define PORT_CONF_DEV25G_MODES_DEV25G_D63_MODE_GET(x)\  argument
5760 	FIELD_GET(PORT_CONF_DEV25G_MODES_DEV25G_D63_MODE, x)
5767 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_0_SET(x)\  argument
5768 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_0, x)
5769 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_0_GET(x)\  argument
5770 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_0, x)
5773 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_1_SET(x)\  argument
5774 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_1, x)
5775 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_1_GET(x)\  argument
5776 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_1, x)
5779 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_2_SET(x)\  argument
5780 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_2, x)
5781 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_2_GET(x)\  argument
5782 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_2, x)
5785 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_3_SET(x)\  argument
5786 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_3, x)
5787 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_3_GET(x)\  argument
5788 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_3, x)
5791 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_4_SET(x)\  argument
5792 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_4, x)
5793 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_4_GET(x)\  argument
5794 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_4, x)
5797 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_5_SET(x)\  argument
5798 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_5, x)
5799 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_5_GET(x)\  argument
5800 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_5, x)
5803 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_6_SET(x)\  argument
5804 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_6, x)
5805 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_6_GET(x)\  argument
5806 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_6, x)
5809 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_7_SET(x)\  argument
5810 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_7, x)
5811 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_7_GET(x)\  argument
5812 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_7, x)
5815 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_8_SET(x)\  argument
5816 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_8, x)
5817 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_8_GET(x)\  argument
5818 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_8, x)
5821 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_9_SET(x)\  argument
5822 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_9, x)
5823 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_9_GET(x)\  argument
5824 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_9, x)
5827 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_10_SET(x)\  argument
5828 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_10, x)
5829 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_10_GET(x)\  argument
5830 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_10, x)
5833 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_11_SET(x)\  argument
5834 	FIELD_PREP(PORT_CONF_QSGMII_ENA_QSGMII_ENA_11, x)
5835 #define PORT_CONF_QSGMII_ENA_QSGMII_ENA_11_GET(x)\  argument
5836 	FIELD_GET(PORT_CONF_QSGMII_ENA_QSGMII_ENA_11, x)
5843 #define PORT_CONF_USGMII_CFG_BYPASS_SCRAM_SET(x)\  argument
5844 	FIELD_PREP(PORT_CONF_USGMII_CFG_BYPASS_SCRAM, x)
5845 #define PORT_CONF_USGMII_CFG_BYPASS_SCRAM_GET(x)\  argument
5846 	FIELD_GET(PORT_CONF_USGMII_CFG_BYPASS_SCRAM, x)
5849 #define PORT_CONF_USGMII_CFG_BYPASS_DESCRAM_SET(x)\  argument
5850 	FIELD_PREP(PORT_CONF_USGMII_CFG_BYPASS_DESCRAM, x)
5851 #define PORT_CONF_USGMII_CFG_BYPASS_DESCRAM_GET(x)\  argument
5852 	FIELD_GET(PORT_CONF_USGMII_CFG_BYPASS_DESCRAM, x)
5855 #define PORT_CONF_USGMII_CFG_FLIP_LANES_SET(x)\  argument
5856 	FIELD_PREP(PORT_CONF_USGMII_CFG_FLIP_LANES, x)
5857 #define PORT_CONF_USGMII_CFG_FLIP_LANES_GET(x)\  argument
5858 	FIELD_GET(PORT_CONF_USGMII_CFG_FLIP_LANES, x)
5861 #define PORT_CONF_USGMII_CFG_SHYST_DIS_SET(x)\  argument
5862 	FIELD_PREP(PORT_CONF_USGMII_CFG_SHYST_DIS, x)
5863 #define PORT_CONF_USGMII_CFG_SHYST_DIS_GET(x)\  argument
5864 	FIELD_GET(PORT_CONF_USGMII_CFG_SHYST_DIS, x)
5867 #define PORT_CONF_USGMII_CFG_E_DET_ENA_SET(x)\  argument
5868 	FIELD_PREP(PORT_CONF_USGMII_CFG_E_DET_ENA, x)
5869 #define PORT_CONF_USGMII_CFG_E_DET_ENA_GET(x)\  argument
5870 	FIELD_GET(PORT_CONF_USGMII_CFG_E_DET_ENA, x)
5873 #define PORT_CONF_USGMII_CFG_USE_I1_ENA_SET(x)\  argument
5874 	FIELD_PREP(PORT_CONF_USGMII_CFG_USE_I1_ENA, x)
5875 #define PORT_CONF_USGMII_CFG_USE_I1_ENA_GET(x)\  argument
5876 	FIELD_GET(PORT_CONF_USGMII_CFG_USE_I1_ENA, x)
5879 #define PORT_CONF_USGMII_CFG_QUAD_MODE_SET(x)\  argument
5880 	FIELD_PREP(PORT_CONF_USGMII_CFG_QUAD_MODE, x)
5881 #define PORT_CONF_USGMII_CFG_QUAD_MODE_GET(x)\  argument
5882 	FIELD_GET(PORT_CONF_USGMII_CFG_QUAD_MODE, x)
5889 #define PTP_PTP_PIN_INTR_INTR_PTP_SET(x)\  argument
5890 	FIELD_PREP(PTP_PTP_PIN_INTR_INTR_PTP, x)
5891 #define PTP_PTP_PIN_INTR_INTR_PTP_GET(x)\  argument
5892 	FIELD_GET(PTP_PTP_PIN_INTR_INTR_PTP, x)
5899 #define PTP_PTP_PIN_INTR_ENA_INTR_PTP_ENA_SET(x)\  argument
5900 	FIELD_PREP(PTP_PTP_PIN_INTR_ENA_INTR_PTP_ENA, x)
5901 #define PTP_PTP_PIN_INTR_ENA_INTR_PTP_ENA_GET(x)\  argument
5902 	FIELD_GET(PTP_PTP_PIN_INTR_ENA_INTR_PTP_ENA, x)
5909 #define PTP_PTP_INTR_IDENT_INTR_PTP_IDENT_SET(x)\  argument
5910 	FIELD_PREP(PTP_PTP_INTR_IDENT_INTR_PTP_IDENT, x)
5911 #define PTP_PTP_INTR_IDENT_INTR_PTP_IDENT_GET(x)\  argument
5912 	FIELD_GET(PTP_PTP_INTR_IDENT_INTR_PTP_IDENT, x)
5919 #define PTP_PTP_DOM_CFG_PTP_ENA_SET(x)\  argument
5920 	FIELD_PREP(PTP_PTP_DOM_CFG_PTP_ENA, x)
5921 #define PTP_PTP_DOM_CFG_PTP_ENA_GET(x)\  argument
5922 	FIELD_GET(PTP_PTP_DOM_CFG_PTP_ENA, x)
5925 #define PTP_PTP_DOM_CFG_PTP_HOLD_SET(x)\  argument
5926 	FIELD_PREP(PTP_PTP_DOM_CFG_PTP_HOLD, x)
5927 #define PTP_PTP_DOM_CFG_PTP_HOLD_GET(x)\  argument
5928 	FIELD_GET(PTP_PTP_DOM_CFG_PTP_HOLD, x)
5931 #define PTP_PTP_DOM_CFG_PTP_TOD_FREEZE_SET(x)\  argument
5932 	FIELD_PREP(PTP_PTP_DOM_CFG_PTP_TOD_FREEZE, x)
5933 #define PTP_PTP_DOM_CFG_PTP_TOD_FREEZE_GET(x)\  argument
5934 	FIELD_GET(PTP_PTP_DOM_CFG_PTP_TOD_FREEZE, x)
5937 #define PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS_SET(x)\  argument
5938 	FIELD_PREP(PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS, x)
5939 #define PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS_GET(x)\  argument
5940 	FIELD_GET(PTP_PTP_DOM_CFG_PTP_CLKCFG_DIS, x)
5951 #define PTP_PTP_CUR_NSEC_PTP_CUR_NSEC_SET(x)\  argument
5952 	FIELD_PREP(PTP_PTP_CUR_NSEC_PTP_CUR_NSEC, x)
5953 #define PTP_PTP_CUR_NSEC_PTP_CUR_NSEC_GET(x)\  argument
5954 	FIELD_GET(PTP_PTP_CUR_NSEC_PTP_CUR_NSEC, x)
5961 #define PTP_PTP_CUR_NSEC_FRAC_PTP_CUR_NSEC_FRAC_SET(x)\  argument
5962 	FIELD_PREP(PTP_PTP_CUR_NSEC_FRAC_PTP_CUR_NSEC_FRAC, x)
5963 #define PTP_PTP_CUR_NSEC_FRAC_PTP_CUR_NSEC_FRAC_GET(x)\  argument
5964 	FIELD_GET(PTP_PTP_CUR_NSEC_FRAC_PTP_CUR_NSEC_FRAC, x)
5975 #define PTP_PTP_CUR_SEC_MSB_PTP_CUR_SEC_MSB_SET(x)\  argument
5976 	FIELD_PREP(PTP_PTP_CUR_SEC_MSB_PTP_CUR_SEC_MSB, x)
5977 #define PTP_PTP_CUR_SEC_MSB_PTP_CUR_SEC_MSB_GET(x)\  argument
5978 	FIELD_GET(PTP_PTP_CUR_SEC_MSB_PTP_CUR_SEC_MSB, x)
5989 #define PTP_PTP_PIN_CFG_PTP_PIN_ACTION_SET(x)\  argument
5990 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_ACTION, x)
5991 #define PTP_PTP_PIN_CFG_PTP_PIN_ACTION_GET(x)\  argument
5992 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_ACTION, x)
5995 #define PTP_PTP_PIN_CFG_PTP_PIN_SYNC_SET(x)\  argument
5996 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_SYNC, x)
5997 #define PTP_PTP_PIN_CFG_PTP_PIN_SYNC_GET(x)\  argument
5998 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_SYNC, x)
6001 #define PTP_PTP_PIN_CFG_PTP_PIN_INV_POL_SET(x)\  argument
6002 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_INV_POL, x)
6003 #define PTP_PTP_PIN_CFG_PTP_PIN_INV_POL_GET(x)\  argument
6004 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_INV_POL, x)
6007 #define PTP_PTP_PIN_CFG_PTP_PIN_SELECT_SET(x)\  argument
6008 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_SELECT, x)
6009 #define PTP_PTP_PIN_CFG_PTP_PIN_SELECT_GET(x)\  argument
6010 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_SELECT, x)
6013 #define PTP_PTP_PIN_CFG_PTP_CLK_SELECT_SET(x)\  argument
6014 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_CLK_SELECT, x)
6015 #define PTP_PTP_PIN_CFG_PTP_CLK_SELECT_GET(x)\  argument
6016 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_CLK_SELECT, x)
6019 #define PTP_PTP_PIN_CFG_PTP_PIN_DOM_SET(x)\  argument
6020 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_DOM, x)
6021 #define PTP_PTP_PIN_CFG_PTP_PIN_DOM_GET(x)\  argument
6022 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_DOM, x)
6025 #define PTP_PTP_PIN_CFG_PTP_PIN_OPT_SET(x)\  argument
6026 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_OPT, x)
6027 #define PTP_PTP_PIN_CFG_PTP_PIN_OPT_GET(x)\  argument
6028 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_OPT, x)
6031 #define PTP_PTP_PIN_CFG_PTP_PIN_EMBEDDED_CLK_SET(x)\  argument
6032 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_EMBEDDED_CLK, x)
6033 #define PTP_PTP_PIN_CFG_PTP_PIN_EMBEDDED_CLK_GET(x)\  argument
6034 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_EMBEDDED_CLK, x)
6037 #define PTP_PTP_PIN_CFG_PTP_PIN_OUTP_OFS_SET(x)\  argument
6038 	FIELD_PREP(PTP_PTP_PIN_CFG_PTP_PIN_OUTP_OFS, x)
6039 #define PTP_PTP_PIN_CFG_PTP_PIN_OUTP_OFS_GET(x)\  argument
6040 	FIELD_GET(PTP_PTP_PIN_CFG_PTP_PIN_OUTP_OFS, x)
6047 #define PTP_PTP_TOD_SEC_MSB_PTP_TOD_SEC_MSB_SET(x)\  argument
6048 	FIELD_PREP(PTP_PTP_TOD_SEC_MSB_PTP_TOD_SEC_MSB, x)
6049 #define PTP_PTP_TOD_SEC_MSB_PTP_TOD_SEC_MSB_GET(x)\  argument
6050 	FIELD_GET(PTP_PTP_TOD_SEC_MSB_PTP_TOD_SEC_MSB, x)
6061 #define PTP_PTP_TOD_NSEC_PTP_TOD_NSEC_SET(x)\  argument
6062 	FIELD_PREP(PTP_PTP_TOD_NSEC_PTP_TOD_NSEC, x)
6063 #define PTP_PTP_TOD_NSEC_PTP_TOD_NSEC_GET(x)\  argument
6064 	FIELD_GET(PTP_PTP_TOD_NSEC_PTP_TOD_NSEC, x)
6071 #define PTP_PTP_TOD_NSEC_FRAC_PTP_TOD_NSEC_FRAC_SET(x)\  argument
6072 	FIELD_PREP(PTP_PTP_TOD_NSEC_FRAC_PTP_TOD_NSEC_FRAC, x)
6073 #define PTP_PTP_TOD_NSEC_FRAC_PTP_TOD_NSEC_FRAC_GET(x)\  argument
6074 	FIELD_GET(PTP_PTP_TOD_NSEC_FRAC_PTP_TOD_NSEC_FRAC, x)
6085 #define PTP_PIN_WF_HIGH_PERIOD_PIN_WFH_SET(x)\  argument
6086 	FIELD_PREP(PTP_PIN_WF_HIGH_PERIOD_PIN_WFH, x)
6087 #define PTP_PIN_WF_HIGH_PERIOD_PIN_WFH_GET(x)\  argument
6088 	FIELD_GET(PTP_PIN_WF_HIGH_PERIOD_PIN_WFH, x)
6095 #define PTP_PIN_WF_LOW_PERIOD_PIN_WFL_SET(x)\  argument
6096 	FIELD_PREP(PTP_PIN_WF_LOW_PERIOD_PIN_WFL, x)
6097 #define PTP_PIN_WF_LOW_PERIOD_PIN_WFL_GET(x)\  argument
6098 	FIELD_GET(PTP_PIN_WF_LOW_PERIOD_PIN_WFL, x)
6105 #define PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_VAL_SET(x)\  argument
6106 	FIELD_PREP(PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_VAL, x)
6107 #define PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_VAL_GET(x)\  argument
6108 	FIELD_GET(PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_VAL, x)
6111 #define PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_CFG_SET(x)\  argument
6112 	FIELD_PREP(PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_CFG, x)
6113 #define PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_CFG_GET(x)\  argument
6114 	FIELD_GET(PTP_PIN_IOBOUNCH_DELAY_PIN_IOBOUNCH_CFG, x)
6121 #define PTP_PHAD_CTRL_PHAD_ENA_SET(x)\  argument
6122 	FIELD_PREP(PTP_PHAD_CTRL_PHAD_ENA, x)
6123 #define PTP_PHAD_CTRL_PHAD_ENA_GET(x)\  argument
6124 	FIELD_GET(PTP_PHAD_CTRL_PHAD_ENA, x)
6127 #define PTP_PHAD_CTRL_PHAD_FAILED_SET(x)\  argument
6128 	FIELD_PREP(PTP_PHAD_CTRL_PHAD_FAILED, x)
6129 #define PTP_PHAD_CTRL_PHAD_FAILED_GET(x)\  argument
6130 	FIELD_GET(PTP_PHAD_CTRL_PHAD_FAILED, x)
6133 #define PTP_PHAD_CTRL_REDUCED_RES_SET(x)\  argument
6134 	FIELD_PREP(PTP_PHAD_CTRL_REDUCED_RES, x)
6135 #define PTP_PHAD_CTRL_REDUCED_RES_GET(x)\  argument
6136 	FIELD_GET(PTP_PHAD_CTRL_REDUCED_RES, x)
6139 #define PTP_PHAD_CTRL_LOCK_ACC_SET(x)\  argument
6140 	FIELD_PREP(PTP_PHAD_CTRL_LOCK_ACC, x)
6141 #define PTP_PHAD_CTRL_LOCK_ACC_GET(x)\  argument
6142 	FIELD_GET(PTP_PHAD_CTRL_LOCK_ACC, x)
6153 #define QFWD_SWITCH_PORT_MODE_PORT_ENA_SET(x)\  argument
6154 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_PORT_ENA, x)
6155 #define QFWD_SWITCH_PORT_MODE_PORT_ENA_GET(x)\  argument
6156 	FIELD_GET(QFWD_SWITCH_PORT_MODE_PORT_ENA, x)
6159 #define QFWD_SWITCH_PORT_MODE_FWD_URGENCY_SET(x)\  argument
6160 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_FWD_URGENCY, x)
6161 #define QFWD_SWITCH_PORT_MODE_FWD_URGENCY_GET(x)\  argument
6162 	FIELD_GET(QFWD_SWITCH_PORT_MODE_FWD_URGENCY, x)
6165 #define QFWD_SWITCH_PORT_MODE_YEL_RSRVD_SET(x)\  argument
6166 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_YEL_RSRVD, x)
6167 #define QFWD_SWITCH_PORT_MODE_YEL_RSRVD_GET(x)\  argument
6168 	FIELD_GET(QFWD_SWITCH_PORT_MODE_YEL_RSRVD, x)
6171 #define QFWD_SWITCH_PORT_MODE_INGRESS_DROP_MODE_SET(x)\  argument
6172 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_INGRESS_DROP_MODE, x)
6173 #define QFWD_SWITCH_PORT_MODE_INGRESS_DROP_MODE_GET(x)\  argument
6174 	FIELD_GET(QFWD_SWITCH_PORT_MODE_INGRESS_DROP_MODE, x)
6177 #define QFWD_SWITCH_PORT_MODE_IGR_NO_SHARING_SET(x)\  argument
6178 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_IGR_NO_SHARING, x)
6179 #define QFWD_SWITCH_PORT_MODE_IGR_NO_SHARING_GET(x)\  argument
6180 	FIELD_GET(QFWD_SWITCH_PORT_MODE_IGR_NO_SHARING, x)
6183 #define QFWD_SWITCH_PORT_MODE_EGR_NO_SHARING_SET(x)\  argument
6184 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_EGR_NO_SHARING, x)
6185 #define QFWD_SWITCH_PORT_MODE_EGR_NO_SHARING_GET(x)\  argument
6186 	FIELD_GET(QFWD_SWITCH_PORT_MODE_EGR_NO_SHARING, x)
6189 #define QFWD_SWITCH_PORT_MODE_EGRESS_DROP_MODE_SET(x)\  argument
6190 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_EGRESS_DROP_MODE, x)
6191 #define QFWD_SWITCH_PORT_MODE_EGRESS_DROP_MODE_GET(x)\  argument
6192 	FIELD_GET(QFWD_SWITCH_PORT_MODE_EGRESS_DROP_MODE, x)
6195 #define QFWD_SWITCH_PORT_MODE_EGRESS_RSRV_DIS_SET(x)\  argument
6196 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_EGRESS_RSRV_DIS, x)
6197 #define QFWD_SWITCH_PORT_MODE_EGRESS_RSRV_DIS_GET(x)\  argument
6198 	FIELD_GET(QFWD_SWITCH_PORT_MODE_EGRESS_RSRV_DIS, x)
6201 #define QFWD_SWITCH_PORT_MODE_LEARNALL_MORE_SET(x)\  argument
6202 	FIELD_PREP(QFWD_SWITCH_PORT_MODE_LEARNALL_MORE, x)
6203 #define QFWD_SWITCH_PORT_MODE_LEARNALL_MORE_GET(x)\  argument
6204 	FIELD_GET(QFWD_SWITCH_PORT_MODE_LEARNALL_MORE, x)
6211 #define QRES_RES_CFG_WM_HIGH_SET(x)\  argument
6212 	FIELD_PREP(QRES_RES_CFG_WM_HIGH, x)
6213 #define QRES_RES_CFG_WM_HIGH_GET(x)\  argument
6214 	FIELD_GET(QRES_RES_CFG_WM_HIGH, x)
6221 #define QRES_RES_STAT_MAXUSE_SET(x)\  argument
6222 	FIELD_PREP(QRES_RES_STAT_MAXUSE, x)
6223 #define QRES_RES_STAT_MAXUSE_GET(x)\  argument
6224 	FIELD_GET(QRES_RES_STAT_MAXUSE, x)
6231 #define QRES_RES_STAT_CUR_INUSE_SET(x)\  argument
6232 	FIELD_PREP(QRES_RES_STAT_CUR_INUSE, x)
6233 #define QRES_RES_STAT_CUR_INUSE_GET(x)\  argument
6234 	FIELD_GET(QRES_RES_STAT_CUR_INUSE, x)
6241 #define QS_XTR_GRP_CFG_MODE_SET(x)\  argument
6242 	FIELD_PREP(QS_XTR_GRP_CFG_MODE, x)
6243 #define QS_XTR_GRP_CFG_MODE_GET(x)\  argument
6244 	FIELD_GET(QS_XTR_GRP_CFG_MODE, x)
6247 #define QS_XTR_GRP_CFG_STATUS_WORD_POS_SET(x)\  argument
6248 	FIELD_PREP(QS_XTR_GRP_CFG_STATUS_WORD_POS, x)
6249 #define QS_XTR_GRP_CFG_STATUS_WORD_POS_GET(x)\  argument
6250 	FIELD_GET(QS_XTR_GRP_CFG_STATUS_WORD_POS, x)
6253 #define QS_XTR_GRP_CFG_BYTE_SWAP_SET(x)\  argument
6254 	FIELD_PREP(QS_XTR_GRP_CFG_BYTE_SWAP, x)
6255 #define QS_XTR_GRP_CFG_BYTE_SWAP_GET(x)\  argument
6256 	FIELD_GET(QS_XTR_GRP_CFG_BYTE_SWAP, x)
6267 #define QS_XTR_FLUSH_FLUSH_SET(x)\  argument
6268 	FIELD_PREP(QS_XTR_FLUSH_FLUSH, x)
6269 #define QS_XTR_FLUSH_FLUSH_GET(x)\  argument
6270 	FIELD_GET(QS_XTR_FLUSH_FLUSH, x)
6277 #define QS_XTR_DATA_PRESENT_DATA_PRESENT_SET(x)\  argument
6278 	FIELD_PREP(QS_XTR_DATA_PRESENT_DATA_PRESENT, x)
6279 #define QS_XTR_DATA_PRESENT_DATA_PRESENT_GET(x)\  argument
6280 	FIELD_GET(QS_XTR_DATA_PRESENT_DATA_PRESENT, x)
6287 #define QS_INJ_GRP_CFG_MODE_SET(x)\  argument
6288 	FIELD_PREP(QS_INJ_GRP_CFG_MODE, x)
6289 #define QS_INJ_GRP_CFG_MODE_GET(x)\  argument
6290 	FIELD_GET(QS_INJ_GRP_CFG_MODE, x)
6293 #define QS_INJ_GRP_CFG_BYTE_SWAP_SET(x)\  argument
6294 	FIELD_PREP(QS_INJ_GRP_CFG_BYTE_SWAP, x)
6295 #define QS_INJ_GRP_CFG_BYTE_SWAP_GET(x)\  argument
6296 	FIELD_GET(QS_INJ_GRP_CFG_BYTE_SWAP, x)
6307 #define QS_INJ_CTRL_GAP_SIZE_SET(x)\  argument
6308 	FIELD_PREP(QS_INJ_CTRL_GAP_SIZE, x)
6309 #define QS_INJ_CTRL_GAP_SIZE_GET(x)\  argument
6310 	FIELD_GET(QS_INJ_CTRL_GAP_SIZE, x)
6313 #define QS_INJ_CTRL_ABORT_SET(x)\  argument
6314 	FIELD_PREP(QS_INJ_CTRL_ABORT, x)
6315 #define QS_INJ_CTRL_ABORT_GET(x)\  argument
6316 	FIELD_GET(QS_INJ_CTRL_ABORT, x)
6319 #define QS_INJ_CTRL_EOF_SET(x)\  argument
6320 	FIELD_PREP(QS_INJ_CTRL_EOF, x)
6321 #define QS_INJ_CTRL_EOF_GET(x)\  argument
6322 	FIELD_GET(QS_INJ_CTRL_EOF, x)
6325 #define QS_INJ_CTRL_SOF_SET(x)\  argument
6326 	FIELD_PREP(QS_INJ_CTRL_SOF, x)
6327 #define QS_INJ_CTRL_SOF_GET(x)\  argument
6328 	FIELD_GET(QS_INJ_CTRL_SOF, x)
6331 #define QS_INJ_CTRL_VLD_BYTES_SET(x)\  argument
6332 	FIELD_PREP(QS_INJ_CTRL_VLD_BYTES, x)
6333 #define QS_INJ_CTRL_VLD_BYTES_GET(x)\  argument
6334 	FIELD_GET(QS_INJ_CTRL_VLD_BYTES, x)
6341 #define QS_INJ_STATUS_WMARK_REACHED_SET(x)\  argument
6342 	FIELD_PREP(QS_INJ_STATUS_WMARK_REACHED, x)
6343 #define QS_INJ_STATUS_WMARK_REACHED_GET(x)\  argument
6344 	FIELD_GET(QS_INJ_STATUS_WMARK_REACHED, x)
6347 #define QS_INJ_STATUS_FIFO_RDY_SET(x)\  argument
6348 	FIELD_PREP(QS_INJ_STATUS_FIFO_RDY, x)
6349 #define QS_INJ_STATUS_FIFO_RDY_GET(x)\  argument
6350 	FIELD_GET(QS_INJ_STATUS_FIFO_RDY, x)
6353 #define QS_INJ_STATUS_INJ_IN_PROGRESS_SET(x)\  argument
6354 	FIELD_PREP(QS_INJ_STATUS_INJ_IN_PROGRESS, x)
6355 #define QS_INJ_STATUS_INJ_IN_PROGRESS_GET(x)\  argument
6356 	FIELD_GET(QS_INJ_STATUS_INJ_IN_PROGRESS, x)
6363 #define QSYS_PAUSE_CFG_PAUSE_START_SET(x)\  argument
6364 	FIELD_PREP(QSYS_PAUSE_CFG_PAUSE_START, x)
6365 #define QSYS_PAUSE_CFG_PAUSE_START_GET(x)\  argument
6366 	FIELD_GET(QSYS_PAUSE_CFG_PAUSE_START, x)
6369 #define QSYS_PAUSE_CFG_PAUSE_STOP_SET(x)\  argument
6370 	FIELD_PREP(QSYS_PAUSE_CFG_PAUSE_STOP, x)
6371 #define QSYS_PAUSE_CFG_PAUSE_STOP_GET(x)\  argument
6372 	FIELD_GET(QSYS_PAUSE_CFG_PAUSE_STOP, x)
6375 #define QSYS_PAUSE_CFG_PAUSE_ENA_SET(x)\  argument
6376 	FIELD_PREP(QSYS_PAUSE_CFG_PAUSE_ENA, x)
6377 #define QSYS_PAUSE_CFG_PAUSE_ENA_GET(x)\  argument
6378 	FIELD_GET(QSYS_PAUSE_CFG_PAUSE_ENA, x)
6381 #define QSYS_PAUSE_CFG_AGGRESSIVE_TAILDROP_ENA_SET(x)\  argument
6382 	FIELD_PREP(QSYS_PAUSE_CFG_AGGRESSIVE_TAILDROP_ENA, x)
6383 #define QSYS_PAUSE_CFG_AGGRESSIVE_TAILDROP_ENA_GET(x)\  argument
6384 	FIELD_GET(QSYS_PAUSE_CFG_AGGRESSIVE_TAILDROP_ENA, x)
6391 #define QSYS_ATOP_ATOP_SET(x)\  argument
6392 	FIELD_PREP(QSYS_ATOP_ATOP, x)
6393 #define QSYS_ATOP_ATOP_GET(x)\  argument
6394 	FIELD_GET(QSYS_ATOP_ATOP, x)
6401 #define QSYS_FWD_PRESSURE_FWD_PRESSURE_SET(x)\  argument
6402 	FIELD_PREP(QSYS_FWD_PRESSURE_FWD_PRESSURE, x)
6403 #define QSYS_FWD_PRESSURE_FWD_PRESSURE_GET(x)\  argument
6404 	FIELD_GET(QSYS_FWD_PRESSURE_FWD_PRESSURE, x)
6407 #define QSYS_FWD_PRESSURE_FWD_PRESSURE_DIS_SET(x)\  argument
6408 	FIELD_PREP(QSYS_FWD_PRESSURE_FWD_PRESSURE_DIS, x)
6409 #define QSYS_FWD_PRESSURE_FWD_PRESSURE_DIS_GET(x)\  argument
6410 	FIELD_GET(QSYS_FWD_PRESSURE_FWD_PRESSURE_DIS, x)
6417 #define QSYS_ATOP_TOT_CFG_ATOP_TOT_SET(x)\  argument
6418 	FIELD_PREP(QSYS_ATOP_TOT_CFG_ATOP_TOT, x)
6419 #define QSYS_ATOP_TOT_CFG_ATOP_TOT_GET(x)\  argument
6420 	FIELD_GET(QSYS_ATOP_TOT_CFG_ATOP_TOT, x)
6427 #define QSYS_CAL_AUTO_CAL_AUTO_SET(x)\  argument
6428 	FIELD_PREP(QSYS_CAL_AUTO_CAL_AUTO, x)
6429 #define QSYS_CAL_AUTO_CAL_AUTO_GET(x)\  argument
6430 	FIELD_GET(QSYS_CAL_AUTO_CAL_AUTO, x)
6437 #define QSYS_CAL_CTRL_CAL_MODE_SET(x)\  argument
6438 	FIELD_PREP(QSYS_CAL_CTRL_CAL_MODE, x)
6439 #define QSYS_CAL_CTRL_CAL_MODE_GET(x)\  argument
6440 	FIELD_GET(QSYS_CAL_CTRL_CAL_MODE, x)
6443 #define QSYS_CAL_CTRL_CAL_AUTO_GRANT_RATE_SET(x)\  argument
6444 	FIELD_PREP(QSYS_CAL_CTRL_CAL_AUTO_GRANT_RATE, x)
6445 #define QSYS_CAL_CTRL_CAL_AUTO_GRANT_RATE_GET(x)\  argument
6446 	FIELD_GET(QSYS_CAL_CTRL_CAL_AUTO_GRANT_RATE, x)
6449 #define QSYS_CAL_CTRL_CAL_AUTO_ERROR_SET(x)\  argument
6450 	FIELD_PREP(QSYS_CAL_CTRL_CAL_AUTO_ERROR, x)
6451 #define QSYS_CAL_CTRL_CAL_AUTO_ERROR_GET(x)\  argument
6452 	FIELD_GET(QSYS_CAL_CTRL_CAL_AUTO_ERROR, x)
6459 #define QSYS_RAM_INIT_RAM_INIT_SET(x)\  argument
6460 	FIELD_PREP(QSYS_RAM_INIT_RAM_INIT, x)
6461 #define QSYS_RAM_INIT_RAM_INIT_GET(x)\  argument
6462 	FIELD_GET(QSYS_RAM_INIT_RAM_INIT, x)
6465 #define QSYS_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
6466 	FIELD_PREP(QSYS_RAM_INIT_RAM_CFG_HOOK, x)
6467 #define QSYS_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
6468 	FIELD_GET(QSYS_RAM_INIT_RAM_CFG_HOOK, x)
6475 #define REW_OWN_UPSID_OWN_UPSID_SET(x)\  argument
6476 	FIELD_PREP(REW_OWN_UPSID_OWN_UPSID, x)
6477 #define REW_OWN_UPSID_OWN_UPSID_GET(x)\  argument
6478 	FIELD_GET(REW_OWN_UPSID_OWN_UPSID, x)
6485 #define REW_RTAG_ETAG_CTRL_IPE_TBL_SET(x)\  argument
6486 	FIELD_PREP(REW_RTAG_ETAG_CTRL_IPE_TBL, x)
6487 #define REW_RTAG_ETAG_CTRL_IPE_TBL_GET(x)\  argument
6488 	FIELD_GET(REW_RTAG_ETAG_CTRL_IPE_TBL, x)
6491 #define REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA_SET(x)\  argument
6492 	FIELD_PREP(REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA, x)
6493 #define REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA_GET(x)\  argument
6494 	FIELD_GET(REW_RTAG_ETAG_CTRL_ES0_ISDX_KEY_ENA, x)
6497 #define REW_RTAG_ETAG_CTRL_KEEP_ETAG_SET(x)\  argument
6498 	FIELD_PREP(REW_RTAG_ETAG_CTRL_KEEP_ETAG, x)
6499 #define REW_RTAG_ETAG_CTRL_KEEP_ETAG_GET(x)\  argument
6500 	FIELD_GET(REW_RTAG_ETAG_CTRL_KEEP_ETAG, x)
6507 #define REW_ES0_CTRL_ES0_BY_RT_FWD_SET(x)\  argument
6508 	FIELD_PREP(REW_ES0_CTRL_ES0_BY_RT_FWD, x)
6509 #define REW_ES0_CTRL_ES0_BY_RT_FWD_GET(x)\  argument
6510 	FIELD_GET(REW_ES0_CTRL_ES0_BY_RT_FWD, x)
6513 #define REW_ES0_CTRL_ES0_BY_RLEG_SET(x)\  argument
6514 	FIELD_PREP(REW_ES0_CTRL_ES0_BY_RLEG, x)
6515 #define REW_ES0_CTRL_ES0_BY_RLEG_GET(x)\  argument
6516 	FIELD_GET(REW_ES0_CTRL_ES0_BY_RLEG, x)
6519 #define REW_ES0_CTRL_ES0_DPORT_ENA_SET(x)\  argument
6520 	FIELD_PREP(REW_ES0_CTRL_ES0_DPORT_ENA, x)
6521 #define REW_ES0_CTRL_ES0_DPORT_ENA_GET(x)\  argument
6522 	FIELD_GET(REW_ES0_CTRL_ES0_DPORT_ENA, x)
6525 #define REW_ES0_CTRL_ES0_FRM_LBK_CFG_SET(x)\  argument
6526 	FIELD_PREP(REW_ES0_CTRL_ES0_FRM_LBK_CFG, x)
6527 #define REW_ES0_CTRL_ES0_FRM_LBK_CFG_GET(x)\  argument
6528 	FIELD_GET(REW_ES0_CTRL_ES0_FRM_LBK_CFG, x)
6531 #define REW_ES0_CTRL_ES0_VD2_ENCAP_ID_ENA_SET(x)\  argument
6532 	FIELD_PREP(REW_ES0_CTRL_ES0_VD2_ENCAP_ID_ENA, x)
6533 #define REW_ES0_CTRL_ES0_VD2_ENCAP_ID_ENA_GET(x)\  argument
6534 	FIELD_GET(REW_ES0_CTRL_ES0_VD2_ENCAP_ID_ENA, x)
6537 #define REW_ES0_CTRL_ES0_LU_ENA_SET(x)\  argument
6538 	FIELD_PREP(REW_ES0_CTRL_ES0_LU_ENA, x)
6539 #define REW_ES0_CTRL_ES0_LU_ENA_GET(x)\  argument
6540 	FIELD_GET(REW_ES0_CTRL_ES0_LU_ENA, x)
6547 #define REW_PORT_VLAN_CFG_PORT_PCP_SET(x)\  argument
6548 	FIELD_PREP(REW_PORT_VLAN_CFG_PORT_PCP, x)
6549 #define REW_PORT_VLAN_CFG_PORT_PCP_GET(x)\  argument
6550 	FIELD_GET(REW_PORT_VLAN_CFG_PORT_PCP, x)
6553 #define REW_PORT_VLAN_CFG_PORT_DEI_SET(x)\  argument
6554 	FIELD_PREP(REW_PORT_VLAN_CFG_PORT_DEI, x)
6555 #define REW_PORT_VLAN_CFG_PORT_DEI_GET(x)\  argument
6556 	FIELD_GET(REW_PORT_VLAN_CFG_PORT_DEI, x)
6559 #define REW_PORT_VLAN_CFG_PORT_VID_SET(x)\  argument
6560 	FIELD_PREP(REW_PORT_VLAN_CFG_PORT_VID, x)
6561 #define REW_PORT_VLAN_CFG_PORT_VID_GET(x)\  argument
6562 	FIELD_GET(REW_PORT_VLAN_CFG_PORT_VID, x)
6569 #define REW_PCP_MAP_DE0_PCP_DE0_SET(x)\  argument
6570 	FIELD_PREP(REW_PCP_MAP_DE0_PCP_DE0, x)
6571 #define REW_PCP_MAP_DE0_PCP_DE0_GET(x)\  argument
6572 	FIELD_GET(REW_PCP_MAP_DE0_PCP_DE0, x)
6579 #define REW_PCP_MAP_DE1_PCP_DE1_SET(x)\  argument
6580 	FIELD_PREP(REW_PCP_MAP_DE1_PCP_DE1, x)
6581 #define REW_PCP_MAP_DE1_PCP_DE1_GET(x)\  argument
6582 	FIELD_GET(REW_PCP_MAP_DE1_PCP_DE1, x)
6589 #define REW_DEI_MAP_DE0_DEI_DE0_SET(x)\  argument
6590 	FIELD_PREP(REW_DEI_MAP_DE0_DEI_DE0, x)
6591 #define REW_DEI_MAP_DE0_DEI_DE0_GET(x)\  argument
6592 	FIELD_GET(REW_DEI_MAP_DE0_DEI_DE0, x)
6599 #define REW_DEI_MAP_DE1_DEI_DE1_SET(x)\  argument
6600 	FIELD_PREP(REW_DEI_MAP_DE1_DEI_DE1, x)
6601 #define REW_DEI_MAP_DE1_DEI_DE1_GET(x)\  argument
6602 	FIELD_GET(REW_DEI_MAP_DE1_DEI_DE1, x)
6609 #define REW_TAG_CTRL_TAG_CFG_OBEY_WAS_TAGGED_SET(x)\  argument
6610 	FIELD_PREP(REW_TAG_CTRL_TAG_CFG_OBEY_WAS_TAGGED, x)
6611 #define REW_TAG_CTRL_TAG_CFG_OBEY_WAS_TAGGED_GET(x)\  argument
6612 	FIELD_GET(REW_TAG_CTRL_TAG_CFG_OBEY_WAS_TAGGED, x)
6615 #define REW_TAG_CTRL_TAG_CFG_SET(x)\  argument
6616 	FIELD_PREP(REW_TAG_CTRL_TAG_CFG, x)
6617 #define REW_TAG_CTRL_TAG_CFG_GET(x)\  argument
6618 	FIELD_GET(REW_TAG_CTRL_TAG_CFG, x)
6621 #define REW_TAG_CTRL_TAG_TPID_CFG_SET(x)\  argument
6622 	FIELD_PREP(REW_TAG_CTRL_TAG_TPID_CFG, x)
6623 #define REW_TAG_CTRL_TAG_TPID_CFG_GET(x)\  argument
6624 	FIELD_GET(REW_TAG_CTRL_TAG_TPID_CFG, x)
6627 #define REW_TAG_CTRL_TAG_VID_CFG_SET(x)\  argument
6628 	FIELD_PREP(REW_TAG_CTRL_TAG_VID_CFG, x)
6629 #define REW_TAG_CTRL_TAG_VID_CFG_GET(x)\  argument
6630 	FIELD_GET(REW_TAG_CTRL_TAG_VID_CFG, x)
6633 #define REW_TAG_CTRL_TAG_PCP_CFG_SET(x)\  argument
6634 	FIELD_PREP(REW_TAG_CTRL_TAG_PCP_CFG, x)
6635 #define REW_TAG_CTRL_TAG_PCP_CFG_GET(x)\  argument
6636 	FIELD_GET(REW_TAG_CTRL_TAG_PCP_CFG, x)
6639 #define REW_TAG_CTRL_TAG_DEI_CFG_SET(x)\  argument
6640 	FIELD_PREP(REW_TAG_CTRL_TAG_DEI_CFG, x)
6641 #define REW_TAG_CTRL_TAG_DEI_CFG_GET(x)\  argument
6642 	FIELD_GET(REW_TAG_CTRL_TAG_DEI_CFG, x)
6649 #define REW_DSCP_MAP_DSCP_UPDATE_ENA_SET(x)\  argument
6650 	FIELD_PREP(REW_DSCP_MAP_DSCP_UPDATE_ENA, x)
6651 #define REW_DSCP_MAP_DSCP_UPDATE_ENA_GET(x)\  argument
6652 	FIELD_GET(REW_DSCP_MAP_DSCP_UPDATE_ENA, x)
6655 #define REW_DSCP_MAP_DSCP_REMAP_ENA_SET(x)\  argument
6656 	FIELD_PREP(REW_DSCP_MAP_DSCP_REMAP_ENA, x)
6657 #define REW_DSCP_MAP_DSCP_REMAP_ENA_GET(x)\  argument
6658 	FIELD_GET(REW_DSCP_MAP_DSCP_REMAP_ENA, x)
6665 #define REW_PTP_TWOSTEP_CTRL_PTP_OVWR_ENA_SET(x)\  argument
6666 	FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_OVWR_ENA, x)
6667 #define REW_PTP_TWOSTEP_CTRL_PTP_OVWR_ENA_GET(x)\  argument
6668 	FIELD_GET(REW_PTP_TWOSTEP_CTRL_PTP_OVWR_ENA, x)
6671 #define REW_PTP_TWOSTEP_CTRL_PTP_NXT_SET(x)\  argument
6672 	FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_NXT, x)
6673 #define REW_PTP_TWOSTEP_CTRL_PTP_NXT_GET(x)\  argument
6674 	FIELD_GET(REW_PTP_TWOSTEP_CTRL_PTP_NXT, x)
6677 #define REW_PTP_TWOSTEP_CTRL_PTP_VLD_SET(x)\  argument
6678 	FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_VLD, x)
6679 #define REW_PTP_TWOSTEP_CTRL_PTP_VLD_GET(x)\  argument
6680 	FIELD_GET(REW_PTP_TWOSTEP_CTRL_PTP_VLD, x)
6683 #define REW_PTP_TWOSTEP_CTRL_STAMP_TX_SET(x)\  argument
6684 	FIELD_PREP(REW_PTP_TWOSTEP_CTRL_STAMP_TX, x)
6685 #define REW_PTP_TWOSTEP_CTRL_STAMP_TX_GET(x)\  argument
6686 	FIELD_GET(REW_PTP_TWOSTEP_CTRL_STAMP_TX, x)
6689 #define REW_PTP_TWOSTEP_CTRL_STAMP_PORT_SET(x)\  argument
6690 	FIELD_PREP(REW_PTP_TWOSTEP_CTRL_STAMP_PORT, x)
6691 #define REW_PTP_TWOSTEP_CTRL_STAMP_PORT_GET(x)\  argument
6692 	FIELD_GET(REW_PTP_TWOSTEP_CTRL_STAMP_PORT, x)
6695 #define REW_PTP_TWOSTEP_CTRL_PTP_OVFL_SET(x)\  argument
6696 	FIELD_PREP(REW_PTP_TWOSTEP_CTRL_PTP_OVFL, x)
6697 #define REW_PTP_TWOSTEP_CTRL_PTP_OVFL_GET(x)\  argument
6698 	FIELD_GET(REW_PTP_TWOSTEP_CTRL_PTP_OVFL, x)
6705 #define REW_PTP_TWOSTEP_STAMP_STAMP_NSEC_SET(x)\  argument
6706 	FIELD_PREP(REW_PTP_TWOSTEP_STAMP_STAMP_NSEC, x)
6707 #define REW_PTP_TWOSTEP_STAMP_STAMP_NSEC_GET(x)\  argument
6708 	FIELD_GET(REW_PTP_TWOSTEP_STAMP_STAMP_NSEC, x)
6715 #define REW_PTP_TWOSTEP_STAMP_SUBNS_STAMP_SUB_NSEC_SET(x)\  argument
6716 	FIELD_PREP(REW_PTP_TWOSTEP_STAMP_SUBNS_STAMP_SUB_NSEC, x)
6717 #define REW_PTP_TWOSTEP_STAMP_SUBNS_STAMP_SUB_NSEC_GET(x)\  argument
6718 	FIELD_GET(REW_PTP_TWOSTEP_STAMP_SUBNS_STAMP_SUB_NSEC, x)
6733 #define REW_PTP_RSRV_NOT_ZERO2_PTP_RSRV_NOT_ZERO2_SET(x)\  argument
6734 	FIELD_PREP(REW_PTP_RSRV_NOT_ZERO2_PTP_RSRV_NOT_ZERO2, x)
6735 #define REW_PTP_RSRV_NOT_ZERO2_PTP_RSRV_NOT_ZERO2_GET(x)\  argument
6736 	FIELD_GET(REW_PTP_RSRV_NOT_ZERO2_PTP_RSRV_NOT_ZERO2, x)
6743 #define REW_PTP_GEN_STAMP_FMT_RT_OFS_SET(x)\  argument
6744 	FIELD_PREP(REW_PTP_GEN_STAMP_FMT_RT_OFS, x)
6745 #define REW_PTP_GEN_STAMP_FMT_RT_OFS_GET(x)\  argument
6746 	FIELD_GET(REW_PTP_GEN_STAMP_FMT_RT_OFS, x)
6749 #define REW_PTP_GEN_STAMP_FMT_RT_FMT_SET(x)\  argument
6750 	FIELD_PREP(REW_PTP_GEN_STAMP_FMT_RT_FMT, x)
6751 #define REW_PTP_GEN_STAMP_FMT_RT_FMT_GET(x)\  argument
6752 	FIELD_GET(REW_PTP_GEN_STAMP_FMT_RT_FMT, x)
6759 #define REW_RAM_INIT_RAM_INIT_SET(x)\  argument
6760 	FIELD_PREP(REW_RAM_INIT_RAM_INIT, x)
6761 #define REW_RAM_INIT_RAM_INIT_GET(x)\  argument
6762 	FIELD_GET(REW_RAM_INIT_RAM_INIT, x)
6765 #define REW_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
6766 	FIELD_PREP(REW_RAM_INIT_RAM_CFG_HOOK, x)
6767 #define REW_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
6768 	FIELD_GET(REW_RAM_INIT_RAM_CFG_HOOK, x)
6775 #define VCAP_ES0_CTRL_UPDATE_CMD_SET(x)\  argument
6776 	FIELD_PREP(VCAP_ES0_CTRL_UPDATE_CMD, x)
6777 #define VCAP_ES0_CTRL_UPDATE_CMD_GET(x)\  argument
6778 	FIELD_GET(VCAP_ES0_CTRL_UPDATE_CMD, x)
6781 #define VCAP_ES0_CTRL_UPDATE_ENTRY_DIS_SET(x)\  argument
6782 	FIELD_PREP(VCAP_ES0_CTRL_UPDATE_ENTRY_DIS, x)
6783 #define VCAP_ES0_CTRL_UPDATE_ENTRY_DIS_GET(x)\  argument
6784 	FIELD_GET(VCAP_ES0_CTRL_UPDATE_ENTRY_DIS, x)
6787 #define VCAP_ES0_CTRL_UPDATE_ACTION_DIS_SET(x)\  argument
6788 	FIELD_PREP(VCAP_ES0_CTRL_UPDATE_ACTION_DIS, x)
6789 #define VCAP_ES0_CTRL_UPDATE_ACTION_DIS_GET(x)\  argument
6790 	FIELD_GET(VCAP_ES0_CTRL_UPDATE_ACTION_DIS, x)
6793 #define VCAP_ES0_CTRL_UPDATE_CNT_DIS_SET(x)\  argument
6794 	FIELD_PREP(VCAP_ES0_CTRL_UPDATE_CNT_DIS, x)
6795 #define VCAP_ES0_CTRL_UPDATE_CNT_DIS_GET(x)\  argument
6796 	FIELD_GET(VCAP_ES0_CTRL_UPDATE_CNT_DIS, x)
6799 #define VCAP_ES0_CTRL_UPDATE_ADDR_SET(x)\  argument
6800 	FIELD_PREP(VCAP_ES0_CTRL_UPDATE_ADDR, x)
6801 #define VCAP_ES0_CTRL_UPDATE_ADDR_GET(x)\  argument
6802 	FIELD_GET(VCAP_ES0_CTRL_UPDATE_ADDR, x)
6805 #define VCAP_ES0_CTRL_UPDATE_SHOT_SET(x)\  argument
6806 	FIELD_PREP(VCAP_ES0_CTRL_UPDATE_SHOT, x)
6807 #define VCAP_ES0_CTRL_UPDATE_SHOT_GET(x)\  argument
6808 	FIELD_GET(VCAP_ES0_CTRL_UPDATE_SHOT, x)
6811 #define VCAP_ES0_CTRL_CLEAR_CACHE_SET(x)\  argument
6812 	FIELD_PREP(VCAP_ES0_CTRL_CLEAR_CACHE, x)
6813 #define VCAP_ES0_CTRL_CLEAR_CACHE_GET(x)\  argument
6814 	FIELD_GET(VCAP_ES0_CTRL_CLEAR_CACHE, x)
6817 #define VCAP_ES0_CTRL_MV_TRAFFIC_IGN_SET(x)\  argument
6818 	FIELD_PREP(VCAP_ES0_CTRL_MV_TRAFFIC_IGN, x)
6819 #define VCAP_ES0_CTRL_MV_TRAFFIC_IGN_GET(x)\  argument
6820 	FIELD_GET(VCAP_ES0_CTRL_MV_TRAFFIC_IGN, x)
6827 #define VCAP_ES0_CFG_MV_NUM_POS_SET(x)\  argument
6828 	FIELD_PREP(VCAP_ES0_CFG_MV_NUM_POS, x)
6829 #define VCAP_ES0_CFG_MV_NUM_POS_GET(x)\  argument
6830 	FIELD_GET(VCAP_ES0_CFG_MV_NUM_POS, x)
6833 #define VCAP_ES0_CFG_MV_SIZE_SET(x)\  argument
6834 	FIELD_PREP(VCAP_ES0_CFG_MV_SIZE, x)
6835 #define VCAP_ES0_CFG_MV_SIZE_GET(x)\  argument
6836 	FIELD_GET(VCAP_ES0_CFG_MV_SIZE, x)
6867 #define VCAP_ES0_IDX_CORE_IDX_SET(x)\  argument
6868 	FIELD_PREP(VCAP_ES0_IDX_CORE_IDX, x)
6869 #define VCAP_ES0_IDX_CORE_IDX_GET(x)\  argument
6870 	FIELD_GET(VCAP_ES0_IDX_CORE_IDX, x)
6877 #define VCAP_ES0_MAP_CORE_MAP_SET(x)\  argument
6878 	FIELD_PREP(VCAP_ES0_MAP_CORE_MAP, x)
6879 #define VCAP_ES0_MAP_CORE_MAP_GET(x)\  argument
6880 	FIELD_GET(VCAP_ES0_MAP_CORE_MAP, x)
6887 #define VCAP_ES0_VCAP_STICKY_VCAP_ROW_DELETED_STICKY_SET(x)\  argument
6888 	FIELD_PREP(VCAP_ES0_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)
6889 #define VCAP_ES0_VCAP_STICKY_VCAP_ROW_DELETED_STICKY_GET(x)\  argument
6890 	FIELD_GET(VCAP_ES0_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)
6937 #define VCAP_ES2_CTRL_UPDATE_CMD_SET(x)\  argument
6938 	FIELD_PREP(VCAP_ES2_CTRL_UPDATE_CMD, x)
6939 #define VCAP_ES2_CTRL_UPDATE_CMD_GET(x)\  argument
6940 	FIELD_GET(VCAP_ES2_CTRL_UPDATE_CMD, x)
6943 #define VCAP_ES2_CTRL_UPDATE_ENTRY_DIS_SET(x)\  argument
6944 	FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ENTRY_DIS, x)
6945 #define VCAP_ES2_CTRL_UPDATE_ENTRY_DIS_GET(x)\  argument
6946 	FIELD_GET(VCAP_ES2_CTRL_UPDATE_ENTRY_DIS, x)
6949 #define VCAP_ES2_CTRL_UPDATE_ACTION_DIS_SET(x)\  argument
6950 	FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ACTION_DIS, x)
6951 #define VCAP_ES2_CTRL_UPDATE_ACTION_DIS_GET(x)\  argument
6952 	FIELD_GET(VCAP_ES2_CTRL_UPDATE_ACTION_DIS, x)
6955 #define VCAP_ES2_CTRL_UPDATE_CNT_DIS_SET(x)\  argument
6956 	FIELD_PREP(VCAP_ES2_CTRL_UPDATE_CNT_DIS, x)
6957 #define VCAP_ES2_CTRL_UPDATE_CNT_DIS_GET(x)\  argument
6958 	FIELD_GET(VCAP_ES2_CTRL_UPDATE_CNT_DIS, x)
6961 #define VCAP_ES2_CTRL_UPDATE_ADDR_SET(x)\  argument
6962 	FIELD_PREP(VCAP_ES2_CTRL_UPDATE_ADDR, x)
6963 #define VCAP_ES2_CTRL_UPDATE_ADDR_GET(x)\  argument
6964 	FIELD_GET(VCAP_ES2_CTRL_UPDATE_ADDR, x)
6967 #define VCAP_ES2_CTRL_UPDATE_SHOT_SET(x)\  argument
6968 	FIELD_PREP(VCAP_ES2_CTRL_UPDATE_SHOT, x)
6969 #define VCAP_ES2_CTRL_UPDATE_SHOT_GET(x)\  argument
6970 	FIELD_GET(VCAP_ES2_CTRL_UPDATE_SHOT, x)
6973 #define VCAP_ES2_CTRL_CLEAR_CACHE_SET(x)\  argument
6974 	FIELD_PREP(VCAP_ES2_CTRL_CLEAR_CACHE, x)
6975 #define VCAP_ES2_CTRL_CLEAR_CACHE_GET(x)\  argument
6976 	FIELD_GET(VCAP_ES2_CTRL_CLEAR_CACHE, x)
6979 #define VCAP_ES2_CTRL_MV_TRAFFIC_IGN_SET(x)\  argument
6980 	FIELD_PREP(VCAP_ES2_CTRL_MV_TRAFFIC_IGN, x)
6981 #define VCAP_ES2_CTRL_MV_TRAFFIC_IGN_GET(x)\  argument
6982 	FIELD_GET(VCAP_ES2_CTRL_MV_TRAFFIC_IGN, x)
6989 #define VCAP_ES2_CFG_MV_NUM_POS_SET(x)\  argument
6990 	FIELD_PREP(VCAP_ES2_CFG_MV_NUM_POS, x)
6991 #define VCAP_ES2_CFG_MV_NUM_POS_GET(x)\  argument
6992 	FIELD_GET(VCAP_ES2_CFG_MV_NUM_POS, x)
6995 #define VCAP_ES2_CFG_MV_SIZE_SET(x)\  argument
6996 	FIELD_PREP(VCAP_ES2_CFG_MV_SIZE, x)
6997 #define VCAP_ES2_CFG_MV_SIZE_GET(x)\  argument
6998 	FIELD_GET(VCAP_ES2_CFG_MV_SIZE, x)
7029 #define VCAP_ES2_IDX_CORE_IDX_SET(x)\  argument
7030 	FIELD_PREP(VCAP_ES2_IDX_CORE_IDX, x)
7031 #define VCAP_ES2_IDX_CORE_IDX_GET(x)\  argument
7032 	FIELD_GET(VCAP_ES2_IDX_CORE_IDX, x)
7039 #define VCAP_ES2_MAP_CORE_MAP_SET(x)\  argument
7040 	FIELD_PREP(VCAP_ES2_MAP_CORE_MAP, x)
7041 #define VCAP_ES2_MAP_CORE_MAP_GET(x)\  argument
7042 	FIELD_GET(VCAP_ES2_MAP_CORE_MAP, x)
7049 #define VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY_SET(x)\  argument
7050 	FIELD_PREP(VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)
7051 #define VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY_GET(x)\  argument
7052 	FIELD_GET(VCAP_ES2_VCAP_STICKY_VCAP_ROW_DELETED_STICKY, x)
7099 #define VCAP_SUPER_CTRL_UPDATE_CMD_SET(x)\  argument
7100 	FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_CMD, x)
7101 #define VCAP_SUPER_CTRL_UPDATE_CMD_GET(x)\  argument
7102 	FIELD_GET(VCAP_SUPER_CTRL_UPDATE_CMD, x)
7105 #define VCAP_SUPER_CTRL_UPDATE_ENTRY_DIS_SET(x)\  argument
7106 	FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_ENTRY_DIS, x)
7107 #define VCAP_SUPER_CTRL_UPDATE_ENTRY_DIS_GET(x)\  argument
7108 	FIELD_GET(VCAP_SUPER_CTRL_UPDATE_ENTRY_DIS, x)
7111 #define VCAP_SUPER_CTRL_UPDATE_ACTION_DIS_SET(x)\  argument
7112 	FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_ACTION_DIS, x)
7113 #define VCAP_SUPER_CTRL_UPDATE_ACTION_DIS_GET(x)\  argument
7114 	FIELD_GET(VCAP_SUPER_CTRL_UPDATE_ACTION_DIS, x)
7117 #define VCAP_SUPER_CTRL_UPDATE_CNT_DIS_SET(x)\  argument
7118 	FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_CNT_DIS, x)
7119 #define VCAP_SUPER_CTRL_UPDATE_CNT_DIS_GET(x)\  argument
7120 	FIELD_GET(VCAP_SUPER_CTRL_UPDATE_CNT_DIS, x)
7123 #define VCAP_SUPER_CTRL_UPDATE_ADDR_SET(x)\  argument
7124 	FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_ADDR, x)
7125 #define VCAP_SUPER_CTRL_UPDATE_ADDR_GET(x)\  argument
7126 	FIELD_GET(VCAP_SUPER_CTRL_UPDATE_ADDR, x)
7129 #define VCAP_SUPER_CTRL_UPDATE_SHOT_SET(x)\  argument
7130 	FIELD_PREP(VCAP_SUPER_CTRL_UPDATE_SHOT, x)
7131 #define VCAP_SUPER_CTRL_UPDATE_SHOT_GET(x)\  argument
7132 	FIELD_GET(VCAP_SUPER_CTRL_UPDATE_SHOT, x)
7135 #define VCAP_SUPER_CTRL_CLEAR_CACHE_SET(x)\  argument
7136 	FIELD_PREP(VCAP_SUPER_CTRL_CLEAR_CACHE, x)
7137 #define VCAP_SUPER_CTRL_CLEAR_CACHE_GET(x)\  argument
7138 	FIELD_GET(VCAP_SUPER_CTRL_CLEAR_CACHE, x)
7141 #define VCAP_SUPER_CTRL_MV_TRAFFIC_IGN_SET(x)\  argument
7142 	FIELD_PREP(VCAP_SUPER_CTRL_MV_TRAFFIC_IGN, x)
7143 #define VCAP_SUPER_CTRL_MV_TRAFFIC_IGN_GET(x)\  argument
7144 	FIELD_GET(VCAP_SUPER_CTRL_MV_TRAFFIC_IGN, x)
7151 #define VCAP_SUPER_CFG_MV_NUM_POS_SET(x)\  argument
7152 	FIELD_PREP(VCAP_SUPER_CFG_MV_NUM_POS, x)
7153 #define VCAP_SUPER_CFG_MV_NUM_POS_GET(x)\  argument
7154 	FIELD_GET(VCAP_SUPER_CFG_MV_NUM_POS, x)
7157 #define VCAP_SUPER_CFG_MV_SIZE_SET(x)\  argument
7158 	FIELD_PREP(VCAP_SUPER_CFG_MV_SIZE, x)
7159 #define VCAP_SUPER_CFG_MV_SIZE_GET(x)\  argument
7160 	FIELD_GET(VCAP_SUPER_CFG_MV_SIZE, x)
7191 #define VCAP_SUPER_IDX_CORE_IDX_SET(x)\  argument
7192 	FIELD_PREP(VCAP_SUPER_IDX_CORE_IDX, x)
7193 #define VCAP_SUPER_IDX_CORE_IDX_GET(x)\  argument
7194 	FIELD_GET(VCAP_SUPER_IDX_CORE_IDX, x)
7201 #define VCAP_SUPER_MAP_CORE_MAP_SET(x)\  argument
7202 	FIELD_PREP(VCAP_SUPER_MAP_CORE_MAP, x)
7203 #define VCAP_SUPER_MAP_CORE_MAP_GET(x)\  argument
7204 	FIELD_GET(VCAP_SUPER_MAP_CORE_MAP, x)
7251 #define VCAP_SUPER_RAM_INIT_RAM_INIT_SET(x)\  argument
7252 	FIELD_PREP(VCAP_SUPER_RAM_INIT_RAM_INIT, x)
7253 #define VCAP_SUPER_RAM_INIT_RAM_INIT_GET(x)\  argument
7254 	FIELD_GET(VCAP_SUPER_RAM_INIT_RAM_INIT, x)
7257 #define VCAP_SUPER_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
7258 	FIELD_PREP(VCAP_SUPER_RAM_INIT_RAM_CFG_HOOK, x)
7259 #define VCAP_SUPER_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
7260 	FIELD_GET(VCAP_SUPER_RAM_INIT_RAM_CFG_HOOK, x)
7267 #define VOP_RAM_INIT_RAM_INIT_SET(x)\  argument
7268 	FIELD_PREP(VOP_RAM_INIT_RAM_INIT, x)
7269 #define VOP_RAM_INIT_RAM_INIT_GET(x)\  argument
7270 	FIELD_GET(VOP_RAM_INIT_RAM_INIT, x)
7273 #define VOP_RAM_INIT_RAM_CFG_HOOK_SET(x)\  argument
7274 	FIELD_PREP(VOP_RAM_INIT_RAM_CFG_HOOK, x)
7275 #define VOP_RAM_INIT_RAM_CFG_HOOK_GET(x)\  argument
7276 	FIELD_GET(VOP_RAM_INIT_RAM_CFG_HOOK, x)
7283 #define XQS_STAT_CFG_STAT_CLEAR_SHOT_SET(x)\  argument
7284 	FIELD_PREP(XQS_STAT_CFG_STAT_CLEAR_SHOT, x)
7285 #define XQS_STAT_CFG_STAT_CLEAR_SHOT_GET(x)\  argument
7286 	FIELD_GET(XQS_STAT_CFG_STAT_CLEAR_SHOT, x)
7289 #define XQS_STAT_CFG_STAT_VIEW_SET(x)\  argument
7290 	FIELD_PREP(XQS_STAT_CFG_STAT_VIEW, x)
7291 #define XQS_STAT_CFG_STAT_VIEW_GET(x)\  argument
7292 	FIELD_GET(XQS_STAT_CFG_STAT_VIEW, x)
7295 #define XQS_STAT_CFG_STAT_SRV_PKT_ONLY_SET(x)\  argument
7296 	FIELD_PREP(XQS_STAT_CFG_STAT_SRV_PKT_ONLY, x)
7297 #define XQS_STAT_CFG_STAT_SRV_PKT_ONLY_GET(x)\  argument
7298 	FIELD_GET(XQS_STAT_CFG_STAT_SRV_PKT_ONLY, x)
7301 #define XQS_STAT_CFG_STAT_WRAP_DIS_SET(x)\  argument
7302 	FIELD_PREP(XQS_STAT_CFG_STAT_WRAP_DIS, x)
7303 #define XQS_STAT_CFG_STAT_WRAP_DIS_GET(x)\  argument
7304 	FIELD_GET(XQS_STAT_CFG_STAT_WRAP_DIS, x)
7311 #define XQS_QLIMIT_SHR_TOP_CFG_QLIMIT_SHR_TOP_SET(x)\  argument
7312 	FIELD_PREP(XQS_QLIMIT_SHR_TOP_CFG_QLIMIT_SHR_TOP, x)
7313 #define XQS_QLIMIT_SHR_TOP_CFG_QLIMIT_SHR_TOP_GET(x)\  argument
7314 	FIELD_GET(XQS_QLIMIT_SHR_TOP_CFG_QLIMIT_SHR_TOP, x)
7321 #define XQS_QLIMIT_SHR_ATOP_CFG_QLIMIT_SHR_ATOP_SET(x)\  argument
7322 	FIELD_PREP(XQS_QLIMIT_SHR_ATOP_CFG_QLIMIT_SHR_ATOP, x)
7323 #define XQS_QLIMIT_SHR_ATOP_CFG_QLIMIT_SHR_ATOP_GET(x)\  argument
7324 	FIELD_GET(XQS_QLIMIT_SHR_ATOP_CFG_QLIMIT_SHR_ATOP, x)
7331 #define XQS_QLIMIT_SHR_CTOP_CFG_QLIMIT_SHR_CTOP_SET(x)\  argument
7332 	FIELD_PREP(XQS_QLIMIT_SHR_CTOP_CFG_QLIMIT_SHR_CTOP, x)
7333 #define XQS_QLIMIT_SHR_CTOP_CFG_QLIMIT_SHR_CTOP_GET(x)\  argument
7334 	FIELD_GET(XQS_QLIMIT_SHR_CTOP_CFG_QLIMIT_SHR_CTOP, x)
7341 #define XQS_QLIMIT_SHR_QLIM_CFG_QLIMIT_SHR_QLIM_SET(x)\  argument
7342 	FIELD_PREP(XQS_QLIMIT_SHR_QLIM_CFG_QLIMIT_SHR_QLIM, x)
7343 #define XQS_QLIMIT_SHR_QLIM_CFG_QLIMIT_SHR_QLIM_GET(x)\  argument
7344 	FIELD_GET(XQS_QLIMIT_SHR_QLIM_CFG_QLIMIT_SHR_QLIM, x)