Lines Matching refs:mtk_r32
287 u32 mtk_r32(struct mtk_eth *eth, unsigned reg) in mtk_r32() function
296 val = mtk_r32(eth, reg); in mtk_m32()
308 if (!(mtk_r32(eth, MTK_PHY_IAC) & PHY_IAC_ACCESS)) in mtk_mdio_busy_wait()
398 return mtk_r32(eth, MTK_PHY_IAC) & PHY_IAC_DATA_MASK; in _mtk_mdio_read_c22()
433 return mtk_r32(eth, MTK_PHY_IAC) & PHY_IAC_DATA_MASK; in _mtk_mdio_read_c45()
676 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_finish()
694 u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_link_down()
778 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_mac_link_up()
894 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_disable()
905 val = mtk_r32(eth, eth->soc->reg_map->tx_irq_mask); in mtk_tx_irq_enable()
916 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
927 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
972 hw_stats->tx_packets += mtk_r32(mac->hw, MT7628_SDM_TPCNT); in mtk_stats_update_mac()
973 hw_stats->tx_bytes += mtk_r32(mac->hw, MT7628_SDM_TBCNT); in mtk_stats_update_mac()
974 hw_stats->rx_packets += mtk_r32(mac->hw, MT7628_SDM_RPCNT); in mtk_stats_update_mac()
975 hw_stats->rx_bytes += mtk_r32(mac->hw, MT7628_SDM_RBCNT); in mtk_stats_update_mac()
977 mtk_r32(mac->hw, MT7628_SDM_CS_ERR); in mtk_stats_update_mac()
983 hw_stats->rx_bytes += mtk_r32(mac->hw, reg_map->gdm1_cnt + offs); in mtk_stats_update_mac()
984 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x4 + offs); in mtk_stats_update_mac()
988 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x8 + offs); in mtk_stats_update_mac()
990 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x10 + offs); in mtk_stats_update_mac()
992 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x14 + offs); in mtk_stats_update_mac()
994 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x18 + offs); in mtk_stats_update_mac()
996 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x1c + offs); in mtk_stats_update_mac()
998 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); in mtk_stats_update_mac()
1000 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); in mtk_stats_update_mac()
1004 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x50 + offs); in mtk_stats_update_mac()
1006 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x54 + offs); in mtk_stats_update_mac()
1008 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x40 + offs); in mtk_stats_update_mac()
1009 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x44 + offs); in mtk_stats_update_mac()
1013 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x48 + offs); in mtk_stats_update_mac()
1016 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x28 + offs); in mtk_stats_update_mac()
1018 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x2c + offs); in mtk_stats_update_mac()
1020 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x30 + offs); in mtk_stats_update_mac()
1021 stats = mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x34 + offs); in mtk_stats_update_mac()
1025 mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); in mtk_stats_update_mac()
2267 dma = mtk_r32(eth, reg_map->qdma.drx_ptr); in mtk_poll_tx_qdma()
2316 dma = mtk_r32(eth, MT7628_TX_DTX_IDX0); in mtk_poll_tx_pdma()
2371 u32 status2 = mtk_r32(eth, MTK_INT_STATUS2); in mtk_handle_status_irq()
2394 mtk_r32(eth, reg_map->tx_irq_status), in mtk_napi_tx()
2395 mtk_r32(eth, reg_map->tx_irq_mask)); in mtk_napi_tx()
2401 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_napi_tx()
2429 mtk_r32(eth, reg_map->pdma.irq_status), in mtk_napi_rx()
2430 mtk_r32(eth, reg_map->pdma.irq_mask)); in mtk_napi_rx()
2436 } while (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_napi_rx()
2844 val = mtk_r32(eth, MTK_PDMA_LRO_CTRL_DW0); in mtk_hwlro_rx_uninit()
2864 reg_val = mtk_r32(eth, MTK_LRO_CTRL_DW2_CFG(idx)); in mtk_hwlro_val_ipaddr()
2879 reg_val = mtk_r32(eth, MTK_LRO_CTRL_DW2_CFG(idx)); in mtk_hwlro_inval_ipaddr()
3144 u32 val = mtk_r32(eth, MTK_INT_STATUS2); in mtk_hw_reset_check()
3199 if (mtk_r32(eth, reg_map->pdma.irq_mask) & in mtk_handle_irq()
3201 if (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_handle_irq()
3205 if (mtk_r32(eth, reg_map->tx_irq_mask) & MTK_TX_DONE_INT) { in mtk_handle_irq()
3206 if (mtk_r32(eth, reg_map->tx_irq_status) & MTK_TX_DONE_INT) in mtk_handle_irq()
3240 val = mtk_r32(eth, reg_map->qdma.glo_cfg); in mtk_start_dma()
3279 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); in mtk_gdm_config()
3418 u32 val = mtk_r32(eth, MTK_CDMP_IG_CTRL); in mtk_open()
3436 val = mtk_r32(eth, glo_cfg); in mtk_stop_dma()
3443 val = mtk_r32(eth, glo_cfg); in mtk_stop_dma()
3584 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_rx()
3615 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_tx()
3642 mcr_cur = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); in mtk_set_mcr_max_rx()
3763 wdidx = mtk_r32(eth, reg_map->wdma_base[0] + 0xc); in mtk_hw_check_dma_hang()
3765 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x204); in mtk_hw_check_dma_hang()
3768 val = mtk_r32(eth, reg_map->wdma_base[0] + 0x230); in mtk_hw_check_dma_hang()
3771 oq_free = (!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(24, 16)) && in mtk_hw_check_dma_hang()
3772 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x4) & GENMASK(8, 0)) && in mtk_hw_check_dma_hang()
3773 !(mtk_r32(eth, reg_map->pse_oq_sta + 0x10) & GENMASK(24, 16))); in mtk_hw_check_dma_hang()
3784 qfsm_hang = !!mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x234); in mtk_hw_check_dma_hang()
3785 qfwd_hang = !mtk_r32(eth, reg_map->qdma.qtx_cfg + 0x308); in mtk_hw_check_dma_hang()
3787 gdm1_tx = FIELD_GET(GENMASK(31, 16), mtk_r32(eth, MTK_FE_GDM1_FSM)) > 0; in mtk_hw_check_dma_hang()
3788 gdm2_tx = FIELD_GET(GENMASK(31, 16), mtk_r32(eth, MTK_FE_GDM2_FSM)) > 0; in mtk_hw_check_dma_hang()
3789 gmac1_tx = FIELD_GET(GENMASK(31, 24), mtk_r32(eth, MTK_MAC_FSM(0))) != 1; in mtk_hw_check_dma_hang()
3790 gmac2_tx = FIELD_GET(GENMASK(31, 24), mtk_r32(eth, MTK_MAC_FSM(1))) != 1; in mtk_hw_check_dma_hang()
3791 gdm1_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x24); in mtk_hw_check_dma_hang()
3792 gdm2_fc = mtk_r32(eth, reg_map->gdm1_cnt + 0x64); in mtk_hw_check_dma_hang()
3805 oq_hang = !!(mtk_r32(eth, reg_map->pse_oq_sta) & GENMASK(8, 0)); in mtk_hw_check_dma_hang()
3806 cdm1_busy = !!(mtk_r32(eth, MTK_FE_CDM1_FSM) & GENMASK(31, 16)); in mtk_hw_check_dma_hang()
3807 adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && in mtk_hw_check_dma_hang()
3808 !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); in mtk_hw_check_dma_hang()
3895 val = mtk_r32(eth, MTK_FE_GLO_MISC); in mtk_hw_init()
3928 val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); in mtk_hw_init()
3931 val = mtk_r32(eth, MTK_CDMP_IG_CTRL); in mtk_hw_init()
3968 mtk_r32(eth, reg_map->gdm1_cnt + 0x100 + i); in mtk_hw_init()
4085 val = mtk_r32(eth, MTK_FE_GLO_CFG(i)) | MTK_FE_LINK_DOWN_P(PSE_PPE0_PORT); in mtk_prepare_for_reset()
4102 val = mtk_r32(eth, MTK_MAC_MCR(i)) & ~MAC_MCR_FORCE_LINK; in mtk_prepare_for_reset()
4156 val = mtk_r32(eth, MTK_FE_GLO_CFG(i)) & ~MTK_FE_LINK_DOWN_P(PSE_PPE0_PORT); in mtk_pending_work()