Lines Matching refs:PHY_REG
110 #define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \ macro
112 #define IGP3_KMRN_DIAG PHY_REG(770, 19) /* KMRN Diagnostic */
113 #define IGP3_VR_CTRL PHY_REG(776, 18) /* Voltage Regulator Control */
120 #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
121 #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
122 #define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
123 #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
124 #define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
139 #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */
140 #define HV_MUX_DATA_CTRL PHY_REG(776, 16)
145 #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision */
146 #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
147 #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. */
148 #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
149 #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Collision */
150 #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
151 #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision */
152 #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
153 #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision */
154 #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
155 #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
156 #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
157 #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Tx with no CRS */
158 #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
166 #define CV_SMB_CTRL PHY_REG(769, 23)
170 #define I218_ULP_CONFIG1 PHY_REG(779, 16)
184 #define HV_SMB_ADDR PHY_REG(768, 26)
200 #define HV_OEM_BITS PHY_REG(768, 25)
206 #define HV_KMRN_MODE_CTRL PHY_REG(769, 16)
210 #define HV_KMRN_FIFO_CTRLSTA PHY_REG(770, 16)
215 #define HV_PM_CTRL PHY_REG(770, 17)
219 #define I217_PLL_CLOCK_GATE_REG PHY_REG(772, 28)
225 #define I217_INBAND_CTRL PHY_REG(770, 18)
230 #define I217_LPI_GPIO_CTRL PHY_REG(772, 18)
234 #define I82579_LPI_CTRL PHY_REG(772, 20)
268 #define I217_SxCTRL PHY_REG(BM_PORT_CTRL_PAGE, 28)
270 #define I217_CGFREG PHY_REG(772, 29)
272 #define I217_MEMPWR PHY_REG(772, 26)