Lines Matching refs:padap
478 struct adapter *padap = pdbg_init->adap; in is_fw_attached() local
480 if (!(padap->flags & CXGB4_FW_OK) || padap->use_bd) in is_fw_attached()
515 static int cudbg_read_vpd_reg(struct adapter *padap, u32 addr, u32 len, in cudbg_read_vpd_reg() argument
520 vaddr = t4_eeprom_ptov(addr, padap->pf, EEPROMPFSIZE); in cudbg_read_vpd_reg()
524 rc = pci_read_vpd(padap->pdev, vaddr, len, dest); in cudbg_read_vpd_reg()
537 int cudbg_fill_meminfo(struct adapter *padap, in cudbg_fill_meminfo() argument
558 lo = t4_read_reg(padap, MA_TARGET_MEM_ENABLE_A); in cudbg_fill_meminfo()
560 hi = t4_read_reg(padap, MA_EDRAM0_BAR_A); in cudbg_fill_meminfo()
571 hi = t4_read_reg(padap, MA_EDRAM1_BAR_A); in cudbg_fill_meminfo()
581 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
583 hi = t4_read_reg(padap, MA_EXT_MEMORY0_BAR_A); in cudbg_fill_meminfo()
594 hi = t4_read_reg(padap, MA_EXT_MEMORY1_BAR_A); in cudbg_fill_meminfo()
605 hi = t4_read_reg(padap, MA_EXT_MEMORY_BAR_A); in cudbg_fill_meminfo()
616 hi = t4_read_reg(padap, MA_EXT_MEMORY1_BAR_A); in cudbg_fill_meminfo()
633 (md++)->base = t4_read_reg(padap, SGE_DBQ_CTXT_BADDR_A); in cudbg_fill_meminfo()
634 (md++)->base = t4_read_reg(padap, SGE_IMSG_CTXT_BADDR_A); in cudbg_fill_meminfo()
635 (md++)->base = t4_read_reg(padap, SGE_FLM_CACHE_BADDR_A); in cudbg_fill_meminfo()
636 (md++)->base = t4_read_reg(padap, TP_CMM_TCB_BASE_A); in cudbg_fill_meminfo()
637 (md++)->base = t4_read_reg(padap, TP_CMM_MM_BASE_A); in cudbg_fill_meminfo()
638 (md++)->base = t4_read_reg(padap, TP_CMM_TIMER_BASE_A); in cudbg_fill_meminfo()
639 (md++)->base = t4_read_reg(padap, TP_CMM_MM_RX_FLST_BASE_A); in cudbg_fill_meminfo()
640 (md++)->base = t4_read_reg(padap, TP_CMM_MM_TX_FLST_BASE_A); in cudbg_fill_meminfo()
641 (md++)->base = t4_read_reg(padap, TP_CMM_MM_PS_FLST_BASE_A); in cudbg_fill_meminfo()
644 md->base = t4_read_reg(padap, TP_PMM_TX_BASE_A); in cudbg_fill_meminfo()
646 t4_read_reg(padap, TP_PMM_TX_PAGE_SIZE_A) * in cudbg_fill_meminfo()
647 PMTXMAXPAGE_G(t4_read_reg(padap, TP_PMM_TX_MAX_PAGE_A)); in cudbg_fill_meminfo()
650 md->base = t4_read_reg(padap, TP_PMM_RX_BASE_A); in cudbg_fill_meminfo()
652 t4_read_reg(padap, TP_PMM_RX_PAGE_SIZE_A) * in cudbg_fill_meminfo()
653 PMRXMAXPAGE_G(t4_read_reg(padap, TP_PMM_RX_MAX_PAGE_A)); in cudbg_fill_meminfo()
656 if (t4_read_reg(padap, LE_DB_CONFIG_A) & HASHEN_F) { in cudbg_fill_meminfo()
657 if (CHELSIO_CHIP_VERSION(padap->params.chip) <= CHELSIO_T5) { in cudbg_fill_meminfo()
658 hi = t4_read_reg(padap, LE_DB_TID_HASHBASE_A) / 4; in cudbg_fill_meminfo()
659 md->base = t4_read_reg(padap, LE_DB_HASH_TID_BASE_A); in cudbg_fill_meminfo()
661 hi = t4_read_reg(padap, LE_DB_HASH_TID_BASE_A); in cudbg_fill_meminfo()
662 md->base = t4_read_reg(padap, in cudbg_fill_meminfo()
673 md->base = t4_read_reg(padap, ULP_ ## reg ## _LLIMIT_A);\ in cudbg_fill_meminfo()
674 (md++)->limit = t4_read_reg(padap, ULP_ ## reg ## _ULIMIT_A);\ in cudbg_fill_meminfo()
688 if (!is_t4(padap->params.chip)) { in cudbg_fill_meminfo()
689 u32 fifo_size = t4_read_reg(padap, SGE_DBVFIFO_SIZE_A); in cudbg_fill_meminfo()
690 u32 sge_ctrl = t4_read_reg(padap, SGE_CONTROL2_A); in cudbg_fill_meminfo()
693 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
701 md->base = BASEADDR_G(t4_read_reg(padap, in cudbg_fill_meminfo()
709 md->base = t4_read_reg(padap, ULP_RX_CTX_BASE_A); in cudbg_fill_meminfo()
712 md->base = t4_read_reg(padap, ULP_TX_ERR_TABLE_BASE_A); in cudbg_fill_meminfo()
716 md->base = padap->vres.ocq.start; in cudbg_fill_meminfo()
717 if (padap->vres.ocq.size) in cudbg_fill_meminfo()
718 md->limit = md->base + padap->vres.ocq.size - 1; in cudbg_fill_meminfo()
738 lo = t4_read_reg(padap, CIM_SDRAM_BASE_ADDR_A); in cudbg_fill_meminfo()
739 hi = t4_read_reg(padap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1; in cudbg_fill_meminfo()
743 lo = t4_read_reg(padap, CIM_EXTMEM2_BASE_ADDR_A); in cudbg_fill_meminfo()
744 hi = t4_read_reg(padap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1; in cudbg_fill_meminfo()
748 lo = t4_read_reg(padap, TP_PMM_RX_MAX_PAGE_A); in cudbg_fill_meminfo()
751 FREERXPAGECOUNT_G(t4_read_reg(padap, in cudbg_fill_meminfo()
756 t4_read_reg(padap, TP_PMM_RX_PAGE_SIZE_A) >> 10; in cudbg_fill_meminfo()
759 lo = t4_read_reg(padap, TP_PMM_TX_MAX_PAGE_A); in cudbg_fill_meminfo()
760 hi = t4_read_reg(padap, TP_PMM_TX_PAGE_SIZE_A); in cudbg_fill_meminfo()
763 FREETXPAGECOUNT_G(t4_read_reg(padap, in cudbg_fill_meminfo()
773 meminfo_buff->p_structs = t4_read_reg(padap, TP_CMM_MM_MAX_PSTRUCT_A); in cudbg_fill_meminfo()
775 FREEPSTRUCTCOUNT_G(t4_read_reg(padap, TP_FLM_FREE_PS_CNT_A)); in cudbg_fill_meminfo()
778 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) in cudbg_fill_meminfo()
779 lo = t4_read_reg(padap, in cudbg_fill_meminfo()
782 lo = t4_read_reg(padap, MPS_RX_PG_RSV0_A + i * 4); in cudbg_fill_meminfo()
783 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
794 for (i = 0; i < padap->params.arch.nchan; i++) { in cudbg_fill_meminfo()
795 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) in cudbg_fill_meminfo()
796 lo = t4_read_reg(padap, in cudbg_fill_meminfo()
799 lo = t4_read_reg(padap, MPS_RX_PG_RSV4_A + i * 4); in cudbg_fill_meminfo()
800 if (is_t5(padap->params.chip)) { in cudbg_fill_meminfo()
818 struct adapter *padap = pdbg_init->adap; in cudbg_collect_reg_dump() local
823 if (is_t4(padap->params.chip)) in cudbg_collect_reg_dump()
825 else if (is_t5(padap->params.chip) || is_t6(padap->params.chip)) in cudbg_collect_reg_dump()
831 t4_get_regs(padap, (void *)temp_buff.data, temp_buff.size); in cudbg_collect_reg_dump()
839 struct adapter *padap = pdbg_init->adap; in cudbg_collect_fw_devlog() local
844 rc = t4_init_devlog_params(padap); in cudbg_collect_fw_devlog()
850 dparams = &padap->params.devlog; in cudbg_collect_fw_devlog()
857 spin_lock(&padap->win0_lock); in cudbg_collect_fw_devlog()
858 rc = t4_memory_rw(padap, padap->params.drv_memwin, in cudbg_collect_fw_devlog()
863 spin_unlock(&padap->win0_lock); in cudbg_collect_fw_devlog()
877 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_la() local
882 if (is_t6(padap->params.chip)) { in cudbg_collect_cim_la()
883 size = padap->params.cim_la_size / 10 + 1; in cudbg_collect_cim_la()
886 size = padap->params.cim_la_size / 8; in cudbg_collect_cim_la()
895 rc = t4_cim_read(padap, UP_UP_DBG_LA_CFG_A, 1, &cfg); in cudbg_collect_cim_la()
903 rc = t4_cim_read_la(padap, in cudbg_collect_cim_la()
918 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_ma_la() local
927 t4_cim_read_ma_la(padap, in cudbg_collect_cim_ma_la()
938 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_qcfg() local
949 cim_qcfg_data->chip = padap->params.chip; in cudbg_collect_cim_qcfg()
950 rc = t4_cim_read(padap, UP_IBQ_0_RDADDR_A, in cudbg_collect_cim_qcfg()
958 rc = t4_cim_read(padap, UP_OBQ_0_REALADDR_A, in cudbg_collect_cim_qcfg()
967 t4_read_cimq_cfg(padap, cim_qcfg_data->base, cim_qcfg_data->size, in cudbg_collect_cim_qcfg()
976 struct adapter *padap = pdbg_init->adap; in cudbg_read_cim_ibq() local
988 no_of_read_words = t4_read_cim_ibq(padap, qid, in cudbg_read_cim_ibq()
1045 u32 cudbg_cim_obq_size(struct adapter *padap, int qid) in cudbg_cim_obq_size() argument
1049 t4_write_reg(padap, CIM_QUEUE_CONFIG_REF_A, OBQSELECT_F | in cudbg_cim_obq_size()
1051 value = t4_read_reg(padap, CIM_QUEUE_CONFIG_CTRL_A); in cudbg_cim_obq_size()
1060 struct adapter *padap = pdbg_init->adap; in cudbg_read_cim_obq() local
1066 qsize = cudbg_cim_obq_size(padap, qid); in cudbg_read_cim_obq()
1072 no_of_read_words = t4_read_cim_obq(padap, qid, in cudbg_read_cim_obq()
1143 static int cudbg_meminfo_get_mem_index(struct adapter *padap, in cudbg_meminfo_get_mem_index() argument
1158 flag = is_t5(padap->params.chip) ? MC0_FLAG : MC_FLAG; in cudbg_meminfo_get_mem_index()
1181 static int cudbg_get_mem_region(struct adapter *padap, in cudbg_get_mem_region() argument
1190 rc = cudbg_meminfo_get_mem_index(padap, meminfo, mem_type, &mc); in cudbg_get_mem_region()
1232 static int cudbg_get_mem_relative(struct adapter *padap, in cudbg_get_mem_relative() argument
1239 rc = cudbg_meminfo_get_mem_index(padap, meminfo, mem_type, &mc_idx); in cudbg_get_mem_relative()
1257 static int cudbg_get_payload_range(struct adapter *padap, u8 mem_type, in cudbg_get_payload_range() argument
1265 rc = cudbg_fill_meminfo(padap, &meminfo); in cudbg_get_payload_range()
1269 rc = cudbg_get_mem_region(padap, &meminfo, mem_type, region_name, in cudbg_get_payload_range()
1280 return cudbg_get_mem_relative(padap, &meminfo, mem_type, in cudbg_get_payload_range()
1374 struct adapter *padap = pdbg_init->adap; in cudbg_read_fw_mem() local
1384 rc = cudbg_get_payload_range(padap, mem_type, region_name[i], in cudbg_read_fw_mem()
1422 spin_lock(&padap->win0_lock); in cudbg_read_fw_mem()
1425 spin_unlock(&padap->win0_lock); in cudbg_read_fw_mem()
1448 struct adapter *padap = pdbg_init->adap; in cudbg_t4_fwcache() local
1453 rc = t4_fwcache(padap, FW_PARAM_DEV_FWCACHE_FLUSH); in cudbg_t4_fwcache()
1463 struct adapter *padap = pdbg_init->adap; in cudbg_mem_region_size() local
1469 rc = cudbg_fill_meminfo(padap, &mem_info); in cudbg_mem_region_size()
1476 rc = cudbg_meminfo_get_mem_index(padap, &mem_info, mem_type, &mc_idx); in cudbg_mem_region_size()
1549 struct adapter *padap = pdbg_init->adap; in cudbg_collect_rss() local
1553 nentries = t4_chip_rss_size(padap); in cudbg_collect_rss()
1559 rc = t4_read_rss(padap, (u16 *)temp_buff.data); in cudbg_collect_rss()
1572 struct adapter *padap = pdbg_init->adap; in cudbg_collect_rss_vf_config() local
1577 vf_count = padap->params.arch.vfcount; in cudbg_collect_rss_vf_config()
1586 t4_read_rss_vf_config(padap, vf, &vfconf[vf].rss_vf_vfl, in cudbg_collect_rss_vf_config()
1595 struct adapter *padap = pdbg_init->adap; in cudbg_collect_path_mtu() local
1604 t4_read_mtu_tbl(padap, (u16 *)temp_buff.data, NULL); in cudbg_collect_path_mtu()
1612 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pm_stats() local
1623 t4_pmtx_get_stats(padap, pm_stats_buff->tx_cnt, pm_stats_buff->tx_cyc); in cudbg_collect_pm_stats()
1624 t4_pmrx_get_stats(padap, pm_stats_buff->rx_cnt, pm_stats_buff->rx_cyc); in cudbg_collect_pm_stats()
1632 struct adapter *padap = pdbg_init->adap; in cudbg_collect_hw_sched() local
1637 if (!padap->params.vpd.cclk) in cudbg_collect_hw_sched()
1647 hw_sched_buff->map = t4_read_reg(padap, TP_TX_MOD_QUEUE_REQ_MAP_A); in cudbg_collect_hw_sched()
1648 hw_sched_buff->mode = TIMERMODE_G(t4_read_reg(padap, TP_MOD_CONFIG_A)); in cudbg_collect_hw_sched()
1649 t4_read_pace_tbl(padap, hw_sched_buff->pace_tab); in cudbg_collect_hw_sched()
1651 t4_get_tx_sched(padap, i, &hw_sched_buff->kbps[i], in cudbg_collect_hw_sched()
1660 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tp_indirect() local
1666 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1684 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1686 else if (is_t6(padap->params.chip)) in cudbg_collect_tp_indirect()
1693 if (is_t5(padap->params.chip)) { in cudbg_collect_tp_indirect()
1698 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tp_indirect()
1704 t4_tp_pio_read(padap, buff, tp_pio->ireg_offset_range, in cudbg_collect_tp_indirect()
1710 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1712 else if (is_t6(padap->params.chip)) in cudbg_collect_tp_indirect()
1719 if (is_t5(padap->params.chip)) { in cudbg_collect_tp_indirect()
1724 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tp_indirect()
1730 t4_tp_tm_pio_read(padap, buff, tp_pio->ireg_offset_range, in cudbg_collect_tp_indirect()
1736 if (is_t5(padap->params.chip)) in cudbg_collect_tp_indirect()
1739 else if (is_t6(padap->params.chip)) in cudbg_collect_tp_indirect()
1747 if (is_t5(padap->params.chip)) { in cudbg_collect_tp_indirect()
1754 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tp_indirect()
1762 t4_tp_mib_read(padap, buff, tp_pio->ireg_offset_range, in cudbg_collect_tp_indirect()
1769 static void cudbg_read_sge_qbase_indirect_reg(struct adapter *padap, in cudbg_read_sge_qbase_indirect_reg() argument
1785 t4_write_reg(padap, qbase->reg_addr, func); in cudbg_read_sge_qbase_indirect_reg()
1787 *buff = t4_read_reg(padap, qbase->reg_data[i]); in cudbg_read_sge_qbase_indirect_reg()
1794 struct adapter *padap = pdbg_init->adap; in cudbg_collect_sge_indirect() local
1806 for_each_port(padap, i) { in cudbg_collect_sge_indirect()
1807 padap_running = netif_running(padap->port[i]); in cudbg_collect_sge_indirect()
1829 t4_read_indirect(padap, in cudbg_collect_sge_indirect()
1838 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5 && in cudbg_collect_sge_indirect()
1850 cudbg_read_sge_qbase_indirect_reg(padap, sge_qbase, in cudbg_collect_sge_indirect()
1853 for (i = 0; i < padap->params.arch.vfcount; i++) in cudbg_collect_sge_indirect()
1854 cudbg_read_sge_qbase_indirect_reg(padap, sge_qbase, in cudbg_collect_sge_indirect()
1857 sge_qbase->vfcount = padap->params.arch.vfcount; in cudbg_collect_sge_indirect()
1867 struct adapter *padap = pdbg_init->adap; in cudbg_collect_ulprx_la() local
1878 t4_ulprx_read_la(padap, (u32 *)ulprx_la_buff->data); in cudbg_collect_ulprx_la()
1887 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tp_la() local
1898 tp_la_buff->mode = DBGLAMODE_G(t4_read_reg(padap, TP_DBG_LA_CONFIG_A)); in cudbg_collect_tp_la()
1899 t4_tp_read_la(padap, (u64 *)tp_la_buff->data, NULL); in cudbg_collect_tp_la()
1907 struct adapter *padap = pdbg_init->adap; in cudbg_collect_meminfo() local
1927 rc = cudbg_fill_meminfo(padap, meminfo_buff); in cudbg_collect_meminfo()
1942 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cim_pif_la() local
1954 t4_cim_read_pif_la(padap, (u32 *)cim_pif_la_buff->data, in cudbg_collect_cim_pif_la()
1964 struct adapter *padap = pdbg_init->adap; in cudbg_collect_clk_info() local
1970 if (!padap->params.vpd.cclk) in cudbg_collect_clk_info()
1979 clk_info_buff->cclk_ps = 1000000000 / padap->params.vpd.cclk; /* psec */ in cudbg_collect_clk_info()
1980 clk_info_buff->res = t4_read_reg(padap, TP_TIMER_RESOLUTION_A); in cudbg_collect_clk_info()
1987 t4_read_reg(padap, TP_DACK_TIMER_A); in cudbg_collect_clk_info()
1989 tp_tick_us * t4_read_reg(padap, TP_RXT_MIN_A); in cudbg_collect_clk_info()
1991 tp_tick_us * t4_read_reg(padap, TP_RXT_MAX_A); in cudbg_collect_clk_info()
1993 tp_tick_us * t4_read_reg(padap, TP_PERS_MIN_A); in cudbg_collect_clk_info()
1995 tp_tick_us * t4_read_reg(padap, TP_PERS_MAX_A); in cudbg_collect_clk_info()
1997 tp_tick_us * t4_read_reg(padap, TP_KEEP_IDLE_A); in cudbg_collect_clk_info()
1999 tp_tick_us * t4_read_reg(padap, TP_KEEP_INTVL_A); in cudbg_collect_clk_info()
2001 tp_tick_us * INITSRTT_G(t4_read_reg(padap, TP_INIT_SRTT_A)); in cudbg_collect_clk_info()
2003 tp_tick_us * t4_read_reg(padap, TP_FINWAIT2_TIMER_A); in cudbg_collect_clk_info()
2012 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pcie_indirect() local
2034 t4_read_indirect(padap, in cudbg_collect_pcie_indirect()
2053 t4_read_indirect(padap, in cudbg_collect_pcie_indirect()
2068 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pm_indirect() local
2090 t4_read_indirect(padap, in cudbg_collect_pm_indirect()
2109 t4_read_indirect(padap, in cudbg_collect_pm_indirect()
2124 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tid() local
2158 rc = t4_query_params(padap, padap->mbox, padap->pf, 0, 2, para, val); in cudbg_collect_tid()
2167 if (is_t5(padap->params.chip)) { in cudbg_collect_tid()
2168 tid->sb = t4_read_reg(padap, LE_DB_SERVER_INDEX_A) / 4; in cudbg_collect_tid()
2169 } else if (is_t6(padap->params.chip)) { in cudbg_collect_tid()
2171 t4_read_reg(padap, LE_DB_ACTIVE_TABLE_START_INDEX_A); in cudbg_collect_tid()
2172 tid->sb = t4_read_reg(padap, LE_DB_SRVR_START_INDEX_A); in cudbg_collect_tid()
2176 rc = t4_query_params(padap, padap->mbox, padap->pf, 0, 2, in cudbg_collect_tid()
2190 tid->ntids = padap->tids.ntids; in cudbg_collect_tid()
2191 tid->nstids = padap->tids.nstids; in cudbg_collect_tid()
2192 tid->stid_base = padap->tids.stid_base; in cudbg_collect_tid()
2193 tid->hash_base = padap->tids.hash_base; in cudbg_collect_tid()
2195 tid->natids = padap->tids.natids; in cudbg_collect_tid()
2196 tid->nftids = padap->tids.nftids; in cudbg_collect_tid()
2197 tid->ftid_base = padap->tids.ftid_base; in cudbg_collect_tid()
2198 tid->aftid_base = padap->tids.aftid_base; in cudbg_collect_tid()
2199 tid->aftid_end = padap->tids.aftid_end; in cudbg_collect_tid()
2201 tid->sftid_base = padap->tids.sftid_base; in cudbg_collect_tid()
2202 tid->nsftids = padap->tids.nsftids; in cudbg_collect_tid()
2204 tid->flags = padap->flags; in cudbg_collect_tid()
2205 tid->le_db_conf = t4_read_reg(padap, LE_DB_CONFIG_A); in cudbg_collect_tid()
2206 tid->ip_users = t4_read_reg(padap, LE_DB_ACT_CNT_IPV4_A); in cudbg_collect_tid()
2207 tid->ipv6_users = t4_read_reg(padap, LE_DB_ACT_CNT_IPV6_A); in cudbg_collect_tid()
2216 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pcie_config() local
2231 t4_hw_pci_read_cfg4(padap, j, value); in cudbg_collect_pcie_config()
2258 static int cudbg_get_ctxt_region_info(struct adapter *padap, in cudbg_get_ctxt_region_info() argument
2268 rc = cudbg_fill_meminfo(padap, &meminfo); in cudbg_get_ctxt_region_info()
2277 rc = cudbg_get_mem_region(padap, &meminfo, j, in cudbg_get_ctxt_region_info()
2282 rc = cudbg_get_mem_relative(padap, &meminfo, j, in cudbg_get_ctxt_region_info()
2301 value = t4_read_reg(padap, SGE_FLM_CFG_A); in cudbg_get_ctxt_region_info()
2317 int cudbg_dump_context_size(struct adapter *padap) in cudbg_dump_context_size() argument
2325 rc = cudbg_get_ctxt_region_info(padap, region_info, mem_type); in cudbg_dump_context_size()
2346 struct adapter *padap = pdbg_init->adap; in cudbg_read_sge_ctxt() local
2357 rc = t4_sge_ctxt_rd(padap, padap->mbox, cid, ctype, data); in cudbg_read_sge_ctxt()
2359 t4_sge_ctxt_rd_bd(padap, cid, ctype, data); in cudbg_read_sge_ctxt()
2395 struct adapter *padap = pdbg_init->adap; in cudbg_collect_dump_context() local
2405 rc = cudbg_get_ctxt_region_info(padap, region_info, mem_type); in cudbg_collect_dump_context()
2409 rc = cudbg_dump_context_size(padap); in cudbg_collect_dump_context()
2453 t4_sge_ctxt_flush(padap, padap->mbox, i); in cudbg_collect_dump_context()
2455 rc = t4_memory_rw(padap, MEMWIN_NIC, mem_type[i], in cudbg_collect_dump_context()
2511 static void cudbg_mps_rpl_backdoor(struct adapter *padap, in cudbg_mps_rpl_backdoor() argument
2514 if (is_t5(padap->params.chip)) { in cudbg_mps_rpl_backdoor()
2515 mps_rplc->rplc255_224 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2517 mps_rplc->rplc223_192 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2519 mps_rplc->rplc191_160 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2521 mps_rplc->rplc159_128 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2524 mps_rplc->rplc255_224 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2526 mps_rplc->rplc223_192 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2528 mps_rplc->rplc191_160 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2530 mps_rplc->rplc159_128 = htonl(t4_read_reg(padap, in cudbg_mps_rpl_backdoor()
2533 mps_rplc->rplc127_96 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP3_A)); in cudbg_mps_rpl_backdoor()
2534 mps_rplc->rplc95_64 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP2_A)); in cudbg_mps_rpl_backdoor()
2535 mps_rplc->rplc63_32 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP1_A)); in cudbg_mps_rpl_backdoor()
2536 mps_rplc->rplc31_0 = htonl(t4_read_reg(padap, MPS_VF_RPLCT_MAP0_A)); in cudbg_mps_rpl_backdoor()
2542 struct adapter *padap = pdbg_init->adap; in cudbg_collect_tcam_index() local
2547 if (CHELSIO_CHIP_VERSION(padap->params.chip) >= CHELSIO_T6) { in cudbg_collect_tcam_index()
2561 t4_write_reg(padap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in cudbg_collect_tcam_index()
2562 val = t4_read_reg(padap, MPS_CLS_TCAM_RDATA1_REQ_ID1_A); in cudbg_collect_tcam_index()
2564 tcamy |= t4_read_reg(padap, MPS_CLS_TCAM_RDATA0_REQ_ID1_A); in cudbg_collect_tcam_index()
2565 data2 = t4_read_reg(padap, MPS_CLS_TCAM_RDATA2_REQ_ID1_A); in cudbg_collect_tcam_index()
2586 t4_write_reg(padap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); in cudbg_collect_tcam_index()
2587 val = t4_read_reg(padap, MPS_CLS_TCAM_RDATA1_REQ_ID1_A); in cudbg_collect_tcam_index()
2589 tcamx |= t4_read_reg(padap, MPS_CLS_TCAM_RDATA0_REQ_ID1_A); in cudbg_collect_tcam_index()
2590 data2 = t4_read_reg(padap, MPS_CLS_TCAM_RDATA2_REQ_ID1_A); in cudbg_collect_tcam_index()
2597 tcamy = t4_read_reg64(padap, MPS_CLS_TCAM_Y_L(idx)); in cudbg_collect_tcam_index()
2598 tcamx = t4_read_reg64(padap, MPS_CLS_TCAM_X_L(idx)); in cudbg_collect_tcam_index()
2605 tcam->cls_lo = t4_read_reg(padap, MPS_CLS_SRAM_L(idx)); in cudbg_collect_tcam_index()
2606 tcam->cls_hi = t4_read_reg(padap, MPS_CLS_SRAM_H(idx)); in cudbg_collect_tcam_index()
2608 if (is_t5(padap->params.chip)) in cudbg_collect_tcam_index()
2610 else if (is_t6(padap->params.chip)) in cudbg_collect_tcam_index()
2631 rc = t4_wr_mbox(padap, padap->mbox, &ldst_cmd, in cudbg_collect_tcam_index()
2635 cudbg_mps_rpl_backdoor(padap, &mps_rplc); in cudbg_collect_tcam_index()
2648 if (padap->params.arch.mps_rplc_size > CUDBG_MAX_RPLC_SIZE) { in cudbg_collect_tcam_index()
2657 tcam->rplc_size = padap->params.arch.mps_rplc_size; in cudbg_collect_tcam_index()
2665 struct adapter *padap = pdbg_init->adap; in cudbg_collect_mps_tcam() local
2671 n = padap->params.arch.mps_tcam_size; in cudbg_collect_mps_tcam()
2702 struct adapter *padap = pdbg_init->adap; in cudbg_collect_vpd_data() local
2710 rc = t4_get_raw_vpd_params(padap, &vpd); in cudbg_collect_vpd_data()
2714 rc = t4_get_fw_version(padap, &fw_vers); in cudbg_collect_vpd_data()
2718 rc = cudbg_read_vpd_reg(padap, CUDBG_VPD_VER_ADDR, CUDBG_VPD_VER_LEN, in cudbg_collect_vpd_data()
2738 vpd_data->scfg_vers = t4_read_reg(padap, PCIE_STATIC_SPARE2_A); in cudbg_collect_vpd_data()
2750 struct adapter *padap = pdbg_init->adap; in cudbg_read_tid() local
2756 t4_write_reg(padap, LE_DB_DBGI_REQ_DATA_A + (i << 2), 0); in cudbg_read_tid()
2760 t4_write_reg(padap, LE_DB_DBGI_REQ_TCAM_CMD_A, val); in cudbg_read_tid()
2764 t4_write_reg(padap, LE_DB_DBGI_CONFIG_A, val); in cudbg_read_tid()
2770 val = t4_read_reg(padap, LE_DB_DBGI_CONFIG_A); in cudbg_read_tid()
2778 val = t4_read_reg(padap, LE_DB_DBGI_RSP_STATUS_A); in cudbg_read_tid()
2785 tid_data->data[i] = t4_read_reg(padap, in cudbg_read_tid()
2836 void cudbg_fill_le_tcam_info(struct adapter *padap, in cudbg_fill_le_tcam_info() argument
2842 value = t4_read_reg(padap, LE_DB_TID_HASHBASE_A); /* hash base index */ in cudbg_fill_le_tcam_info()
2846 value = t4_read_reg(padap, LE_DB_ROUTING_TABLE_INDEX_A); in cudbg_fill_le_tcam_info()
2850 if (is_t6(padap->params.chip)) in cudbg_fill_le_tcam_info()
2851 value = t4_read_reg(padap, LE_DB_CLCAM_TID_BASE_A); in cudbg_fill_le_tcam_info()
2853 value = t4_read_reg(padap, LE_DB_CLIP_TABLE_INDEX_A); in cudbg_fill_le_tcam_info()
2857 value = t4_read_reg(padap, LE_DB_FILTER_TABLE_INDEX_A); in cudbg_fill_le_tcam_info()
2861 value = t4_read_reg(padap, LE_DB_SERVER_INDEX_A); in cudbg_fill_le_tcam_info()
2865 value = t4_read_reg(padap, LE_DB_CONFIG_A); in cudbg_fill_le_tcam_info()
2867 value = t4_read_reg(padap, LE_DB_HASH_CONFIG_A); in cudbg_fill_le_tcam_info()
2868 if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5) { in cudbg_fill_le_tcam_info()
2878 if (is_t6(padap->params.chip)) in cudbg_fill_le_tcam_info()
2886 if (is_t6(padap->params.chip)) in cudbg_fill_le_tcam_info()
2894 struct adapter *padap = pdbg_init->adap; in cudbg_collect_le_tcam() local
2902 cudbg_fill_le_tcam_info(padap, &tcam_region); in cudbg_collect_le_tcam()
2927 if (is_t6(padap->params.chip) && in cudbg_collect_le_tcam()
2949 struct adapter *padap = pdbg_init->adap; in cudbg_collect_cctrl() local
2959 t4_read_cong_tbl(padap, (void *)temp_buff.data); in cudbg_collect_cctrl()
2967 struct adapter *padap = pdbg_init->adap; in cudbg_collect_ma_indirect() local
2973 if (CHELSIO_CHIP_VERSION(padap->params.chip) < CHELSIO_T6) in cudbg_collect_ma_indirect()
2991 t4_read_indirect(padap, ma_fli->ireg_addr, ma_fli->ireg_data, in cudbg_collect_ma_indirect()
3006 t4_read_indirect(padap, ma_fli->ireg_addr, in cudbg_collect_ma_indirect()
3021 struct adapter *padap = pdbg_init->adap; in cudbg_collect_ulptx_la() local
3043 ulptx_la_buff->rdptr[i] = t4_read_reg(padap, in cudbg_collect_ulptx_la()
3046 ulptx_la_buff->wrptr[i] = t4_read_reg(padap, in cudbg_collect_ulptx_la()
3049 ulptx_la_buff->rddata[i] = t4_read_reg(padap, in cudbg_collect_ulptx_la()
3054 t4_read_reg(padap, in cudbg_collect_ulptx_la()
3059 t4_write_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A, 0x1); in cudbg_collect_ulptx_la()
3061 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A); in cudbg_collect_ulptx_la()
3063 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_0_A); in cudbg_collect_ulptx_la()
3065 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_1_A); in cudbg_collect_ulptx_la()
3067 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_2_A); in cudbg_collect_ulptx_la()
3069 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_3_A); in cudbg_collect_ulptx_la()
3071 t4_read_reg(padap, ULP_TX_ASIC_DEBUG_4_A); in cudbg_collect_ulptx_la()
3073 t4_read_reg(padap, PM_RX_BASE_ADDR); in cudbg_collect_ulptx_la()
3083 struct adapter *padap = pdbg_init->adap; in cudbg_collect_up_cim_indirect() local
3091 if (is_t5(padap->params.chip)) in cudbg_collect_up_cim_indirect()
3094 else if (is_t6(padap->params.chip)) in cudbg_collect_up_cim_indirect()
3110 if (is_t5(padap->params.chip)) { in cudbg_collect_up_cim_indirect()
3118 } else if (is_t6(padap->params.chip)) { in cudbg_collect_up_cim_indirect()
3147 rc = t4_cim_read(padap, in cudbg_collect_up_cim_indirect()
3164 struct adapter *padap = pdbg_init->adap; in cudbg_collect_pbt_tables() local
3180 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
3193 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
3205 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
3217 rc = t4_cim_read(padap, addr + (i * 4), 1, in cudbg_collect_pbt_tables()
3232 struct adapter *padap = pdbg_init->adap; in cudbg_collect_mbox_log() local
3243 log = padap->mbox_log; in cudbg_collect_mbox_log()
3244 mbox_cmds = padap->mbox_log->size; in cudbg_collect_mbox_log()
3276 struct adapter *padap = pdbg_init->adap; in cudbg_collect_hma_indirect() local
3282 if (CHELSIO_CHIP_VERSION(padap->params.chip) < CHELSIO_T6) in cudbg_collect_hma_indirect()
3300 t4_read_indirect(padap, hma_fli->ireg_addr, hma_fli->ireg_data, in cudbg_collect_hma_indirect()
3308 void cudbg_fill_qdesc_num_and_size(const struct adapter *padap, in cudbg_fill_qdesc_num_and_size() argument
3367 struct adapter *padap = pdbg_init->adap; in cudbg_collect_qdesc() local
3372 struct sge *s = &padap->sge; in cudbg_collect_qdesc()
3377 cudbg_fill_qdesc_num_and_size(padap, &tot_entries, &size); in cudbg_collect_qdesc()
3435 for (i = 0; i < padap->params.nports; i++) in cudbg_collect_qdesc()
3509 if (!padap->tc_mqprio) in cudbg_collect_qdesc()
3512 mutex_lock(&padap->tc_mqprio->mqprio_mutex); in cudbg_collect_qdesc()
3531 mutex_unlock(&padap->tc_mqprio->mqprio_mutex); in cudbg_collect_qdesc()
3578 struct adapter *padap = pdbg_init->adap; in cudbg_collect_flash() local
3579 u32 count = padap->params.sf_size, n; in cudbg_collect_flash()
3594 rc = t4_read_flash(padap, addr, n, (u32 *)temp_buff.data, 0); in cudbg_collect_flash()