260 	iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);  in atl1_reset_hw()
261 	ioread32(hw->hw_addr + REG_MASTER_CTRL);  in atl1_reset_hw()
263 	iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);  in atl1_reset_hw()
264 	ioread16(hw->hw_addr + REG_PHY_ENABLE);  in atl1_reset_hw()
271 		icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);  in atl1_reset_hw()
297 	value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_check_eeprom_exist()
300 		iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_check_eeprom_exist()
303 	value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);  in atl1_check_eeprom_exist()
316 	iowrite32(0, hw->hw_addr + REG_VPD_DATA);  in atl1_read_eeprom()
318 	iowrite32(control, hw->hw_addr + REG_VPD_CAP);  in atl1_read_eeprom()
319 	ioread32(hw->hw_addr + REG_VPD_CAP);  in atl1_read_eeprom()
323 		control = ioread32(hw->hw_addr + REG_VPD_CAP);  in atl1_read_eeprom()
328 		*p_value = ioread32(hw->hw_addr + REG_VPD_DATA);  in atl1_read_eeprom()
348 	iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);  in atl1_read_phy_reg()
349 	ioread32(hw->hw_addr + REG_MDIO_CTRL);  in atl1_read_phy_reg()
353 		val = ioread32(hw->hw_addr + REG_MDIO_CTRL);  in atl1_read_phy_reg()
375 	iowrite32(0, hw->hw_addr + REG_SPI_DATA);  in atl1_spi_read()
376 	iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);  in atl1_spi_read()
391 	iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_spi_read()
394 	iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_spi_read()
395 	ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_spi_read()
399 		value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);  in atl1_spi_read()
407 	*buf = ioread32(hw->hw_addr + REG_SPI_DATA);  in atl1_spi_read()
500 	addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);  in atl1_get_permanent_address()
501 	addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));  in atl1_get_permanent_address()
576 	mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));  in atl1_hash_set()
578 	iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));  in atl1_hash_set()
596 	iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);  in atl1_write_phy_reg()
597 	ioread32(hw->hw_addr + REG_MDIO_CTRL);  in atl1_write_phy_reg()
601 		val = ioread32(hw->hw_addr + REG_MDIO_CTRL);  in atl1_write_phy_reg()
674 			val = ioread32(hw->hw_addr + REG_MDIO_CTRL);  in atl1_phy_reset()
808 		hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);  in atl1_init_flash_opcode()
810 		hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);  in atl1_init_flash_opcode()
812 		hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);  in atl1_init_flash_opcode()
814 		hw->hw_addr + REG_SPI_FLASH_OP_RDID);  in atl1_init_flash_opcode()
816 		hw->hw_addr + REG_SPI_FLASH_OP_WREN);  in atl1_init_flash_opcode()
818 		hw->hw_addr + REG_SPI_FLASH_OP_RDSR);  in atl1_init_flash_opcode()
820 		hw->hw_addr + REG_SPI_FLASH_OP_WRSR);  in atl1_init_flash_opcode()
822 		hw->hw_addr + REG_SPI_FLASH_OP_READ);  in atl1_init_flash_opcode()
838 	iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);  in atl1_init_hw()
840 	iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));  in atl1_init_hw()
914 	iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);  in atl1_set_mac_addr()
917 	iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));  in atl1_set_mac_addr()
1275 	iowrite32(value, hw->hw_addr + REG_MAC_CTRL);  in atl1_setup_mac_ctrl()
1403 	iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);  in set_flow_ctrl_old()
1413 	iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);  in set_flow_ctrl_old()
1421 	value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);  in set_flow_ctrl_new()
1430 	iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);  in set_flow_ctrl_new()
1433 	value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);  in set_flow_ctrl_new()
1442 	iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);  in set_flow_ctrl_new()
1457 	iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1464 	iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);  in atl1_configure()
1466 	iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));  in atl1_configure()
1472 		hw->hw_addr + REG_DESC_BASE_ADDR_HI);  in atl1_configure()
1475 		hw->hw_addr + REG_DESC_RFD_ADDR_LO);  in atl1_configure()
1477 		hw->hw_addr + REG_DESC_RRD_ADDR_LO);  in atl1_configure()
1479 		hw->hw_addr + REG_DESC_TPD_ADDR_LO);  in atl1_configure()
1481 		hw->hw_addr + REG_DESC_CMB_ADDR_LO);  in atl1_configure()
1483 		hw->hw_addr + REG_DESC_SMB_ADDR_LO);  in atl1_configure()
1489 	iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);  in atl1_configure()
1490 	iowrite32(adapter->tpd_ring.count, hw->hw_addr +  in atl1_configure()
1494 	iowrite32(1, hw->hw_addr + REG_LOAD_PTR);  in atl1_configure()
1503 	iowrite32(value, hw->hw_addr + REG_MAILBOX);  in atl1_configure()
1514 	iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);  in atl1_configure()
1524 	iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);  in atl1_configure()
1527 	iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);  in atl1_configure()
1528 	iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);  in atl1_configure()
1531 	iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);  in atl1_configure()
1534 	iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);  in atl1_configure()
1543 	iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);  in atl1_configure()
1566 	iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);  in atl1_configure()
1573 	iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);  in atl1_configure()
1583 	iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);  in atl1_configure()
1594 	iowrite32(value, hw->hw_addr + REG_DMA_CTRL);  in atl1_configure()
1601 	iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);  in atl1_configure()
1603 	iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);  in atl1_configure()
1604 	iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);  in atl1_configure()
1608 	iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);  in atl1_configure()
1610 	value = ioread32(adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1617 	iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1618 	iowrite32(0, adapter->hw.hw_addr + REG_ISR);  in atl1_configure()
1631 	iowrite32(value, adapter->hw.hw_addr + 0x12FC);  in atl1_pcie_patch()
1633 	value = ioread32(adapter->hw.hw_addr + 0x1008);  in atl1_pcie_patch()
1635 	iowrite32(value, adapter->hw.hw_addr + 0x1008);  in atl1_pcie_patch()
1648 	value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);  in atl1_via_workaround()
1651 	iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);  in atl1_via_workaround()
1753 	iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);  in atl1_update_mailbox()
2044 		iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);  in atl1_intr_rx()
2496 	iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);  in atl1_intr()
2550 	iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);  in atl1_intr()
2793 		iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2794 		ioread32(hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2807 		iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);  in atl1_suspend()
2808 		ioread32(hw->hw_addr + REG_MAC_CTRL);  in atl1_suspend()
2811 		ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2813 		iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2814 		ioread32(hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2817 		iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2818 		ioread32(hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2819 		iowrite32(0, hw->hw_addr + REG_MAC_CTRL);  in atl1_suspend()
2820 		ioread32(hw->hw_addr + REG_MAC_CTRL);  in atl1_suspend()
2827 	iowrite32(0, hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2828 	ioread32(hw->hw_addr + REG_WOL_CTRL);  in atl1_suspend()
2829 	ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2831 	iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2832 	ioread32(hw->hw_addr + REG_PCIE_PHYMISC);  in atl1_suspend()
2843 	iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);  in atl1_resume()
2962 	adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);  in atl1_probe()
2963 	if (!adapter->hw.hw_addr) {  in atl1_probe()
2968 	adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +  in atl1_probe()
3016 	iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);  in atl1_probe()
3068 	pci_iounmap(pdev, adapter->hw.hw_addr);  in atl1_probe()
3110 	iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);  in atl1_remove()
3112 	pci_iounmap(pdev, adapter->hw.hw_addr);  in atl1_remove()
3437 			regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));  in atl1_get_regs()