212 	u32 reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()  local
215 		reg_tmp &= ~BM_SD_OFF;  in wmt_set_sd_power()
217 		reg_tmp |= BM_SD_OFF;  in wmt_set_sd_power()
219 	writeb(reg_tmp, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_set_sd_power()
247 	u32 reg_tmp;  in wmt_mci_start_command()  local
249 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
250 	writeb(reg_tmp | CTLR_CMD_START, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_start_command()
257 	u32 reg_tmp;  in wmt_mci_send_command()  local
267 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
268 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
280 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_mci_send_command()
281 	writeb((reg_tmp & 0x0F) | (cmdtype << 4),  in wmt_mci_send_command()
375 	u32 reg_tmp;  in wmt_mci_regular_isr()  local
385 	reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_regular_isr()
386 	if ((reg_tmp & INT0_DI_INT_EN) && (status0 & STS0_DEVICE_INS)) {  in wmt_mci_regular_isr()
464 	u32 reg_tmp;  in wmt_reset_hardware()  local
469 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
470 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_reset_hardware()
473 	reg_tmp = readb(priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
474 	writeb(reg_tmp | CTLR_FIFO_RESET, priv->sdmmc_base + SDMMC_CTLR);  in wmt_reset_hardware()
493 	reg_tmp = readb(priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
494 	writeb(reg_tmp | STS2_DIS_FORCECLK, priv->sdmmc_base + SDMMC_STS2);  in wmt_reset_hardware()
527 	u32 reg_tmp;  in wmt_dma_config()  local
540 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
541 		writel(reg_tmp & DMA_CCR_IF_TO_PERIPHERAL, priv->sdmmc_base +  in wmt_dma_config()
544 		reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_config()
545 		writel(reg_tmp | DMA_CCR_PERIPHERAL_TO_IF, priv->sdmmc_base +  in wmt_dma_config()
552 	u32 reg_tmp;  in wmt_dma_start()  local
554 	reg_tmp = readl(priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
555 	writel(reg_tmp | DMA_CCR_RUN, priv->sdmmc_base + SDDMA_CCR);  in wmt_dma_start()
566 	u32 reg_tmp;  in wmt_mci_request()  local
609 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_request()
610 		writew((reg_tmp & 0xF800) | (req->data->blksz - 1),  in wmt_mci_request()
887 	u32 reg_tmp;  in wmt_mci_remove()  local
893 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
894 	writel(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_remove()
895 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
896 	writew(reg_tmp & ~(0xA000), priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_remove()
925 	u32 reg_tmp;  in wmt_mci_suspend()  local
933 	reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_suspend()
934 	writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_suspend()
937 	reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
938 	writew(reg_tmp & 0x5FFF, priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_suspend()
949 	u32 reg_tmp;  in wmt_mci_resume()  local
957 		reg_tmp = readb(priv->sdmmc_base + SDMMC_BUSMODE);  in wmt_mci_resume()
958 		writeb(reg_tmp | BM_SOFT_RESET, priv->sdmmc_base +  in wmt_mci_resume()
961 		reg_tmp = readw(priv->sdmmc_base + SDMMC_BLKLEN);  in wmt_mci_resume()
962 		writew(reg_tmp | (BLKL_GPI_CD | BLKL_INT_ENABLE),  in wmt_mci_resume()
965 		reg_tmp = readb(priv->sdmmc_base + SDMMC_INTMASK0);  in wmt_mci_resume()
966 		writeb(reg_tmp | INT0_DI_INT_EN, priv->sdmmc_base +  in wmt_mci_resume()