Lines Matching refs:extra

219 	u32 extra, reg;  in dwcmshc_rk3568_set_clock()  local
242 extra = sdhci_readl(host, reg); in dwcmshc_rk3568_set_clock()
243 extra &= ~BIT(0); in dwcmshc_rk3568_set_clock()
244 sdhci_writel(host, extra, reg); in dwcmshc_rk3568_set_clock()
260 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
263 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
276 extra = DWCMSHC_EMMC_DLL_DLYENA; in dwcmshc_rk3568_set_clock()
278 extra |= DLL_RXCLK_NO_INVERTER << DWCMSHC_EMMC_DLL_RXCLK_SRCSEL; in dwcmshc_rk3568_set_clock()
279 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_RXCLK); in dwcmshc_rk3568_set_clock()
282 extra = 0x5 << DWCMSHC_EMMC_DLL_START_POINT | in dwcmshc_rk3568_set_clock()
285 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_CTRL); in dwcmshc_rk3568_set_clock()
287 extra, DLL_LOCK_WO_TMOUT(extra), 1, in dwcmshc_rk3568_set_clock()
294 extra = 0x1 << 16 | /* tune clock stop en */ in dwcmshc_rk3568_set_clock()
297 sdhci_writel(host, extra, dwc_priv->vendor_specific_area1 + DWCMSHC_EMMC_ATCTRL); in dwcmshc_rk3568_set_clock()
306 extra = DLL_CMDOUT_SRC_CLK_NEG | in dwcmshc_rk3568_set_clock()
311 sdhci_writel(host, extra, DECMSHC_EMMC_DLL_CMDOUT); in dwcmshc_rk3568_set_clock()
314 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
318 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_TXCLK); in dwcmshc_rk3568_set_clock()
320 extra = DWCMSHC_EMMC_DLL_DLYENA | in dwcmshc_rk3568_set_clock()
323 sdhci_writel(host, extra, DWCMSHC_EMMC_DLL_STRBIN); in dwcmshc_rk3568_set_clock()
474 u32 extra; in dwcmshc_probe() local
490 extra = DIV_ROUND_UP_ULL(dma_get_required_mask(dev), SZ_128M); in dwcmshc_probe()
491 if (extra > SDHCI_MAX_SEGS) in dwcmshc_probe()
492 extra = SDHCI_MAX_SEGS; in dwcmshc_probe()
493 host->adma_table_cnt += extra; in dwcmshc_probe()