651 static void sdr_set_field(void __iomem *reg, u32 field, u32 val)  in sdr_set_field()  function
757 	sdr_set_field(host->base + MSDC_DMA_CFG, MSDC_DMA_CFG_DECSEN, 1);  in msdc_dma_setup()
763 		sdr_set_field(host->base + DMA_SA_H4BIT, DMA_ADDR_HIGH_4BIT,  in msdc_dma_setup()
827 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC,  in msdc_set_timeout()
836 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_WRDTOC,  in msdc_set_busy_timeout()
941 		sdr_set_field(host->base + MSDC_CFG,  in msdc_set_mclk()
945 		sdr_set_field(host->base + MSDC_CFG,  in msdc_set_mclk()
991 		sdr_set_field(host->base + tune_reg,  in msdc_set_mclk()
1093 	sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_START, 1);  in msdc_start_data()
1415 		sdr_set_field(host->base + MSDC_DMA_CTRL, MSDC_DMA_CTRL_STOP,  in msdc_data_xfer_done()
1713 		sdr_set_field(host->base + MSDC_PS, MSDC_PS_CDDEBOUNCE,  in msdc_init_hw()
1731 	sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0);  in msdc_init_hw()
1733 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);  in msdc_init_hw()
1738 		sdr_set_field(host->base + MSDC_PATCH_BIT1,  in msdc_init_hw()
1750 		sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1760 			sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1762 			sdr_set_field(host->base + MSDC_PATCH_BIT2,  in msdc_init_hw()
1812 	sdr_set_field(host->base + SDC_CFG, SDC_CFG_DTOC, 3);  in msdc_init_hw()
1988 		sdr_set_field(host->top_base + EMMC_TOP_CMD, PAD_CMD_RXDLY,  in msdc_set_cmd_delay()
1991 		sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRDLY,  in msdc_set_cmd_delay()
2000 		sdr_set_field(host->top_base + EMMC_TOP_CONTROL,  in msdc_set_data_delay()
2003 		sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_DATRRDLY,  in msdc_set_data_delay()
2021 		sdr_set_field(host->base + tune_reg,  in msdc_tune_response()
2086 		sdr_set_field(host->base + tune_reg,  in msdc_tune_response()
2094 	sdr_set_field(host->base + tune_reg, MSDC_PAD_TUNE_CMDRRDLY,  in msdc_tune_response()
2112 	sdr_set_field(host->base + MSDC_PATCH_BIT1, MSDC_PATCH_BIT1_CMDTA, 2);  in hs400_tune_response()
2116 		sdr_set_field(host->base + MSDC_PAD_TUNE,  in hs400_tune_response()
2125 		sdr_set_field(host->base + PAD_CMD_TUNE,  in hs400_tune_response()
2143 	sdr_set_field(host->base + PAD_CMD_TUNE, PAD_CMD_TUNE_RX_DLY3,  in hs400_tune_response()
2159 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,  in msdc_tune_data()
2214 	sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_INT_DAT_LATCH_CK_SEL,  in msdc_tune_together()
2322 	sdr_set_field(host->base + EMMC50_CFG3, EMMC50_CFG3_OUTS_WR, 2);  in msdc_prepare_hs400_tuning()
2339 			sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2344 			sdr_set_field(host->base + PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2351 			sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2354 			sdr_set_field(host->base + PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2370 		sdr_set_field(host->top_base + EMMC50_PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2373 		sdr_set_field(host->base + PAD_DS_TUNE,  in msdc_execute_hs400_tuning()
2434 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 1);  in msdc_hs400_enhanced_strobe()
2435 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 1);  in msdc_hs400_enhanced_strobe()
2436 		sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 1);  in msdc_hs400_enhanced_strobe()
2442 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_PADCMD_LATCHCK, 0);  in msdc_hs400_enhanced_strobe()
2443 		sdr_set_field(host->base + EMMC50_CFG0, EMMC50_CFG_CMD_RESP_SEL, 0);  in msdc_hs400_enhanced_strobe()
2444 		sdr_set_field(host->base + EMMC50_CFG1, EMMC50_CFG1_DS_CFG, 0);  in msdc_hs400_enhanced_strobe()
2448 		sdr_set_field(host->base + EMMC51_CFG0, CMDQ_RDAT_CNT, 0xb4);  in msdc_hs400_enhanced_strobe()
2523 		sdr_set_field(host->base + MSDC_DMA_CTRL,  in msdc_cqe_disable()