Lines Matching refs:host
49 static void mmci_variant_init(struct mmci_host *host);
50 static void ux500_variant_init(struct mmci_host *host);
51 static void ux500v2_variant_init(struct mmci_host *host);
369 struct mmci_host *host = mmc_priv(mmc); in mmci_card_busy() local
373 spin_lock_irqsave(&host->lock, flags); in mmci_card_busy()
374 if (readl(host->base + MMCISTATUS) & host->variant->busy_detect_flag) in mmci_card_busy()
376 spin_unlock_irqrestore(&host->lock, flags); in mmci_card_busy()
381 static void mmci_reg_delay(struct mmci_host *host) in mmci_reg_delay() argument
390 if (host->cclk < 25000000) in mmci_reg_delay()
399 void mmci_write_clkreg(struct mmci_host *host, u32 clk) in mmci_write_clkreg() argument
401 if (host->clk_reg != clk) { in mmci_write_clkreg()
402 host->clk_reg = clk; in mmci_write_clkreg()
403 writel(clk, host->base + MMCICLOCK); in mmci_write_clkreg()
410 void mmci_write_pwrreg(struct mmci_host *host, u32 pwr) in mmci_write_pwrreg() argument
412 if (host->pwr_reg != pwr) { in mmci_write_pwrreg()
413 host->pwr_reg = pwr; in mmci_write_pwrreg()
414 writel(pwr, host->base + MMCIPOWER); in mmci_write_pwrreg()
421 static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl) in mmci_write_datactrlreg() argument
424 datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag; in mmci_write_datactrlreg()
426 if (host->datactrl_reg != datactrl) { in mmci_write_datactrlreg()
427 host->datactrl_reg = datactrl; in mmci_write_datactrlreg()
428 writel(datactrl, host->base + MMCIDATACTRL); in mmci_write_datactrlreg()
435 static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) in mmci_set_clkreg() argument
437 struct variant_data *variant = host->variant; in mmci_set_clkreg()
441 host->cclk = 0; in mmci_set_clkreg()
445 host->cclk = host->mclk; in mmci_set_clkreg()
446 } else if (desired >= host->mclk) { in mmci_set_clkreg()
450 host->cclk = host->mclk; in mmci_set_clkreg()
458 clk = DIV_ROUND_UP(host->mclk, desired) - 2; in mmci_set_clkreg()
461 host->cclk = host->mclk / (clk + 2); in mmci_set_clkreg()
467 clk = host->mclk / (2 * desired) - 1; in mmci_set_clkreg()
470 host->cclk = host->mclk / (2 * (clk + 1)); in mmci_set_clkreg()
480 host->mmc->actual_clock = host->cclk; in mmci_set_clkreg()
482 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) in mmci_set_clkreg()
484 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) in mmci_set_clkreg()
487 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_set_clkreg()
488 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_set_clkreg()
491 mmci_write_clkreg(host, clk); in mmci_set_clkreg()
494 static void mmci_dma_release(struct mmci_host *host) in mmci_dma_release() argument
496 if (host->ops && host->ops->dma_release) in mmci_dma_release()
497 host->ops->dma_release(host); in mmci_dma_release()
499 host->use_dma = false; in mmci_dma_release()
502 static void mmci_dma_setup(struct mmci_host *host) in mmci_dma_setup() argument
504 if (!host->ops || !host->ops->dma_setup) in mmci_dma_setup()
507 if (host->ops->dma_setup(host)) in mmci_dma_setup()
511 host->next_cookie = 1; in mmci_dma_setup()
513 host->use_dma = true; in mmci_dma_setup()
519 static int mmci_validate_data(struct mmci_host *host, in mmci_validate_data() argument
522 struct variant_data *variant = host->variant; in mmci_validate_data()
527 dev_err(mmc_dev(host->mmc), in mmci_validate_data()
532 if (host->ops && host->ops->validate_data) in mmci_validate_data()
533 return host->ops->validate_data(host, data); in mmci_validate_data()
538 static int mmci_prep_data(struct mmci_host *host, struct mmc_data *data, bool next) in mmci_prep_data() argument
542 if (!host->ops || !host->ops->prep_data) in mmci_prep_data()
545 err = host->ops->prep_data(host, data, next); in mmci_prep_data()
548 data->host_cookie = ++host->next_cookie < 0 ? in mmci_prep_data()
549 1 : host->next_cookie; in mmci_prep_data()
554 static void mmci_unprep_data(struct mmci_host *host, struct mmc_data *data, in mmci_unprep_data() argument
557 if (host->ops && host->ops->unprep_data) in mmci_unprep_data()
558 host->ops->unprep_data(host, data, err); in mmci_unprep_data()
563 static void mmci_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_get_next_data() argument
565 WARN_ON(data->host_cookie && data->host_cookie != host->next_cookie); in mmci_get_next_data()
567 if (host->ops && host->ops->get_next_data) in mmci_get_next_data()
568 host->ops->get_next_data(host, data); in mmci_get_next_data()
571 static int mmci_dma_start(struct mmci_host *host, unsigned int datactrl) in mmci_dma_start() argument
573 struct mmc_data *data = host->data; in mmci_dma_start()
576 if (!host->use_dma) in mmci_dma_start()
579 ret = mmci_prep_data(host, data, false); in mmci_dma_start()
583 if (!host->ops || !host->ops->dma_start) in mmci_dma_start()
587 dev_vdbg(mmc_dev(host->mmc), in mmci_dma_start()
591 ret = host->ops->dma_start(host, &datactrl); in mmci_dma_start()
596 mmci_write_datactrlreg(host, datactrl); in mmci_dma_start()
603 writel(readl(host->base + MMCIMASK0) | MCI_DATAENDMASK, in mmci_dma_start()
604 host->base + MMCIMASK0); in mmci_dma_start()
608 static void mmci_dma_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dma_finalize() argument
610 if (!host->use_dma) in mmci_dma_finalize()
613 if (host->ops && host->ops->dma_finalize) in mmci_dma_finalize()
614 host->ops->dma_finalize(host, data); in mmci_dma_finalize()
617 static void mmci_dma_error(struct mmci_host *host) in mmci_dma_error() argument
619 if (!host->use_dma) in mmci_dma_error()
622 if (host->ops && host->ops->dma_error) in mmci_dma_error()
623 host->ops->dma_error(host); in mmci_dma_error()
627 mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) in mmci_request_end() argument
629 writel(0, host->base + MMCICOMMAND); in mmci_request_end()
631 BUG_ON(host->data); in mmci_request_end()
633 host->mrq = NULL; in mmci_request_end()
634 host->cmd = NULL; in mmci_request_end()
636 mmc_request_done(host->mmc, mrq); in mmci_request_end()
639 static void mmci_set_mask1(struct mmci_host *host, unsigned int mask) in mmci_set_mask1() argument
641 void __iomem *base = host->base; in mmci_set_mask1()
642 struct variant_data *variant = host->variant; in mmci_set_mask1()
644 if (host->singleirq) { in mmci_set_mask1()
656 host->mask1_reg = mask; in mmci_set_mask1()
659 static void mmci_stop_data(struct mmci_host *host) in mmci_stop_data() argument
661 mmci_write_datactrlreg(host, 0); in mmci_stop_data()
662 mmci_set_mask1(host, 0); in mmci_stop_data()
663 host->data = NULL; in mmci_stop_data()
666 static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) in mmci_init_sg() argument
675 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in mmci_init_sg()
678 static u32 mmci_get_dctrl_cfg(struct mmci_host *host) in mmci_get_dctrl_cfg() argument
680 return MCI_DPSM_ENABLE | mmci_dctrl_blksz(host); in mmci_get_dctrl_cfg()
683 static u32 ux500v2_get_dctrl_cfg(struct mmci_host *host) in ux500v2_get_dctrl_cfg() argument
685 return MCI_DPSM_ENABLE | (host->data->blksz << 16); in ux500v2_get_dctrl_cfg()
688 static void ux500_busy_clear_mask_done(struct mmci_host *host) in ux500_busy_clear_mask_done() argument
690 void __iomem *base = host->base; in ux500_busy_clear_mask_done()
692 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_clear_mask_done()
694 ~host->variant->busy_detect_mask, base + MMCIMASK0); in ux500_busy_clear_mask_done()
695 host->busy_state = MMCI_BUSY_DONE; in ux500_busy_clear_mask_done()
696 host->busy_status = 0; in ux500_busy_clear_mask_done()
716 static bool ux500_busy_complete(struct mmci_host *host, struct mmc_command *cmd, in ux500_busy_complete() argument
719 void __iomem *base = host->base; in ux500_busy_complete()
724 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
732 switch (host->busy_state) { in ux500_busy_complete()
751 host->busy_status = status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
755 host->busy_status |= status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
756 if (status & host->variant->busy_detect_flag) { in ux500_busy_complete()
758 host->variant->busy_detect_mask, in ux500_busy_complete()
760 host->busy_state = MMCI_BUSY_WAITING_FOR_START_IRQ; in ux500_busy_complete()
761 schedule_delayed_work(&host->ux500_busy_timeout_work, in ux500_busy_complete()
767 dev_dbg(mmc_dev(host->mmc), in ux500_busy_complete()
769 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
784 if (status & host->variant->busy_detect_flag) { in ux500_busy_complete()
785 host->busy_status |= status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
786 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
787 host->busy_state = MMCI_BUSY_WAITING_FOR_END_IRQ; in ux500_busy_complete()
789 dev_dbg(mmc_dev(host->mmc), in ux500_busy_complete()
792 cancel_delayed_work(&host->ux500_busy_timeout_work); in ux500_busy_complete()
793 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
798 if (!(status & host->variant->busy_detect_flag)) { in ux500_busy_complete()
799 host->busy_status |= status & (MCI_CMDSENT | MCI_CMDRESPEND); in ux500_busy_complete()
800 writel(host->variant->busy_detect_mask, base + MMCICLEAR); in ux500_busy_complete()
801 cancel_delayed_work(&host->ux500_busy_timeout_work); in ux500_busy_complete()
802 ux500_busy_clear_mask_done(host); in ux500_busy_complete()
804 dev_dbg(mmc_dev(host->mmc), in ux500_busy_complete()
811 dev_dbg(mmc_dev(host->mmc), "fell through on state %d, CMD%02x\n", in ux500_busy_complete()
812 host->busy_state, cmd->opcode); in ux500_busy_complete()
817 return (host->busy_state == MMCI_BUSY_DONE); in ux500_busy_complete()
839 int mmci_dmae_setup(struct mmci_host *host) in mmci_dmae_setup() argument
844 dmae = devm_kzalloc(mmc_dev(host->mmc), sizeof(*dmae), GFP_KERNEL); in mmci_dmae_setup()
848 host->dma_priv = dmae; in mmci_dmae_setup()
850 dmae->rx_channel = dma_request_chan(mmc_dev(host->mmc), "rx"); in mmci_dmae_setup()
857 dmae->tx_channel = dma_request_chan(mmc_dev(host->mmc), "tx"); in mmci_dmae_setup()
860 dev_warn(mmc_dev(host->mmc), in mmci_dmae_setup()
883 dev_info(mmc_dev(host->mmc), "DMA channels RX %s, TX %s\n", in mmci_dmae_setup()
894 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
895 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
901 if (max_seg_size < host->mmc->max_seg_size) in mmci_dmae_setup()
902 host->mmc->max_seg_size = max_seg_size; in mmci_dmae_setup()
906 mmci_dmae_release(host); in mmci_dmae_setup()
917 void mmci_dmae_release(struct mmci_host *host) in mmci_dmae_release() argument
919 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_release()
928 static void mmci_dma_unmap(struct mmci_host *host, struct mmc_data *data) in mmci_dma_unmap() argument
930 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dma_unmap()
942 void mmci_dmae_error(struct mmci_host *host) in mmci_dmae_error() argument
944 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_error()
946 if (!dma_inprogress(host)) in mmci_dmae_error()
949 dev_err(mmc_dev(host->mmc), "error during DMA transfer!\n"); in mmci_dmae_error()
951 host->dma_in_progress = false; in mmci_dmae_error()
954 host->data->host_cookie = 0; in mmci_dmae_error()
956 mmci_dma_unmap(host, host->data); in mmci_dmae_error()
959 void mmci_dmae_finalize(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_finalize() argument
961 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_finalize()
965 if (!dma_inprogress(host)) in mmci_dmae_finalize()
970 status = readl(host->base + MMCISTATUS); in mmci_dmae_finalize()
983 mmci_dma_error(host); in mmci_dmae_finalize()
987 mmci_dma_unmap(host, data); in mmci_dmae_finalize()
995 dev_err(mmc_dev(host->mmc), "buggy DMA detected. Taking evasive action.\n"); in mmci_dmae_finalize()
996 mmci_dma_release(host); in mmci_dmae_finalize()
999 host->dma_in_progress = false; in mmci_dmae_finalize()
1005 static int _mmci_dmae_prep_data(struct mmci_host *host, struct mmc_data *data, in _mmci_dmae_prep_data() argument
1009 struct mmci_dmae_priv *dmae = host->dma_priv; in _mmci_dmae_prep_data()
1010 struct variant_data *variant = host->variant; in _mmci_dmae_prep_data()
1012 .src_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
1013 .dst_addr = host->phybase + MMCIFIFO, in _mmci_dmae_prep_data()
1051 if (host->variant->dma_power_of_2 && !is_power_of_2(data->blksz)) in _mmci_dmae_prep_data()
1060 if (host->variant->qcom_dml) in _mmci_dmae_prep_data()
1080 int mmci_dmae_prep_data(struct mmci_host *host, in mmci_dmae_prep_data() argument
1084 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_prep_data()
1087 if (!host->use_dma) in mmci_dmae_prep_data()
1091 return _mmci_dmae_prep_data(host, data, &nd->chan, &nd->desc); in mmci_dmae_prep_data()
1097 return _mmci_dmae_prep_data(host, data, &dmae->cur, in mmci_dmae_prep_data()
1101 int mmci_dmae_start(struct mmci_host *host, unsigned int *datactrl) in mmci_dmae_start() argument
1103 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_start()
1106 host->dma_in_progress = true; in mmci_dmae_start()
1109 host->dma_in_progress = false; in mmci_dmae_start()
1119 void mmci_dmae_get_next_data(struct mmci_host *host, struct mmc_data *data) in mmci_dmae_get_next_data() argument
1121 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_get_next_data()
1124 if (!host->use_dma) in mmci_dmae_get_next_data()
1135 void mmci_dmae_unprep_data(struct mmci_host *host, in mmci_dmae_unprep_data() argument
1139 struct mmci_dmae_priv *dmae = host->dma_priv; in mmci_dmae_unprep_data()
1141 if (!host->use_dma) in mmci_dmae_unprep_data()
1144 mmci_dma_unmap(host, data); in mmci_dmae_unprep_data()
1159 host->dma_in_progress = false; in mmci_dmae_unprep_data()
1185 static void mmci_variant_init(struct mmci_host *host) in mmci_variant_init() argument
1187 host->ops = &mmci_variant_ops; in mmci_variant_init()
1190 static void ux500_variant_init(struct mmci_host *host) in ux500_variant_init() argument
1192 host->ops = &mmci_variant_ops; in ux500_variant_init()
1193 host->ops->busy_complete = ux500_busy_complete; in ux500_variant_init()
1196 static void ux500v2_variant_init(struct mmci_host *host) in ux500v2_variant_init() argument
1198 host->ops = &mmci_variant_ops; in ux500v2_variant_init()
1199 host->ops->busy_complete = ux500_busy_complete; in ux500v2_variant_init()
1200 host->ops->get_datactrl_cfg = ux500v2_get_dctrl_cfg; in ux500v2_variant_init()
1205 struct mmci_host *host = mmc_priv(mmc); in mmci_pre_request() local
1213 if (mmci_validate_data(host, data)) in mmci_pre_request()
1216 mmci_prep_data(host, data, true); in mmci_pre_request()
1222 struct mmci_host *host = mmc_priv(mmc); in mmci_post_request() local
1228 mmci_unprep_data(host, data, err); in mmci_post_request()
1231 static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) in mmci_start_data() argument
1233 struct variant_data *variant = host->variant; in mmci_start_data()
1238 dev_dbg(mmc_dev(host->mmc), "blksz %04x blks %04x flags %08x\n", in mmci_start_data()
1241 host->data = data; in mmci_start_data()
1242 host->size = data->blksz * data->blocks; in mmci_start_data()
1245 clks = (unsigned long long)data->timeout_ns * host->cclk; in mmci_start_data()
1250 base = host->base; in mmci_start_data()
1252 writel(host->size, base + MMCIDATALENGTH); in mmci_start_data()
1254 datactrl = host->ops->get_datactrl_cfg(host); in mmci_start_data()
1255 datactrl |= host->data->flags & MMC_DATA_READ ? MCI_DPSM_DIRECTION : 0; in mmci_start_data()
1257 if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { in mmci_start_data()
1269 (host->size < 8 || in mmci_start_data()
1270 (host->size <= 8 && host->mclk > 50000000))) in mmci_start_data()
1271 clk = host->clk_reg & ~variant->clkreg_enable; in mmci_start_data()
1273 clk = host->clk_reg | variant->clkreg_enable; in mmci_start_data()
1275 mmci_write_clkreg(host, clk); in mmci_start_data()
1278 if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || in mmci_start_data()
1279 host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) in mmci_start_data()
1286 if (!mmci_dma_start(host, datactrl)) in mmci_start_data()
1290 mmci_init_sg(host, data); in mmci_start_data()
1300 if (host->size < variant->fifohalfsize) in mmci_start_data()
1310 mmci_write_datactrlreg(host, datactrl); in mmci_start_data()
1312 mmci_set_mask1(host, irqmask); in mmci_start_data()
1316 mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) in mmci_start_command() argument
1318 void __iomem *base = host->base; in mmci_start_command()
1322 dev_dbg(mmc_dev(host->mmc), "op %02x arg %08x flags %08x\n", in mmci_start_command()
1325 if (readl(base + MMCICOMMAND) & host->variant->cmdreg_cpsm_enable) { in mmci_start_command()
1327 mmci_reg_delay(host); in mmci_start_command()
1330 if (host->variant->cmdreg_stop && in mmci_start_command()
1332 c |= host->variant->cmdreg_stop; in mmci_start_command()
1334 c |= cmd->opcode | host->variant->cmdreg_cpsm_enable; in mmci_start_command()
1337 c |= host->variant->cmdreg_lrsp_crc; in mmci_start_command()
1339 c |= host->variant->cmdreg_srsp_crc; in mmci_start_command()
1341 c |= host->variant->cmdreg_srsp; in mmci_start_command()
1344 host->busy_status = 0; in mmci_start_command()
1345 host->busy_state = MMCI_BUSY_DONE; in mmci_start_command()
1351 if (busy_resp && host->variant->busy_timeout) { in mmci_start_command()
1352 if (cmd->busy_timeout > host->mmc->max_busy_timeout) in mmci_start_command()
1353 clks = (unsigned long long)host->mmc->max_busy_timeout * host->cclk; in mmci_start_command()
1355 clks = (unsigned long long)cmd->busy_timeout * host->cclk; in mmci_start_command()
1358 writel_relaxed(clks, host->base + MMCIDATATIMER); in mmci_start_command()
1361 if (host->ops->pre_sig_volt_switch && cmd->opcode == SD_SWITCH_VOLTAGE) in mmci_start_command()
1362 host->ops->pre_sig_volt_switch(host); in mmci_start_command()
1368 c |= host->variant->data_cmd_enable; in mmci_start_command()
1370 host->cmd = cmd; in mmci_start_command()
1376 static void mmci_stop_command(struct mmci_host *host) in mmci_stop_command() argument
1378 host->stop_abort.error = 0; in mmci_stop_command()
1379 mmci_start_command(host, &host->stop_abort, 0); in mmci_stop_command()
1383 mmci_data_irq(struct mmci_host *host, struct mmc_data *data, in mmci_data_irq() argument
1393 status_err = status & (host->variant->start_err | in mmci_data_irq()
1401 mmci_dma_error(host); in mmci_data_irq()
1410 if (!host->variant->datacnt_useless) { in mmci_data_irq()
1411 remain = readl(host->base + MMCIDATACNT); in mmci_data_irq()
1417 dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ, status 0x%08x at 0x%08x\n", in mmci_data_irq()
1430 if (success > host->variant->fifosize) in mmci_data_irq()
1431 success -= host->variant->fifosize; in mmci_data_irq()
1440 dev_err(mmc_dev(host->mmc), "stray MCI_DATABLOCKEND interrupt\n"); in mmci_data_irq()
1443 mmci_dma_finalize(host, data); in mmci_data_irq()
1445 mmci_stop_data(host); in mmci_data_irq()
1452 if (host->variant->cmdreg_stop && data->error) in mmci_data_irq()
1453 mmci_stop_command(host); in mmci_data_irq()
1455 mmci_request_end(host, data->mrq); in mmci_data_irq()
1456 } else if (host->mrq->sbc && !data->error) { in mmci_data_irq()
1457 mmci_request_end(host, data->mrq); in mmci_data_irq()
1459 mmci_start_command(host, data->stop, 0); in mmci_data_irq()
1465 mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, in mmci_cmd_irq() argument
1469 void __iomem *base = host->base; in mmci_cmd_irq()
1475 sbc = (cmd == host->mrq->sbc); in mmci_cmd_irq()
1483 if (host->variant->busy_timeout && busy_resp) in mmci_cmd_irq()
1486 if (!((status | host->busy_status) & in mmci_cmd_irq()
1491 if (busy_resp && host->variant->busy_detect) in mmci_cmd_irq()
1492 if (!host->ops->busy_complete(host, cmd, status, err_msk)) in mmci_cmd_irq()
1495 host->cmd = NULL; in mmci_cmd_irq()
1501 } else if (host->variant->busy_timeout && busy_resp && in mmci_cmd_irq()
1508 host->irq_action = IRQ_WAKE_THREAD; in mmci_cmd_irq()
1517 if (host->data) { in mmci_cmd_irq()
1519 mmci_dma_error(host); in mmci_cmd_irq()
1521 mmci_stop_data(host); in mmci_cmd_irq()
1522 if (host->variant->cmdreg_stop && cmd->error) { in mmci_cmd_irq()
1523 mmci_stop_command(host); in mmci_cmd_irq()
1528 if (host->irq_action != IRQ_WAKE_THREAD) in mmci_cmd_irq()
1529 mmci_request_end(host, host->mrq); in mmci_cmd_irq()
1532 mmci_start_command(host, host->mrq->cmd, 0); in mmci_cmd_irq()
1533 } else if (!host->variant->datactrl_first && in mmci_cmd_irq()
1535 mmci_start_data(host, cmd->data); in mmci_cmd_irq()
1539 static char *ux500_state_str(struct mmci_host *host) in ux500_state_str() argument
1541 switch (host->busy_state) { in ux500_state_str()
1560 struct mmci_host *host = container_of(work, struct mmci_host, in ux500_busy_timeout_work() local
1565 spin_lock_irqsave(&host->lock, flags); in ux500_busy_timeout_work()
1567 if (host->cmd) { in ux500_busy_timeout_work()
1569 status = readl(host->base + MMCISTATUS); in ux500_busy_timeout_work()
1570 if (status & host->variant->busy_detect_flag) { in ux500_busy_timeout_work()
1572 dev_err(mmc_dev(host->mmc), in ux500_busy_timeout_work()
1574 ux500_state_str(host), host->cmd->opcode); in ux500_busy_timeout_work()
1576 dev_err(mmc_dev(host->mmc), in ux500_busy_timeout_work()
1578 ux500_state_str(host), host->cmd->opcode); in ux500_busy_timeout_work()
1581 mmci_cmd_irq(host, host->cmd, status); in ux500_busy_timeout_work()
1584 spin_unlock_irqrestore(&host->lock, flags); in ux500_busy_timeout_work()
1587 static int mmci_get_rx_fifocnt(struct mmci_host *host, u32 status, int remain) in mmci_get_rx_fifocnt() argument
1589 return remain - (readl(host->base + MMCIFIFOCNT) << 2); in mmci_get_rx_fifocnt()
1592 static int mmci_qcom_get_rx_fifocnt(struct mmci_host *host, u32 status, int r) in mmci_qcom_get_rx_fifocnt() argument
1599 return host->variant->fifohalfsize; in mmci_qcom_get_rx_fifocnt()
1606 static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) in mmci_pio_read() argument
1608 void __iomem *base = host->base; in mmci_pio_read()
1610 u32 status = readl(host->base + MMCISTATUS); in mmci_pio_read()
1611 int host_remain = host->size; in mmci_pio_read()
1614 int count = host->get_rx_fifocnt(host, status, host_remain); in mmci_pio_read()
1654 static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) in mmci_pio_write() argument
1656 struct variant_data *variant = host->variant; in mmci_pio_write()
1657 void __iomem *base = host->base; in mmci_pio_write()
1694 struct mmci_host *host = dev_id; in mmci_pio_irq() local
1695 struct sg_mapping_iter *sg_miter = &host->sg_miter; in mmci_pio_irq()
1696 struct variant_data *variant = host->variant; in mmci_pio_irq()
1697 void __iomem *base = host->base; in mmci_pio_irq()
1702 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); in mmci_pio_irq()
1726 len = mmci_pio_read(host, buffer, remain); in mmci_pio_irq()
1728 len = mmci_pio_write(host, buffer, remain, status); in mmci_pio_irq()
1732 host->size -= len; in mmci_pio_irq()
1747 if (status & MCI_RXACTIVE && host->size < variant->fifohalfsize) in mmci_pio_irq()
1748 mmci_set_mask1(host, MCI_RXDATAAVLBLMASK); in mmci_pio_irq()
1756 if (host->size == 0) { in mmci_pio_irq()
1757 mmci_set_mask1(host, 0); in mmci_pio_irq()
1769 struct mmci_host *host = dev_id; in mmci_irq() local
1772 spin_lock(&host->lock); in mmci_irq()
1773 host->irq_action = IRQ_HANDLED; in mmci_irq()
1776 status = readl(host->base + MMCISTATUS); in mmci_irq()
1780 if (host->singleirq) { in mmci_irq()
1781 if (status & host->mask1_reg) in mmci_irq()
1784 status &= ~host->variant->irq_pio_mask; in mmci_irq()
1791 status &= readl(host->base + MMCIMASK0); in mmci_irq()
1792 if (host->variant->busy_detect) in mmci_irq()
1793 writel(status & ~host->variant->busy_detect_mask, in mmci_irq()
1794 host->base + MMCICLEAR); in mmci_irq()
1796 writel(status, host->base + MMCICLEAR); in mmci_irq()
1798 dev_dbg(mmc_dev(host->mmc), "irq0 (data+cmd) %08x\n", status); in mmci_irq()
1800 if (host->variant->reversed_irq_handling) { in mmci_irq()
1801 mmci_data_irq(host, host->data, status); in mmci_irq()
1802 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1804 mmci_cmd_irq(host, host->cmd, status); in mmci_irq()
1805 mmci_data_irq(host, host->data, status); in mmci_irq()
1812 if (host->variant->busy_detect_flag) in mmci_irq()
1813 status &= ~host->variant->busy_detect_flag; in mmci_irq()
1817 spin_unlock(&host->lock); in mmci_irq()
1819 return host->irq_action; in mmci_irq()
1830 struct mmci_host *host = dev_id; in mmci_irq_thread() local
1833 if (host->rst) { in mmci_irq_thread()
1834 reset_control_assert(host->rst); in mmci_irq_thread()
1836 reset_control_deassert(host->rst); in mmci_irq_thread()
1839 spin_lock_irqsave(&host->lock, flags); in mmci_irq_thread()
1840 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_irq_thread()
1841 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_irq_thread()
1842 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_irq_thread()
1843 host->base + MMCIMASK0); in mmci_irq_thread()
1845 host->irq_action = IRQ_HANDLED; in mmci_irq_thread()
1846 mmci_request_end(host, host->mrq); in mmci_irq_thread()
1847 spin_unlock_irqrestore(&host->lock, flags); in mmci_irq_thread()
1849 return host->irq_action; in mmci_irq_thread()
1854 struct mmci_host *host = mmc_priv(mmc); in mmci_request() local
1857 WARN_ON(host->mrq != NULL); in mmci_request()
1859 mrq->cmd->error = mmci_validate_data(host, mrq->data); in mmci_request()
1865 spin_lock_irqsave(&host->lock, flags); in mmci_request()
1867 host->mrq = mrq; in mmci_request()
1870 mmci_get_next_data(host, mrq->data); in mmci_request()
1873 (host->variant->datactrl_first || mrq->data->flags & MMC_DATA_READ)) in mmci_request()
1874 mmci_start_data(host, mrq->data); in mmci_request()
1877 mmci_start_command(host, mrq->sbc, 0); in mmci_request()
1879 mmci_start_command(host, mrq->cmd, 0); in mmci_request()
1881 spin_unlock_irqrestore(&host->lock, flags); in mmci_request()
1886 struct mmci_host *host = mmc_priv(mmc); in mmci_set_max_busy_timeout() local
1889 if (!host->variant->busy_detect) in mmci_set_max_busy_timeout()
1892 if (host->variant->busy_timeout && mmc->actual_clock) in mmci_set_max_busy_timeout()
1901 struct mmci_host *host = mmc_priv(mmc); in mmci_set_ios() local
1902 struct variant_data *variant = host->variant; in mmci_set_ios()
1912 if (!IS_ERR(mmc->supply.vqmmc) && host->vqmmc_enabled) { in mmci_set_ios()
1914 host->vqmmc_enabled = false; in mmci_set_ios()
1931 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in mmci_set_ios()
1937 host->vqmmc_enabled = true; in mmci_set_ios()
1950 pwr |= host->pwr_reg_add; in mmci_set_ios()
1969 pinctrl_select_state(host->pinctrl, host->pins_opendrain); in mmci_set_ios()
1981 if (host->variant->explicit_mclk_control && in mmci_set_ios()
1982 ios->clock != host->clock_cache) { in mmci_set_ios()
1983 ret = clk_set_rate(host->clk, ios->clock); in mmci_set_ios()
1985 dev_err(mmc_dev(host->mmc), in mmci_set_ios()
1988 host->mclk = clk_get_rate(host->clk); in mmci_set_ios()
1990 host->clock_cache = ios->clock; in mmci_set_ios()
1992 spin_lock_irqsave(&host->lock, flags); in mmci_set_ios()
1994 if (host->ops && host->ops->set_clkreg) in mmci_set_ios()
1995 host->ops->set_clkreg(host, ios->clock); in mmci_set_ios()
1997 mmci_set_clkreg(host, ios->clock); in mmci_set_ios()
2001 if (host->ops && host->ops->set_pwrreg) in mmci_set_ios()
2002 host->ops->set_pwrreg(host, pwr); in mmci_set_ios()
2004 mmci_write_pwrreg(host, pwr); in mmci_set_ios()
2006 mmci_reg_delay(host); in mmci_set_ios()
2008 spin_unlock_irqrestore(&host->lock, flags); in mmci_set_ios()
2013 struct mmci_host *host = mmc_priv(mmc); in mmci_get_cd() local
2014 struct mmci_platform_data *plat = host->plat; in mmci_get_cd()
2021 status = plat->status(mmc_dev(host->mmc)); in mmci_get_cd()
2028 struct mmci_host *host = mmc_priv(mmc); in mmci_sig_volt_switch() local
2033 if (!ret && host->ops && host->ops->post_sig_volt_switch) in mmci_sig_volt_switch()
2034 ret = host->ops->post_sig_volt_switch(host, ios); in mmci_sig_volt_switch()
2057 struct mmci_host *host = mmc_priv(mmc); in mmci_probe_level_translator() local
2067 host->clk_reg_add |= MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
2098 host->clk_reg_add &= ~MCI_STM32_CLK_SELCKIN; in mmci_probe_level_translator()
2115 struct mmci_host *host = mmc_priv(mmc); in mmci_of_parse() local
2122 host->pwr_reg_add |= MCI_ST_DATA0DIREN; in mmci_of_parse()
2124 host->pwr_reg_add |= MCI_ST_DATA2DIREN; in mmci_of_parse()
2126 host->pwr_reg_add |= MCI_ST_DATA31DIREN; in mmci_of_parse()
2128 host->pwr_reg_add |= MCI_ST_DATA74DIREN; in mmci_of_parse()
2130 host->pwr_reg_add |= MCI_ST_CMDDIREN; in mmci_of_parse()
2132 host->pwr_reg_add |= MCI_ST_FBCLKEN; in mmci_of_parse()
2134 host->pwr_reg_add |= MCI_STM32_DIRPOL; in mmci_of_parse()
2136 host->clk_reg_add |= MCI_STM32_CLK_NEGEDGE; in mmci_of_parse()
2154 struct mmci_host *host; in mmci_probe() local
2174 host = mmc_priv(mmc); in mmci_probe()
2175 host->mmc = mmc; in mmci_probe()
2176 host->mmc_ops = &mmci_ops; in mmci_probe()
2188 host->pinctrl = devm_pinctrl_get(&dev->dev); in mmci_probe()
2189 if (IS_ERR(host->pinctrl)) { in mmci_probe()
2191 ret = PTR_ERR(host->pinctrl); in mmci_probe()
2195 host->pins_opendrain = pinctrl_lookup_state(host->pinctrl, in mmci_probe()
2197 if (IS_ERR(host->pins_opendrain)) { in mmci_probe()
2199 ret = PTR_ERR(host->pins_opendrain); in mmci_probe()
2204 host->hw_designer = amba_manf(dev); in mmci_probe()
2205 host->hw_revision = amba_rev(dev); in mmci_probe()
2206 dev_dbg(mmc_dev(mmc), "designer ID = 0x%02x\n", host->hw_designer); in mmci_probe()
2207 dev_dbg(mmc_dev(mmc), "revision = 0x%01x\n", host->hw_revision); in mmci_probe()
2209 host->clk = devm_clk_get(&dev->dev, NULL); in mmci_probe()
2210 if (IS_ERR(host->clk)) { in mmci_probe()
2211 ret = PTR_ERR(host->clk); in mmci_probe()
2215 ret = clk_prepare_enable(host->clk); in mmci_probe()
2220 host->get_rx_fifocnt = mmci_qcom_get_rx_fifocnt; in mmci_probe()
2222 host->get_rx_fifocnt = mmci_get_rx_fifocnt; in mmci_probe()
2224 host->plat = plat; in mmci_probe()
2225 host->variant = variant; in mmci_probe()
2226 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2232 if (host->mclk > variant->f_max) { in mmci_probe()
2233 ret = clk_set_rate(host->clk, variant->f_max); in mmci_probe()
2236 host->mclk = clk_get_rate(host->clk); in mmci_probe()
2238 host->mclk); in mmci_probe()
2241 host->phybase = dev->res.start; in mmci_probe()
2242 host->base = devm_ioremap_resource(&dev->dev, &dev->res); in mmci_probe()
2243 if (IS_ERR(host->base)) { in mmci_probe()
2244 ret = PTR_ERR(host->base); in mmci_probe()
2249 variant->init(host); in mmci_probe()
2258 mmc->f_min = DIV_ROUND_UP(host->mclk, 257); in mmci_probe()
2260 mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); in mmci_probe()
2262 mmc->f_min = clk_round_rate(host->clk, 100000); in mmci_probe()
2264 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); in mmci_probe()
2274 min(host->mclk, mmc->f_max); in mmci_probe()
2277 fmax : min(host->mclk, fmax); in mmci_probe()
2282 host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL); in mmci_probe()
2283 if (IS_ERR(host->rst)) { in mmci_probe()
2284 ret = PTR_ERR(host->rst); in mmci_probe()
2287 ret = reset_control_deassert(host->rst); in mmci_probe()
2314 mmci_write_datactrlreg(host, in mmci_probe()
2315 host->variant->busy_dpsm_flag); in mmci_probe()
2324 host->stop_abort.opcode = MMC_STOP_TRANSMISSION; in mmci_probe()
2325 host->stop_abort.arg = 0; in mmci_probe()
2326 host->stop_abort.flags = MMC_RSP_R1B | MMC_CMD_AC; in mmci_probe()
2360 spin_lock_init(&host->lock); in mmci_probe()
2362 writel(0, host->base + MMCIMASK0); in mmci_probe()
2365 writel(0, host->base + MMCIMASK1); in mmci_probe()
2367 writel(0xfff, host->base + MMCICLEAR); in mmci_probe()
2388 DRIVER_NAME " (cmd)", host); in mmci_probe()
2393 host->singleirq = true; in mmci_probe()
2396 IRQF_SHARED, DRIVER_NAME " (pio)", host); in mmci_probe()
2401 if (host->variant->busy_detect) in mmci_probe()
2402 INIT_DELAYED_WORK(&host->ux500_busy_timeout_work, in mmci_probe()
2405 writel(MCI_IRQENABLE | variant->start_err, host->base + MMCIMASK0); in mmci_probe()
2414 mmci_dma_setup(host); in mmci_probe()
2427 clk_disable_unprepare(host->clk); in mmci_probe()
2438 struct mmci_host *host = mmc_priv(mmc); in mmci_remove() local
2439 struct variant_data *variant = host->variant; in mmci_remove()
2449 writel(0, host->base + MMCIMASK0); in mmci_remove()
2452 writel(0, host->base + MMCIMASK1); in mmci_remove()
2454 writel(0, host->base + MMCICOMMAND); in mmci_remove()
2455 writel(0, host->base + MMCIDATACTRL); in mmci_remove()
2457 mmci_dma_release(host); in mmci_remove()
2458 clk_disable_unprepare(host->clk); in mmci_remove()
2464 static void mmci_save(struct mmci_host *host) in mmci_save() argument
2468 spin_lock_irqsave(&host->lock, flags); in mmci_save()
2470 writel(0, host->base + MMCIMASK0); in mmci_save()
2471 if (host->variant->pwrreg_nopower) { in mmci_save()
2472 writel(0, host->base + MMCIDATACTRL); in mmci_save()
2473 writel(0, host->base + MMCIPOWER); in mmci_save()
2474 writel(0, host->base + MMCICLOCK); in mmci_save()
2476 mmci_reg_delay(host); in mmci_save()
2478 spin_unlock_irqrestore(&host->lock, flags); in mmci_save()
2481 static void mmci_restore(struct mmci_host *host) in mmci_restore() argument
2485 spin_lock_irqsave(&host->lock, flags); in mmci_restore()
2487 if (host->variant->pwrreg_nopower) { in mmci_restore()
2488 writel(host->clk_reg, host->base + MMCICLOCK); in mmci_restore()
2489 writel(host->datactrl_reg, host->base + MMCIDATACTRL); in mmci_restore()
2490 writel(host->pwr_reg, host->base + MMCIPOWER); in mmci_restore()
2492 writel(MCI_IRQENABLE | host->variant->start_err, in mmci_restore()
2493 host->base + MMCIMASK0); in mmci_restore()
2494 mmci_reg_delay(host); in mmci_restore()
2496 spin_unlock_irqrestore(&host->lock, flags); in mmci_restore()
2505 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_suspend() local
2507 mmci_save(host); in mmci_runtime_suspend()
2508 clk_disable_unprepare(host->clk); in mmci_runtime_suspend()
2520 struct mmci_host *host = mmc_priv(mmc); in mmci_runtime_resume() local
2521 clk_prepare_enable(host->clk); in mmci_runtime_resume()
2522 mmci_restore(host); in mmci_runtime_resume()