43 	pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);  in cxl_irq_psl9()
46 		pr_devel("CXL interrupt: Scheduling translation fault handling for later (pe: %i)\n", ctx->pe);  in cxl_irq_psl9()
54 		pr_devel("CXL interrupt: AFU Error 0x%016llx\n", irq_info->afu_err);  in cxl_irq_psl9()
79 		pr_devel("CXL interrupt: OS Context Warning\n");  in cxl_irq_psl9()
94 	pr_devel("CXL interrupt %i for afu pe: %i DSISR: %#llx DAR: %#llx\n", irq, ctx->pe, dsisr, dar);  in cxl_irq_psl8()
107 		pr_devel("Scheduling segment miss handling for later pe: %i\n", ctx->pe);  in cxl_irq_psl8()
112 		pr_devel("CXL interrupt: PTE not found\n");  in cxl_irq_psl8()
114 		pr_devel("CXL interrupt: Storage protection violation\n");  in cxl_irq_psl8()
116 		pr_devel("CXL interrupt: AFU lock access to write through or cache inhibited storage\n");  in cxl_irq_psl8()
118 		pr_devel("CXL interrupt: Access was afu_wr or afu_zero\n");  in cxl_irq_psl8()
120 		pr_devel("CXL interrupt: Access not permitted by virtual page class key protection\n");  in cxl_irq_psl8()
128 		pr_devel("Scheduling page fault handling for later pe: %i\n", ctx->pe);  in cxl_irq_psl8()
134 		pr_devel("CXL interrupt: AURP PTE not found\n");  in cxl_irq_psl8()
139 		pr_devel("CXL interrupt: AFU Error 0x%016llx\n", irq_info->afu_err);  in cxl_irq_psl8()
165 		pr_devel("CXL interrupt: OS Context Warning\n");  in cxl_irq_psl8()
207 	pr_devel("Received AFU interrupt %i for pe: %i (virq %i hwirq %lx)\n",  in cxl_irq_afu()
240 	pr_devel("hwirq %#lx mapped to virq %u\n", hwirq, virq);  in cxl_map_irq()