Lines Matching refs:dev
46 static int verve_write_byte(struct cx231xx *dev, u8 saddr, u8 data) in verve_write_byte() argument
48 return cx231xx_write_i2c_data(dev, VERVE_I2C_ADDRESS, in verve_write_byte()
52 static int verve_read_byte(struct cx231xx *dev, u8 saddr, u8 *data) in verve_read_byte() argument
57 status = cx231xx_read_i2c_data(dev, VERVE_I2C_ADDRESS, in verve_read_byte()
62 void initGPIO(struct cx231xx *dev) in initGPIO() argument
70 cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0); in initGPIO()
72 verve_read_byte(dev, 0x07, &val); in initGPIO()
73 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); in initGPIO()
74 verve_write_byte(dev, 0x07, 0xF4); in initGPIO()
75 verve_read_byte(dev, 0x07, &val); in initGPIO()
76 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); in initGPIO()
78 cx231xx_capture_start(dev, 1, Vbi); in initGPIO()
80 cx231xx_mode_register(dev, EP_MODE_SET, 0x0500FE00); in initGPIO()
81 cx231xx_mode_register(dev, GBULK_BIT_EN, 0xFFFDFFFF); in initGPIO()
84 void uninitGPIO(struct cx231xx *dev) in uninitGPIO() argument
88 cx231xx_capture_start(dev, 0, Vbi); in uninitGPIO()
89 verve_write_byte(dev, 0x07, 0x14); in uninitGPIO()
90 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in uninitGPIO()
98 static int afe_write_byte(struct cx231xx *dev, u16 saddr, u8 data) in afe_write_byte() argument
100 return cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS, in afe_write_byte()
104 static int afe_read_byte(struct cx231xx *dev, u16 saddr, u8 *data) in afe_read_byte() argument
109 status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS, in afe_read_byte()
115 int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count) in cx231xx_afe_init_super_block() argument
124 status = afe_write_byte(dev, SUP_BLK_TUNE2, temp); in cx231xx_afe_init_super_block()
128 status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status); in cx231xx_afe_init_super_block()
134 status = afe_write_byte(dev, SUP_BLK_TUNE1, temp); in cx231xx_afe_init_super_block()
138 status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f); in cx231xx_afe_init_super_block()
144 status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18); in cx231xx_afe_init_super_block()
146 dev_dbg(dev->dev, in cx231xx_afe_init_super_block()
152 status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status); in cx231xx_afe_init_super_block()
155 dev_dbg(dev->dev, in cx231xx_afe_init_super_block()
162 dev_dbg(dev->dev, in cx231xx_afe_init_super_block()
174 status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40); in cx231xx_afe_init_super_block()
181 status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00); in cx231xx_afe_init_super_block()
186 int cx231xx_afe_init_channels(struct cx231xx *dev) in cx231xx_afe_init_channels() argument
191 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00); in cx231xx_afe_init_channels()
192 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00); in cx231xx_afe_init_channels()
193 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00); in cx231xx_afe_init_channels()
196 status = afe_write_byte(dev, ADC_COM_QUANT, 0x02); in cx231xx_afe_init_channels()
199 status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17); in cx231xx_afe_init_channels()
200 status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17); in cx231xx_afe_init_channels()
201 status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17); in cx231xx_afe_init_channels()
204 status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10); in cx231xx_afe_init_channels()
205 status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10); in cx231xx_afe_init_channels()
206 status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10); in cx231xx_afe_init_channels()
210 status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07); in cx231xx_afe_init_channels()
211 status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07); in cx231xx_afe_init_channels()
212 status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07); in cx231xx_afe_init_channels()
215 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0); in cx231xx_afe_init_channels()
216 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0); in cx231xx_afe_init_channels()
217 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0); in cx231xx_afe_init_channels()
220 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, in cx231xx_afe_init_channels()
222 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, in cx231xx_afe_init_channels()
224 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, in cx231xx_afe_init_channels()
228 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03); in cx231xx_afe_init_channels()
229 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03); in cx231xx_afe_init_channels()
230 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03); in cx231xx_afe_init_channels()
235 int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev) in cx231xx_afe_setup_AFE_for_baseband() argument
240 status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value); in cx231xx_afe_setup_AFE_for_baseband()
242 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value); in cx231xx_afe_setup_AFE_for_baseband()
256 int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux) in cx231xx_afe_set_input_mux() argument
265 status = afe_read_byte(dev, ADC_INPUT_CH1, &value); in cx231xx_afe_set_input_mux()
269 status = afe_write_byte(dev, ADC_INPUT_CH1, value); in cx231xx_afe_set_input_mux()
273 status = afe_read_byte(dev, ADC_INPUT_CH2, &value); in cx231xx_afe_set_input_mux()
277 status = afe_write_byte(dev, ADC_INPUT_CH2, value); in cx231xx_afe_set_input_mux()
283 status = afe_read_byte(dev, ADC_INPUT_CH3, &value); in cx231xx_afe_set_input_mux()
287 status = afe_write_byte(dev, ADC_INPUT_CH3, value); in cx231xx_afe_set_input_mux()
293 int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode) in cx231xx_afe_set_mode() argument
304 cx231xx_Setup_AFE_for_LowIF(dev); in cx231xx_afe_set_mode()
307 status = cx231xx_afe_setup_AFE_for_baseband(dev); in cx231xx_afe_set_mode()
320 if ((mode != dev->afe_mode) && in cx231xx_afe_set_mode()
321 (dev->video_input == CX231XX_VMUX_TELEVISION)) in cx231xx_afe_set_mode()
322 status = cx231xx_afe_adjust_ref_count(dev, in cx231xx_afe_set_mode()
325 dev->afe_mode = mode; in cx231xx_afe_set_mode()
330 int cx231xx_afe_update_power_control(struct cx231xx *dev, in cx231xx_afe_update_power_control() argument
336 switch (dev->model) { in cx231xx_afe_update_power_control()
354 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
357 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
363 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
365 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
367 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
370 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
372 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
374 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
377 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
382 status |= afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
387 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
390 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
396 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
398 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
400 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
403 dev_dbg(dev->dev, "Invalid AV mode input\n"); in cx231xx_afe_update_power_control()
411 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
414 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
420 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
422 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
424 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
427 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
429 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
431 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
434 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
439 status |= afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
444 status = afe_write_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
447 status |= afe_read_byte(dev, SUP_BLK_PWRDN, in cx231xx_afe_update_power_control()
453 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, in cx231xx_afe_update_power_control()
455 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, in cx231xx_afe_update_power_control()
457 status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, in cx231xx_afe_update_power_control()
460 dev_dbg(dev->dev, "Invalid AV mode input\n"); in cx231xx_afe_update_power_control()
468 int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input) in cx231xx_afe_adjust_ref_count() argument
474 dev->video_input = video_input; in cx231xx_afe_adjust_ref_count()
477 status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode); in cx231xx_afe_adjust_ref_count()
478 status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, in cx231xx_afe_adjust_ref_count()
481 status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode); in cx231xx_afe_adjust_ref_count()
482 status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1, in cx231xx_afe_adjust_ref_count()
490 dev->afe_ref_count = 0x23C; in cx231xx_afe_adjust_ref_count()
493 dev->afe_ref_count = 0x24C; in cx231xx_afe_adjust_ref_count()
496 dev->afe_ref_count = 0x258; in cx231xx_afe_adjust_ref_count()
499 dev->afe_ref_count = 0x260; in cx231xx_afe_adjust_ref_count()
505 status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count); in cx231xx_afe_adjust_ref_count()
513 static int vid_blk_write_byte(struct cx231xx *dev, u16 saddr, u8 data) in vid_blk_write_byte() argument
515 return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_write_byte()
519 static int vid_blk_read_byte(struct cx231xx *dev, u16 saddr, u8 *data) in vid_blk_read_byte() argument
524 status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_read_byte()
530 static int vid_blk_write_word(struct cx231xx *dev, u16 saddr, u32 data) in vid_blk_write_word() argument
532 return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_write_word()
536 static int vid_blk_read_word(struct cx231xx *dev, u16 saddr, u32 *data) in vid_blk_read_word() argument
538 return cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, in vid_blk_read_word()
541 int cx231xx_check_fw(struct cx231xx *dev) in cx231xx_check_fw() argument
545 status = vid_blk_read_byte(dev, DL_CTL_ADDRESS_LOW, &temp); in cx231xx_check_fw()
553 int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input) in cx231xx_set_video_input_mux() argument
560 if ((dev->current_pcb_config.type == USB_BUS_POWER) && in cx231xx_set_video_input_mux()
561 (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) { in cx231xx_set_video_input_mux()
563 status = cx231xx_set_power_mode(dev, in cx231xx_set_video_input_mux()
566 dev_err(dev->dev, in cx231xx_set_video_input_mux()
572 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
578 if ((dev->current_pcb_config.type == USB_BUS_POWER) && in cx231xx_set_video_input_mux()
579 (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) { in cx231xx_set_video_input_mux()
581 status = cx231xx_set_power_mode(dev, in cx231xx_set_video_input_mux()
584 dev_err(dev->dev, in cx231xx_set_video_input_mux()
590 switch (dev->model) { /* i2c device tuners */ in cx231xx_set_video_input_mux()
596 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
601 if (dev->tuner_type == TUNER_NXP_TDA18271) in cx231xx_set_video_input_mux()
602 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
606 status = cx231xx_set_decoder_video_input(dev, in cx231xx_set_video_input_mux()
614 dev_err(dev->dev, "%s: Unknown Input %d !\n", in cx231xx_set_video_input_mux()
620 dev->video_input = input; in cx231xx_set_video_input_mux()
625 int cx231xx_set_decoder_video_input(struct cx231xx *dev, in cx231xx_set_decoder_video_input() argument
631 if (pin_type != dev->video_input) { in cx231xx_set_decoder_video_input()
632 status = cx231xx_afe_adjust_ref_count(dev, pin_type); in cx231xx_set_decoder_video_input()
634 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
642 status = cx231xx_afe_set_input_mux(dev, input); in cx231xx_set_decoder_video_input()
644 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
652 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
660 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
662 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
664 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
667 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
671 dev->board.output_mode); in cx231xx_set_decoder_video_input()
674 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); in cx231xx_set_decoder_video_input()
676 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
683 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
692 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
695 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
701 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
709 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
716 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
719 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); in cx231xx_set_decoder_video_input()
721 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
728 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
737 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
740 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
746 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
753 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
761 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
763 status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND); in cx231xx_set_decoder_video_input()
769 if (dev->board.tuner_type == TUNER_XC5000) { in cx231xx_set_decoder_video_input()
772 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
780 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
782 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
784 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
787 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
790 dev->board.output_mode); in cx231xx_set_decoder_video_input()
793 status = cx231xx_dif_set_standard(dev, in cx231xx_set_decoder_video_input()
796 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
803 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
812 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
815 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
821 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
830 status = cx231xx_dif_set_standard(dev, dev->norm); in cx231xx_set_decoder_video_input()
832 dev_err(dev->dev, in cx231xx_set_decoder_video_input()
839 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value); in cx231xx_set_decoder_video_input()
845 status = vid_blk_write_word(dev, DIF_MISC_CTRL, value); in cx231xx_set_decoder_video_input()
848 status = vid_blk_read_word(dev, DFE_CTRL1, &value); in cx231xx_set_decoder_video_input()
858 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
867 status = vid_blk_write_word(dev, DFE_CTRL1, value); in cx231xx_set_decoder_video_input()
870 status = vid_blk_read_word(dev, PIN_CTRL, &value); in cx231xx_set_decoder_video_input()
874 status = vid_blk_write_word(dev, PIN_CTRL, value); in cx231xx_set_decoder_video_input()
877 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
880 dev->board.output_mode); in cx231xx_set_decoder_video_input()
883 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
889 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
900 status = vid_blk_read_word(dev, AFE_CTRL, &value); in cx231xx_set_decoder_video_input()
908 status = vid_blk_write_word(dev, AFE_CTRL, value); in cx231xx_set_decoder_video_input()
910 if (dev->tuner_type == TUNER_NXP_TDA18271) { in cx231xx_set_decoder_video_input()
911 status = vid_blk_read_word(dev, PIN_CTRL, in cx231xx_set_decoder_video_input()
913 status = vid_blk_write_word(dev, PIN_CTRL, in cx231xx_set_decoder_video_input()
924 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_decoder_video_input()
929 status = vid_blk_read_word(dev, OUT_CTRL1, &value); in cx231xx_set_decoder_video_input()
932 status = vid_blk_write_word(dev, OUT_CTRL1, value); in cx231xx_set_decoder_video_input()
938 void cx231xx_enable656(struct cx231xx *dev) in cx231xx_enable656() argument
943 vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF); in cx231xx_enable656()
947 vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp); in cx231xx_enable656()
950 vid_blk_write_byte(dev, TS1_PIN_CTL1, temp); in cx231xx_enable656()
954 void cx231xx_disable656(struct cx231xx *dev) in cx231xx_disable656() argument
958 vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00); in cx231xx_disable656()
960 vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp); in cx231xx_disable656()
963 vid_blk_write_byte(dev, TS1_PIN_CTL1, temp); in cx231xx_disable656()
972 int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev) in cx231xx_do_mode_ctrl_overrides() argument
976 dev_dbg(dev->dev, "%s: 0x%x\n", in cx231xx_do_mode_ctrl_overrides()
977 __func__, (unsigned int)dev->norm); in cx231xx_do_mode_ctrl_overrides()
980 status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280); in cx231xx_do_mode_ctrl_overrides()
982 if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) { in cx231xx_do_mode_ctrl_overrides()
983 dev_dbg(dev->dev, "%s: NTSC\n", __func__); in cx231xx_do_mode_ctrl_overrides()
987 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
991 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
996 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1002 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1009 } else if (dev->norm & V4L2_STD_SECAM) { in cx231xx_do_mode_ctrl_overrides()
1010 dev_dbg(dev->dev, "%s: SECAM\n", __func__); in cx231xx_do_mode_ctrl_overrides()
1011 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1015 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1022 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1030 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1037 dev_dbg(dev->dev, "%s: PAL\n", __func__); in cx231xx_do_mode_ctrl_overrides()
1038 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1042 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1049 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1057 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_do_mode_ctrl_overrides()
1069 int cx231xx_unmute_audio(struct cx231xx *dev) in cx231xx_unmute_audio() argument
1071 return vid_blk_write_byte(dev, PATH1_VOL_CTL, 0x24); in cx231xx_unmute_audio()
1075 static int stopAudioFirmware(struct cx231xx *dev) in stopAudioFirmware() argument
1077 return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x03); in stopAudioFirmware()
1080 static int restartAudioFirmware(struct cx231xx *dev) in restartAudioFirmware() argument
1082 return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x13); in restartAudioFirmware()
1085 int cx231xx_set_audio_input(struct cx231xx *dev, u8 input) in cx231xx_set_audio_input() argument
1095 status = cx231xx_i2s_blk_set_audio_input(dev, input); in cx231xx_set_audio_input()
1102 status = cx231xx_set_audio_decoder_input(dev, ainput); in cx231xx_set_audio_input()
1107 int cx231xx_set_audio_decoder_input(struct cx231xx *dev, in cx231xx_set_audio_decoder_input() argument
1116 status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl); in cx231xx_set_audio_decoder_input()
1118 status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl); in cx231xx_set_audio_decoder_input()
1125 status = vid_blk_write_word(dev, AUD_IO_CTRL, value); in cx231xx_set_audio_decoder_input()
1130 status = vid_blk_read_word(dev, AC97_CTL, &dwval); in cx231xx_set_audio_decoder_input()
1132 status = vid_blk_write_word(dev, AC97_CTL, in cx231xx_set_audio_decoder_input()
1136 status = vid_blk_write_word(dev, BAND_OUT_SEL, in cx231xx_set_audio_decoder_input()
1143 status = vid_blk_write_word(dev, DL_CTL, 0x3000001); in cx231xx_set_audio_decoder_input()
1144 status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063073); in cx231xx_set_audio_decoder_input()
1147 status = vid_blk_read_word(dev, PATH1_VOL_CTL, &dwval); in cx231xx_set_audio_decoder_input()
1148 status = vid_blk_write_word(dev, PATH1_VOL_CTL, in cx231xx_set_audio_decoder_input()
1152 status = vid_blk_read_word(dev, PATH1_SC_CTL, &dwval); in cx231xx_set_audio_decoder_input()
1153 status = vid_blk_write_word(dev, PATH1_SC_CTL, in cx231xx_set_audio_decoder_input()
1159 status = stopAudioFirmware(dev); in cx231xx_set_audio_decoder_input()
1161 status = vid_blk_write_word(dev, BAND_OUT_SEL, in cx231xx_set_audio_decoder_input()
1177 status = vid_blk_write_word(dev, AUD_IO_CTRL, in cx231xx_set_audio_decoder_input()
1184 status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F063870); in cx231xx_set_audio_decoder_input()
1187 status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063870); in cx231xx_set_audio_decoder_input()
1189 status = restartAudioFirmware(dev); in cx231xx_set_audio_decoder_input()
1191 switch (dev->board.tuner_type) { in cx231xx_set_audio_decoder_input()
1194 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_audio_decoder_input()
1202 status = cx231xx_read_modify_write_i2c_dword(dev, in cx231xx_set_audio_decoder_input()
1209 switch (dev->model) { /* i2c device tuners */ in cx231xx_set_audio_decoder_input()
1221 dev_info(dev->dev, in cx231xx_set_audio_decoder_input()
1236 status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F011012); in cx231xx_set_audio_decoder_input()
1241 status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl); in cx231xx_set_audio_decoder_input()
1243 status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl); in cx231xx_set_audio_decoder_input()
1251 int cx231xx_init_ctrl_pin_status(struct cx231xx *dev) in cx231xx_init_ctrl_pin_status() argument
1256 status = vid_blk_read_word(dev, PIN_CTRL, &value); in cx231xx_init_ctrl_pin_status()
1257 value |= (~dev->board.ctl_pin_status_mask); in cx231xx_init_ctrl_pin_status()
1258 status = vid_blk_write_word(dev, PIN_CTRL, value); in cx231xx_init_ctrl_pin_status()
1263 int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, in cx231xx_set_agc_analog_digital_mux_select() argument
1269 status = cx231xx_set_gpio_direction(dev, in cx231xx_set_agc_analog_digital_mux_select()
1270 dev->board. in cx231xx_set_agc_analog_digital_mux_select()
1274 status = cx231xx_set_gpio_value(dev, in cx231xx_set_agc_analog_digital_mux_select()
1275 dev->board.agc_analog_digital_select_gpio, in cx231xx_set_agc_analog_digital_mux_select()
1284 int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3) in cx231xx_enable_i2c_port_3() argument
1297 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, in cx231xx_enable_i2c_port_3()
1313 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_enable_i2c_port_3()
1318 dev->port_3_switch_enabled = is_port_3; in cx231xx_enable_i2c_port_3()
1325 void update_HH_register_after_set_DIF(struct cx231xx *dev) in update_HH_register_after_set_DIF() argument
1341 void cx231xx_dump_HH_reg(struct cx231xx *dev) in cx231xx_dump_HH_reg() argument
1347 vid_blk_write_word(dev, 0x104, value); in cx231xx_dump_HH_reg()
1350 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1351 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1356 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1357 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1362 vid_blk_read_word(dev, i, &value); in cx231xx_dump_HH_reg()
1363 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); in cx231xx_dump_HH_reg()
1367 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); in cx231xx_dump_HH_reg()
1368 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); in cx231xx_dump_HH_reg()
1369 vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390); in cx231xx_dump_HH_reg()
1370 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); in cx231xx_dump_HH_reg()
1371 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); in cx231xx_dump_HH_reg()
1375 static void cx231xx_dump_SC_reg(struct cx231xx *dev)
1378 dev_dbg(dev->dev, "%s!\n", __func__);
1380 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,
1382 dev_dbg(dev->dev,
1385 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,
1387 dev_dbg(dev->dev,
1390 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,
1392 dev_dbg(dev->dev,
1395 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,
1397 dev_dbg(dev->dev,
1401 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,
1403 dev_dbg(dev->dev,
1406 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,
1408 dev_dbg(dev->dev,
1411 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
1413 dev_dbg(dev->dev,
1416 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,
1418 dev_dbg(dev->dev,
1422 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,
1424 dev_dbg(dev->dev,
1427 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,
1429 dev_dbg(dev->dev,
1432 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,
1434 dev_dbg(dev->dev,
1437 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,
1439 dev_dbg(dev->dev,
1443 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,
1445 dev_dbg(dev->dev,
1448 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,
1450 dev_dbg(dev->dev,
1453 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,
1455 dev_dbg(dev->dev,
1458 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,
1460 dev_dbg(dev->dev,
1464 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,
1466 dev_dbg(dev->dev,
1469 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
1471 dev_dbg(dev->dev,
1477 void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev) in cx231xx_Setup_AFE_for_LowIF() argument
1482 afe_read_byte(dev, ADC_STATUS2_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1484 afe_write_byte(dev, ADC_STATUS2_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1486 afe_read_byte(dev, ADC_STATUS2_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1488 afe_write_byte(dev, ADC_STATUS2_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1500 afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1502 afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1504 afe_read_byte(dev, ADC_INPUT_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1506 afe_write_byte(dev, ADC_INPUT_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1508 afe_read_byte(dev, ADC_FB_FRCRST_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1510 afe_write_byte(dev, ADC_FB_FRCRST_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1512 afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1514 afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1516 afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1518 afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1520 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1522 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1524 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1526 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1528 afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &value); in cx231xx_Setup_AFE_for_LowIF()
1530 afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value); in cx231xx_Setup_AFE_for_LowIF()
1533 void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, in cx231xx_set_Colibri_For_LowIF() argument
1541 dev_dbg(dev->dev, "Enter cx231xx_set_Colibri_For_LowIF()\n"); in cx231xx_set_Colibri_For_LowIF()
1546 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_Colibri_For_LowIF()
1550 cx231xx_afe_set_mode(dev, AFE_MODE_LOW_IF); in cx231xx_set_Colibri_For_LowIF()
1553 standard = dev->norm; in cx231xx_set_Colibri_For_LowIF()
1554 cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, in cx231xx_set_Colibri_For_LowIF()
1561 dev_dbg(dev->dev, "colibri_carrier_offset=%d, standard=0x%x\n", in cx231xx_set_Colibri_For_LowIF()
1565 cx231xx_set_DIF_bandpass(dev, (if_freq+colibri_carrier_offset), in cx231xx_set_Colibri_For_LowIF()
1587 void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, in cx231xx_set_DIF_bandpass() argument
1595 dev_dbg(dev->dev, "if_freq=%d;spectral_invert=0x%x;mode=0x%x\n", in cx231xx_set_DIF_bandpass()
1601 vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); in cx231xx_set_DIF_bandpass()
1610 vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); in cx231xx_set_DIF_bandpass()
1615 vid_blk_read_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1618 vid_blk_write_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1623 vid_blk_read_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1626 vid_blk_write_word(dev, DIF_MISC_CTRL, in cx231xx_set_DIF_bandpass()
1639 dev_dbg(dev->dev, "Enter IF=%zu\n", ARRAY_SIZE(Dif_set_array)); in cx231xx_set_DIF_bandpass()
1642 vid_blk_write_word(dev, in cx231xx_set_DIF_bandpass()
1651 int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, in cx231xx_dif_configure_C2HH_for_low_IF() argument
1660 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1664 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1668 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1672 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1678 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1682 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1687 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1691 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1695 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1703 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1707 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1712 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1716 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1723 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1727 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1732 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1736 status = cx231xx_reg_mask_write(dev, in cx231xx_dif_configure_C2HH_for_low_IF()
1745 int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard) in cx231xx_dif_set_standard() argument
1751 dev_dbg(dev->dev, "%s: setStandard to %x\n", __func__, standard); in cx231xx_dif_set_standard()
1753 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value); in cx231xx_dif_set_standard()
1755 dev->norm = standard; in cx231xx_dif_set_standard()
1757 switch (dev->model) { in cx231xx_dif_set_standard()
1777 status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, in cx231xx_dif_set_standard()
1783 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0xDF7DF83); in cx231xx_dif_set_standard()
1784 status = vid_blk_read_word(dev, DIF_MISC_CTRL, in cx231xx_dif_set_standard()
1787 status = vid_blk_write_word(dev, DIF_MISC_CTRL, in cx231xx_dif_set_standard()
1790 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1792 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1794 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1796 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1798 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1800 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1802 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1804 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1806 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1809 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1812 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1815 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1818 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1820 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1823 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1826 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1829 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1835 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1837 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1839 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1841 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1843 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1845 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1847 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1849 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1851 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1854 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1857 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1860 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1863 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1865 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1868 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1871 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1874 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1881 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C); in cx231xx_dif_set_standard()
1882 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85); in cx231xx_dif_set_standard()
1883 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a); in cx231xx_dif_set_standard()
1884 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); in cx231xx_dif_set_standard()
1885 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380); in cx231xx_dif_set_standard()
1886 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, in cx231xx_dif_set_standard()
1888 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, in cx231xx_dif_set_standard()
1890 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, in cx231xx_dif_set_standard()
1892 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, in cx231xx_dif_set_standard()
1894 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x012c405d); in cx231xx_dif_set_standard()
1895 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, in cx231xx_dif_set_standard()
1897 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, in cx231xx_dif_set_standard()
1899 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, in cx231xx_dif_set_standard()
1901 status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB, in cx231xx_dif_set_standard()
1908 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C); in cx231xx_dif_set_standard()
1909 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85); in cx231xx_dif_set_standard()
1910 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a); in cx231xx_dif_set_standard()
1911 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); in cx231xx_dif_set_standard()
1912 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380); in cx231xx_dif_set_standard()
1913 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, in cx231xx_dif_set_standard()
1915 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, in cx231xx_dif_set_standard()
1917 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, in cx231xx_dif_set_standard()
1919 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, in cx231xx_dif_set_standard()
1921 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, in cx231xx_dif_set_standard()
1923 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, in cx231xx_dif_set_standard()
1925 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, in cx231xx_dif_set_standard()
1927 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, in cx231xx_dif_set_standard()
1929 status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB, in cx231xx_dif_set_standard()
1938 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1940 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1942 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1944 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1946 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1948 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1950 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1952 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1954 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1957 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1960 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1963 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1965 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1968 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1971 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1974 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1976 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1985 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1987 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1989 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1991 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1993 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1995 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1997 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
1999 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2001 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2004 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2007 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2010 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2012 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2015 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2018 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2021 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2023 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2041 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0x6503BC0C); in cx231xx_dif_set_standard()
2042 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xBD038C85); in cx231xx_dif_set_standard()
2043 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1DB4640A); in cx231xx_dif_set_standard()
2044 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); in cx231xx_dif_set_standard()
2045 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C0380); in cx231xx_dif_set_standard()
2046 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, in cx231xx_dif_set_standard()
2048 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, in cx231xx_dif_set_standard()
2050 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, in cx231xx_dif_set_standard()
2052 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, in cx231xx_dif_set_standard()
2054 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x01296e1f); in cx231xx_dif_set_standard()
2056 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, in cx231xx_dif_set_standard()
2058 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, in cx231xx_dif_set_standard()
2060 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, in cx231xx_dif_set_standard()
2063 status = vid_blk_write_word(dev, DIF_AGC_CTRL_IF, 0xC2262600); in cx231xx_dif_set_standard()
2064 status = vid_blk_write_word(dev, DIF_AGC_CTRL_INT, in cx231xx_dif_set_standard()
2066 status = vid_blk_write_word(dev, DIF_AGC_CTRL_RF, 0xC2262600); in cx231xx_dif_set_standard()
2073 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2075 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2077 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2079 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2081 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2083 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2085 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2087 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2089 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2092 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2095 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2098 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2101 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2103 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2106 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2109 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2112 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, in cx231xx_dif_set_standard()
2126 if (dev->active_mode == V4L2_TUNER_RADIO) in cx231xx_dif_set_standard()
2130 status = vid_blk_write_word(dev, DIF_MISC_CTRL, dif_misc_ctrl_value); in cx231xx_dif_set_standard()
2135 int cx231xx_tuner_pre_channel_change(struct cx231xx *dev) in cx231xx_tuner_pre_channel_change() argument
2141 status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); in cx231xx_tuner_pre_channel_change()
2145 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval); in cx231xx_tuner_pre_channel_change()
2150 int cx231xx_tuner_post_channel_change(struct cx231xx *dev) in cx231xx_tuner_post_channel_change() argument
2154 dev_dbg(dev->dev, "%s: dev->tuner_type =0%d\n", in cx231xx_tuner_post_channel_change()
2155 __func__, dev->tuner_type); in cx231xx_tuner_post_channel_change()
2158 status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); in cx231xx_tuner_post_channel_change()
2161 if (dev->norm & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_B | in cx231xx_tuner_post_channel_change()
2163 if (dev->tuner_type == TUNER_NXP_TDA18271) { in cx231xx_tuner_post_channel_change()
2169 if (dev->tuner_type == TUNER_NXP_TDA18271) { in cx231xx_tuner_post_channel_change()
2176 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval); in cx231xx_tuner_post_channel_change()
2184 int cx231xx_i2s_blk_initialize(struct cx231xx *dev) in cx231xx_i2s_blk_initialize() argument
2189 status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_initialize()
2193 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_initialize()
2196 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_initialize()
2202 int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, in cx231xx_i2s_blk_update_power_control() argument
2209 status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_update_power_control()
2212 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_update_power_control()
2215 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_update_power_control()
2223 int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input) in cx231xx_i2s_blk_set_audio_input() argument
2229 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_set_audio_input()
2231 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, in cx231xx_i2s_blk_set_audio_input()
2239 dev->ctl_ainput = audio_input; in cx231xx_i2s_blk_set_audio_input()
2247 int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode) in cx231xx_set_power_mode() argument
2253 if (dev->power_mode != mode) in cx231xx_set_power_mode()
2254 dev->power_mode = mode; in cx231xx_set_power_mode()
2256 dev_dbg(dev->dev, "%s: mode = %d, No Change req.\n", in cx231xx_set_power_mode()
2261 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, in cx231xx_set_power_mode()
2278 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2288 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, in cx231xx_set_power_mode()
2297 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2301 dev->xc_fw_load_done = 0; in cx231xx_set_power_mode()
2311 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2321 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2332 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2342 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2353 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2358 if (dev->board.tuner_type != TUNER_ABSENT) { in cx231xx_set_power_mode()
2360 if (dev->board.tuner_gpio) in cx231xx_set_power_mode()
2361 cx231xx_gpio_set(dev, dev->board.tuner_gpio); in cx231xx_set_power_mode()
2363 if (dev->cx231xx_reset_analog_tuner) in cx231xx_set_power_mode()
2364 dev->cx231xx_reset_analog_tuner(dev); in cx231xx_set_power_mode()
2376 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2386 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2396 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2407 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2417 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2422 if (dev->board.tuner_type != TUNER_ABSENT) { in cx231xx_set_power_mode()
2424 if (dev->board.tuner_gpio) in cx231xx_set_power_mode()
2425 cx231xx_gpio_set(dev, dev->board.tuner_gpio); in cx231xx_set_power_mode()
2427 if (dev->cx231xx_reset_analog_tuner) in cx231xx_set_power_mode()
2428 dev->cx231xx_reset_analog_tuner(dev); in cx231xx_set_power_mode()
2446 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, in cx231xx_set_power_mode()
2452 status = cx231xx_afe_update_power_control(dev, mode); in cx231xx_set_power_mode()
2455 status = cx231xx_i2s_blk_update_power_control(dev, mode); in cx231xx_set_power_mode()
2457 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, in cx231xx_set_power_mode()
2463 int cx231xx_power_suspend(struct cx231xx *dev) in cx231xx_power_suspend() argument
2469 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, in cx231xx_power_suspend()
2481 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, in cx231xx_power_suspend()
2490 int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask) in cx231xx_start_stream() argument
2496 dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); in cx231xx_start_stream()
2497 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, in cx231xx_start_stream()
2509 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, in cx231xx_start_stream()
2515 int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask) in cx231xx_stop_stream() argument
2521 dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); in cx231xx_stop_stream()
2523 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); in cx231xx_stop_stream()
2534 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, in cx231xx_stop_stream()
2540 int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type) in cx231xx_initialize_stream_xfer() argument
2546 if (dev->udev->speed == USB_SPEED_HIGH) { in cx231xx_initialize_stream_xfer()
2549 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2552 cx231xx_mode_register(dev, TS_MODE_REG, 0x9300); in cx231xx_initialize_stream_xfer()
2556 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2558 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300); in cx231xx_initialize_stream_xfer()
2562 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2565 cx231xx_mode_register(dev, TS_MODE_REG, 0x1300); in cx231xx_initialize_stream_xfer()
2569 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2571 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); in cx231xx_initialize_stream_xfer()
2575 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2578 if (dev->board.has_417) { in cx231xx_initialize_stream_xfer()
2579 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2584 status = cx231xx_mode_register(dev, in cx231xx_initialize_stream_xfer()
2591 status = cx231xx_write_ctrl_reg(dev, in cx231xx_initialize_stream_xfer()
2599 status = cx231xx_write_ctrl_reg(dev, in cx231xx_initialize_stream_xfer()
2603 dev_dbg(dev->dev, "%s: BDA\n", __func__); in cx231xx_initialize_stream_xfer()
2604 status = cx231xx_mode_register(dev, in cx231xx_initialize_stream_xfer()
2606 status = cx231xx_mode_register(dev, in cx231xx_initialize_stream_xfer()
2612 dev_dbg(dev->dev, in cx231xx_initialize_stream_xfer()
2615 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); in cx231xx_initialize_stream_xfer()
2616 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400); in cx231xx_initialize_stream_xfer()
2620 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101); in cx231xx_initialize_stream_xfer()
2626 int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type) in cx231xx_capture_start() argument
2633 pcb_config = (struct pcb_config *)&dev->current_pcb_config; in cx231xx_capture_start()
2660 rc = cx231xx_initialize_stream_xfer(dev, media_type); in cx231xx_capture_start()
2667 rc = cx231xx_start_stream(dev, ep_mask); in cx231xx_capture_start()
2671 rc = cx231xx_stop_stream(dev, ep_mask); in cx231xx_capture_start()
2681 static int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 gpio_val) in cx231xx_set_gpio_bit() argument
2686 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0); in cx231xx_set_gpio_bit()
2691 static int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 *gpio_val) in cx231xx_get_gpio_bit() argument
2696 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1); in cx231xx_get_gpio_bit()
2713 int cx231xx_set_gpio_direction(struct cx231xx *dev, in cx231xx_set_gpio_direction() argument
2725 value = dev->gpio_dir & (~(1 << pin_number)); /* clear */ in cx231xx_set_gpio_direction()
2727 value = dev->gpio_dir | (1 << pin_number); in cx231xx_set_gpio_direction()
2729 status = cx231xx_set_gpio_bit(dev, value, dev->gpio_val); in cx231xx_set_gpio_direction()
2732 dev->gpio_dir = value; in cx231xx_set_gpio_direction()
2748 int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value) in cx231xx_set_gpio_value() argument
2758 if ((dev->gpio_dir & (1 << pin_number)) == 0x00) { in cx231xx_set_gpio_value()
2760 value = dev->gpio_dir | (1 << pin_number); in cx231xx_set_gpio_value()
2761 dev->gpio_dir = value; in cx231xx_set_gpio_value()
2762 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_set_gpio_value()
2763 dev->gpio_val); in cx231xx_set_gpio_value()
2768 value = dev->gpio_val & (~(1 << pin_number)); in cx231xx_set_gpio_value()
2770 value = dev->gpio_val | (1 << pin_number); in cx231xx_set_gpio_value()
2773 dev->gpio_val = value; in cx231xx_set_gpio_value()
2776 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_set_gpio_value()
2784 int cx231xx_gpio_i2c_start(struct cx231xx *dev) in cx231xx_gpio_i2c_start() argument
2789 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_start()
2790 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_start()
2791 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_start()
2792 dev->gpio_val |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_start()
2794 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_start()
2799 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_start()
2800 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_start()
2802 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_start()
2807 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_start()
2808 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_start()
2810 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_start()
2817 int cx231xx_gpio_i2c_end(struct cx231xx *dev) in cx231xx_gpio_i2c_end() argument
2822 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_end()
2823 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_end()
2825 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_end()
2826 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_end()
2828 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_end()
2833 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_end()
2834 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_end()
2836 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_end()
2842 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_end()
2843 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_end()
2846 cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_end()
2853 int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data) in cx231xx_gpio_i2c_write_byte() argument
2859 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_byte()
2860 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_write_byte()
2865 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2866 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_byte()
2867 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2868 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2871 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_byte()
2872 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2873 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2876 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2877 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2878 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2881 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2882 dev->gpio_val |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_write_byte()
2883 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2884 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2887 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_byte()
2888 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2889 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2892 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_byte()
2893 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_write_byte()
2894 dev->gpio_val); in cx231xx_gpio_i2c_write_byte()
2900 int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf) in cx231xx_gpio_i2c_read_byte() argument
2911 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_byte()
2912 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_byte()
2913 dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2916 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_read_byte()
2917 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_byte()
2918 dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2921 gpio_logic_value = dev->gpio_val; in cx231xx_gpio_i2c_read_byte()
2922 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_byte()
2923 &dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2924 if ((dev->gpio_val & (1 << dev->board.tuner_sda_gpio)) != 0) in cx231xx_gpio_i2c_read_byte()
2927 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_byte()
2933 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_byte()
2934 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_read_byte()
2942 int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev) in cx231xx_gpio_i2c_read_ack() argument
2951 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_read_ack()
2952 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_ack()
2954 gpio_logic_value = dev->gpio_val; in cx231xx_gpio_i2c_read_ack()
2955 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2959 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, in cx231xx_gpio_i2c_read_ack()
2960 &dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2962 } while (((dev->gpio_val & in cx231xx_gpio_i2c_read_ack()
2963 (1 << dev->board.tuner_scl_gpio)) == 0) && in cx231xx_gpio_i2c_read_ack()
2967 dev_dbg(dev->dev, in cx231xx_gpio_i2c_read_ack()
2976 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, &dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2978 if ((dev->gpio_val & 1 << dev->board.tuner_sda_gpio) == 0) { in cx231xx_gpio_i2c_read_ack()
2979 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_ack()
2980 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_read_ack()
2983 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_ack()
2984 dev->gpio_val |= (1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_read_ack()
2989 dev->gpio_val = gpio_logic_value; in cx231xx_gpio_i2c_read_ack()
2990 dev->gpio_dir |= (1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_ack()
2991 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_read_ack()
2992 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_read_ack()
2997 int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev) in cx231xx_gpio_i2c_write_ack() argument
3002 dev->gpio_dir |= 1 << dev->board.tuner_sda_gpio; in cx231xx_gpio_i2c_write_ack()
3003 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
3006 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_ack()
3007 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_ack()
3008 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
3011 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_ack()
3012 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
3015 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_ack()
3016 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
3019 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_ack()
3020 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_ack()
3025 int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev) in cx231xx_gpio_i2c_write_nak() argument
3030 dev->gpio_dir |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_nak()
3031 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); in cx231xx_gpio_i2c_write_nak()
3032 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_nak()
3035 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); in cx231xx_gpio_i2c_write_nak()
3036 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_nak()
3039 dev->gpio_val |= 1 << dev->board.tuner_scl_gpio; in cx231xx_gpio_i2c_write_nak()
3040 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); in cx231xx_gpio_i2c_write_nak()
3051 int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len) in cx231xx_gpio_i2c_read() argument
3057 mutex_lock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_read()
3060 status = cx231xx_gpio_i2c_start(dev); in cx231xx_gpio_i2c_read()
3063 status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1); in cx231xx_gpio_i2c_read()
3066 status = cx231xx_gpio_i2c_read_ack(dev); in cx231xx_gpio_i2c_read()
3072 status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]); in cx231xx_gpio_i2c_read()
3076 status = cx231xx_gpio_i2c_write_ack(dev); in cx231xx_gpio_i2c_read()
3081 status = cx231xx_gpio_i2c_write_nak(dev); in cx231xx_gpio_i2c_read()
3084 status = cx231xx_gpio_i2c_end(dev); in cx231xx_gpio_i2c_read()
3087 mutex_unlock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_read()
3095 int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len) in cx231xx_gpio_i2c_write() argument
3100 mutex_lock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_write()
3103 cx231xx_gpio_i2c_start(dev); in cx231xx_gpio_i2c_write()
3106 cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1); in cx231xx_gpio_i2c_write()
3109 cx231xx_gpio_i2c_read_ack(dev); in cx231xx_gpio_i2c_write()
3113 cx231xx_gpio_i2c_write_byte(dev, buf[i]); in cx231xx_gpio_i2c_write()
3116 cx231xx_gpio_i2c_read_ack(dev); in cx231xx_gpio_i2c_write()
3120 cx231xx_gpio_i2c_end(dev); in cx231xx_gpio_i2c_write()
3123 mutex_unlock(&dev->gpio_i2c_lock); in cx231xx_gpio_i2c_write()