342 	const u64 __iomem *reg_addr;  in qib_read_umem64()  local
347 	reg_addr = (const u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit);  in qib_read_umem64()
348 	if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) {  in qib_read_umem64()
354 	reg_end = reg_addr + (count / sizeof(u64));  in qib_read_umem64()
357 	while (reg_addr < reg_end) {  in qib_read_umem64()
358 		u64 data = readq(reg_addr);  in qib_read_umem64()
364 		reg_addr++;  in qib_read_umem64()
386 	u64 __iomem *reg_addr;  in qib_write_umem64()  local
391 	reg_addr = (u64 __iomem *)qib_remap_ioaddr32(dd, regoffs, &limit);  in qib_write_umem64()
392 	if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) {  in qib_write_umem64()
398 	reg_end = reg_addr + (count / sizeof(u64));  in qib_write_umem64()
401 	while (reg_addr < reg_end) {  in qib_write_umem64()
408 		writeq(data, reg_addr);  in qib_write_umem64()
410 		reg_addr++;  in qib_write_umem64()
431 	const u32 __iomem *reg_addr;  in qib_read_umem32()  local
436 	reg_addr = qib_remap_ioaddr32(dd, regoffs, &limit);  in qib_read_umem32()
437 	if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) {  in qib_read_umem32()
443 	reg_end = reg_addr + (count / sizeof(u32));  in qib_read_umem32()
446 	while (reg_addr < reg_end) {  in qib_read_umem32()
447 		u32 data = readl(reg_addr);  in qib_read_umem32()
454 		reg_addr++;  in qib_read_umem32()
477 	u32 __iomem *reg_addr;  in qib_write_umem32()  local
482 	reg_addr = qib_remap_ioaddr32(dd, regoffs, &limit);  in qib_write_umem32()
483 	if (reg_addr == NULL || limit == 0 || !(dd->flags & QIB_PRESENT)) {  in qib_write_umem32()
489 	reg_end = reg_addr + (count / sizeof(u32));  in qib_write_umem32()
491 	while (reg_addr < reg_end) {  in qib_write_umem32()
498 		writel(data, reg_addr);  in qib_write_umem32()
500 		reg_addr++;  in qib_write_umem32()