Lines Matching refs:st
473 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_reg_access() local
476 return regmap_read(st->regmap, reg, read_val); in adf4377_reg_access()
478 return regmap_write(st->regmap, reg, write_val); in adf4377_reg_access()
485 static int adf4377_soft_reset(struct adf4377_state *st) in adf4377_soft_reset() argument
490 ret = regmap_update_bits(st->regmap, 0x0, ADF4377_0000_SOFT_RESET_MSK | in adf4377_soft_reset()
497 return regmap_read_poll_timeout(st->regmap, 0x0, read_val, in adf4377_soft_reset()
502 static int adf4377_get_freq(struct adf4377_state *st, u64 *freq) in adf4377_get_freq() argument
508 mutex_lock(&st->lock); in adf4377_get_freq()
509 ret = regmap_read(st->regmap, 0x12, &ref_div_factor); in adf4377_get_freq()
513 ret = regmap_bulk_read(st->regmap, 0x10, st->buf, sizeof(st->buf)); in adf4377_get_freq()
517 clkin_freq = clk_get_rate(st->clkin); in adf4377_get_freq()
520 get_unaligned_le16(&st->buf)); in adf4377_get_freq()
524 mutex_unlock(&st->lock); in adf4377_get_freq()
529 static int adf4377_set_freq(struct adf4377_state *st, u64 freq) in adf4377_set_freq() argument
535 mutex_lock(&st->lock); in adf4377_set_freq()
542 ret = regmap_update_bits(st->regmap, 0x1C, ADF4377_001C_EN_DNCLK_MSK | in adf4377_set_freq()
549 ret = regmap_update_bits(st->regmap, 0x11, ADF4377_0011_EN_AUTOCAL_MSK | in adf4377_set_freq()
552 FIELD_PREP(ADF4377_0011_DCLK_DIV2_MSK, st->dclk_div2)); in adf4377_set_freq()
556 ret = regmap_update_bits(st->regmap, 0x2E, ADF4377_002E_EN_ADC_CNV_MSK | in adf4377_set_freq()
566 ret = regmap_update_bits(st->regmap, 0x20, ADF4377_0020_EN_ADC_CLK_MSK, in adf4377_set_freq()
571 ret = regmap_update_bits(st->regmap, 0x2F, ADF4377_002F_DCLK_DIV1_MSK, in adf4377_set_freq()
572 FIELD_PREP(ADF4377_002F_DCLK_DIV1_MSK, st->dclk_div1)); in adf4377_set_freq()
576 ret = regmap_update_bits(st->regmap, 0x24, ADF4377_0024_DCLK_MODE_MSK, in adf4377_set_freq()
577 FIELD_PREP(ADF4377_0024_DCLK_MODE_MSK, st->dclk_mode)); in adf4377_set_freq()
581 ret = regmap_write(st->regmap, 0x27, in adf4377_set_freq()
583 st->synth_lock_timeout)); in adf4377_set_freq()
587 ret = regmap_update_bits(st->regmap, 0x28, ADF4377_0028_SYNTH_LOCK_TO_MSB_MSK, in adf4377_set_freq()
589 st->synth_lock_timeout >> 8)); in adf4377_set_freq()
593 ret = regmap_write(st->regmap, 0x29, in adf4377_set_freq()
595 st->vco_alc_timeout)); in adf4377_set_freq()
599 ret = regmap_update_bits(st->regmap, 0x2A, ADF4377_002A_VCO_ALC_TO_MSB_MSK, in adf4377_set_freq()
601 st->vco_alc_timeout >> 8)); in adf4377_set_freq()
605 ret = regmap_write(st->regmap, 0x26, in adf4377_set_freq()
606 FIELD_PREP(ADF4377_0026_VCO_BAND_DIV_MSK, st->vco_band_div)); in adf4377_set_freq()
610 ret = regmap_write(st->regmap, 0x2D, in adf4377_set_freq()
611 FIELD_PREP(ADF4377_002D_ADC_CLK_DIV_MSK, st->adc_clk_div)); in adf4377_set_freq()
615 st->clkout_div_sel = 0; in adf4377_set_freq()
621 st->clkout_div_sel++; in adf4377_set_freq()
624 st->n_int = div_u64(freq, st->f_pfd); in adf4377_set_freq()
626 ret = regmap_update_bits(st->regmap, 0x11, ADF4377_0011_EN_RDBLR_MSK | in adf4377_set_freq()
629 FIELD_PREP(ADF4377_0011_N_INT_MSB_MSK, st->n_int >> 8)); in adf4377_set_freq()
633 ret = regmap_update_bits(st->regmap, 0x12, ADF4377_0012_R_DIV_MSK | in adf4377_set_freq()
635 FIELD_PREP(ADF4377_0012_CLKOUT_DIV_MSK, st->clkout_div_sel) | in adf4377_set_freq()
636 FIELD_PREP(ADF4377_0012_R_DIV_MSK, st->ref_div_factor)); in adf4377_set_freq()
640 ret = regmap_write(st->regmap, 0x10, in adf4377_set_freq()
641 FIELD_PREP(ADF4377_0010_N_INT_LSB_MSK, st->n_int)); in adf4377_set_freq()
645 ret = regmap_read_poll_timeout(st->regmap, 0x49, read_val, in adf4377_set_freq()
651 ret = regmap_update_bits(st->regmap, 0x1C, ADF4377_001C_EN_DNCLK_MSK | in adf4377_set_freq()
659 ret = regmap_update_bits(st->regmap, 0x20, ADF4377_0020_EN_ADC_CLK_MSK, in adf4377_set_freq()
665 ret = regmap_update_bits(st->regmap, 0x19, ADF4377_0019_CLKOUT2_OP_MSK | in adf4377_set_freq()
673 mutex_unlock(&st->lock); in adf4377_set_freq()
678 static void adf4377_gpio_init(struct adf4377_state *st) in adf4377_gpio_init() argument
680 if (st->gpio_ce) { in adf4377_gpio_init()
681 gpiod_set_value(st->gpio_ce, 1); in adf4377_gpio_init()
687 if (st->gpio_enclk1) in adf4377_gpio_init()
688 gpiod_set_value(st->gpio_enclk1, 1); in adf4377_gpio_init()
690 if (st->gpio_enclk2) in adf4377_gpio_init()
691 gpiod_set_value(st->gpio_enclk2, 1); in adf4377_gpio_init()
694 static int adf4377_init(struct adf4377_state *st) in adf4377_init() argument
696 struct spi_device *spi = st->spi; in adf4377_init()
699 adf4377_gpio_init(st); in adf4377_init()
701 ret = adf4377_soft_reset(st); in adf4377_init()
707 ret = regmap_multi_reg_write(st->regmap, adf4377_reg_defaults, in adf4377_init()
714 ret = regmap_update_bits(st->regmap, 0x00, in adf4377_init()
725 st->clkin_freq = clk_get_rate(st->clkin); in adf4377_init()
728 ret = regmap_write(st->regmap, 0x1a, in adf4377_init()
743 ret = regmap_update_bits(st->regmap, 0x1D, in adf4377_init()
745 FIELD_PREP(ADF4377_001D_MUXOUT_MSK, st->muxout_select)); in adf4377_init()
750 st->ref_div_factor = 0; in adf4377_init()
752 st->ref_div_factor++; in adf4377_init()
753 st->f_pfd = st->clkin_freq / st->ref_div_factor; in adf4377_init()
754 } while (st->f_pfd > ADF4377_MAX_FREQ_PFD); in adf4377_init()
756 if (st->f_pfd > ADF4377_MAX_FREQ_PFD || st->f_pfd < ADF4377_MIN_FREQ_PFD) in adf4377_init()
759 st->f_div_rclk = st->f_pfd; in adf4377_init()
761 if (st->f_pfd <= ADF4377_FREQ_PFD_80MHZ) { in adf4377_init()
762 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_1; in adf4377_init()
763 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
764 st->dclk_mode = 0; in adf4377_init()
765 } else if (st->f_pfd <= ADF4377_FREQ_PFD_125MHZ) { in adf4377_init()
766 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_1; in adf4377_init()
767 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
768 st->dclk_mode = 1; in adf4377_init()
769 } else if (st->f_pfd <= ADF4377_FREQ_PFD_160MHZ) { in adf4377_init()
770 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
771 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
772 st->dclk_mode = 0; in adf4377_init()
773 st->f_div_rclk /= 2; in adf4377_init()
774 } else if (st->f_pfd <= ADF4377_FREQ_PFD_250MHZ) { in adf4377_init()
775 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
776 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_1; in adf4377_init()
777 st->dclk_mode = 1; in adf4377_init()
778 st->f_div_rclk /= 2; in adf4377_init()
779 } else if (st->f_pfd <= ADF4377_FREQ_PFD_320MHZ) { in adf4377_init()
780 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
781 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_2; in adf4377_init()
782 st->dclk_mode = 0; in adf4377_init()
783 st->f_div_rclk /= 4; in adf4377_init()
785 st->dclk_div1 = ADF4377_002F_DCLK_DIV1_2; in adf4377_init()
786 st->dclk_div2 = ADF4377_0011_DCLK_DIV2_2; in adf4377_init()
787 st->dclk_mode = 1; in adf4377_init()
788 st->f_div_rclk /= 4; in adf4377_init()
791 st->synth_lock_timeout = DIV_ROUND_UP(st->f_div_rclk, 50000); in adf4377_init()
792 st->vco_alc_timeout = DIV_ROUND_UP(st->f_div_rclk, 20000); in adf4377_init()
793 st->vco_band_div = DIV_ROUND_UP(st->f_div_rclk, 150000 * 16 * (1 << st->dclk_mode)); in adf4377_init()
794 st->adc_clk_div = DIV_ROUND_UP((st->f_div_rclk / 400000 - 2), 4); in adf4377_init()
802 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_read() local
808 ret = adf4377_get_freq(st, &val); in adf4377_read()
822 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_write() local
832 ret = adf4377_set_freq(st, freq); in adf4377_write()
870 static int adf4377_properties_parse(struct adf4377_state *st) in adf4377_properties_parse() argument
872 struct spi_device *spi = st->spi; in adf4377_properties_parse()
876 st->clkin = devm_clk_get_enabled(&spi->dev, "ref_in"); in adf4377_properties_parse()
877 if (IS_ERR(st->clkin)) in adf4377_properties_parse()
878 return dev_err_probe(&spi->dev, PTR_ERR(st->clkin), in adf4377_properties_parse()
881 st->gpio_ce = devm_gpiod_get_optional(&st->spi->dev, "chip-enable", in adf4377_properties_parse()
883 if (IS_ERR(st->gpio_ce)) in adf4377_properties_parse()
884 return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_ce), in adf4377_properties_parse()
887 st->gpio_enclk1 = devm_gpiod_get_optional(&st->spi->dev, "clk1-enable", in adf4377_properties_parse()
889 if (IS_ERR(st->gpio_enclk1)) in adf4377_properties_parse()
890 return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_enclk1), in adf4377_properties_parse()
893 st->gpio_enclk2 = devm_gpiod_get_optional(&st->spi->dev, "clk2-enable", in adf4377_properties_parse()
895 if (IS_ERR(st->gpio_enclk2)) in adf4377_properties_parse()
896 return dev_err_probe(&spi->dev, PTR_ERR(st->gpio_enclk2), in adf4377_properties_parse()
901 st->muxout_select = ADF4377_MUXOUT_HIGH_Z; in adf4377_properties_parse()
907 st->muxout_select = ret; in adf4377_properties_parse()
915 struct adf4377_state *st = container_of(nb, struct adf4377_state, nb); in adf4377_freq_change() local
919 mutex_lock(&st->lock); in adf4377_freq_change()
920 ret = notifier_from_errno(adf4377_init(st)); in adf4377_freq_change()
921 mutex_unlock(&st->lock); in adf4377_freq_change()
932 struct adf4377_state *st; in adf4377_probe() local
935 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in adf4377_probe()
943 st = iio_priv(indio_dev); in adf4377_probe()
950 st->regmap = regmap; in adf4377_probe()
951 st->spi = spi; in adf4377_probe()
952 mutex_init(&st->lock); in adf4377_probe()
954 ret = adf4377_properties_parse(st); in adf4377_probe()
958 st->nb.notifier_call = adf4377_freq_change; in adf4377_probe()
959 ret = devm_clk_notifier_register(&spi->dev, st->clkin, &st->nb); in adf4377_probe()
963 ret = adf4377_init(st); in adf4377_probe()