Lines Matching refs:se
81 struct geni_se se; member
174 writel_relaxed(0, gi2c->se.base + SE_GENI_CLK_SEL); in qcom_geni_i2c_conf()
177 writel_relaxed(val, gi2c->se.base + GENI_SER_M_CLK_CFG); in qcom_geni_i2c_conf()
182 writel_relaxed(val, gi2c->se.base + SE_I2C_SCL_COUNTERS); in qcom_geni_i2c_conf()
187 u32 m_cmd = readl_relaxed(gi2c->se.base + SE_GENI_M_CMD0); in geni_i2c_err_misc()
188 u32 m_stat = readl_relaxed(gi2c->se.base + SE_GENI_M_IRQ_STATUS); in geni_i2c_err_misc()
189 u32 geni_s = readl_relaxed(gi2c->se.base + SE_GENI_STATUS); in geni_i2c_err_misc()
190 u32 geni_ios = readl_relaxed(gi2c->se.base + SE_GENI_IOS); in geni_i2c_err_misc()
191 u32 dma = readl_relaxed(gi2c->se.base + SE_GENI_DMA_MODE_EN); in geni_i2c_err_misc()
195 rx_st = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_err_misc()
196 tx_st = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_err_misc()
198 rx_st = readl_relaxed(gi2c->se.base + SE_GENI_RX_FIFO_STATUS); in geni_i2c_err_misc()
199 tx_st = readl_relaxed(gi2c->se.base + SE_GENI_TX_FIFO_STATUS); in geni_i2c_err_misc()
201 dev_dbg(gi2c->se.dev, "DMA:%d tx_stat:0x%x, rx_stat:0x%x, irq-stat:0x%x\n", in geni_i2c_err_misc()
203 dev_dbg(gi2c->se.dev, "m_cmd:0x%x, geni_status:0x%x, geni_ios:0x%x\n", in geni_i2c_err_misc()
212 dev_dbg(gi2c->se.dev, "len:%d, slv-addr:0x%x, RD/WR:%d\n", in geni_i2c_err()
221 dev_dbg(gi2c->se.dev, "%s\n", gi2c_log[err].msg); in geni_i2c_err()
224 dev_err(gi2c->se.dev, "%s\n", gi2c_log[err].msg); in geni_i2c_err()
233 void __iomem *base = gi2c->se.base; in geni_i2c_irq()
273 dev_dbg(gi2c->se.dev, "i2c dma tx:0x%x, dma rx:0x%x\n", in geni_i2c_irq()
339 geni_se_abort_m_cmd(&gi2c->se); in geni_i2c_abort_xfer()
347 dev_err(gi2c->se.dev, "Timeout abort_m_cmd\n"); in geni_i2c_abort_xfer()
355 writel_relaxed(1, gi2c->se.base + SE_DMA_RX_FSM_RST); in geni_i2c_rx_fsm_rst()
358 val = readl_relaxed(gi2c->se.base + SE_DMA_RX_IRQ_STAT); in geni_i2c_rx_fsm_rst()
362 dev_err(gi2c->se.dev, "Timeout resetting RX_FSM\n"); in geni_i2c_rx_fsm_rst()
370 writel_relaxed(1, gi2c->se.base + SE_DMA_TX_FSM_RST); in geni_i2c_tx_fsm_rst()
373 val = readl_relaxed(gi2c->se.base + SE_DMA_TX_IRQ_STAT); in geni_i2c_tx_fsm_rst()
377 dev_err(gi2c->se.dev, "Timeout resetting TX_FSM\n"); in geni_i2c_tx_fsm_rst()
387 geni_se_rx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_rx_msg_cleanup()
399 geni_se_tx_dma_unprep(&gi2c->se, gi2c->dma_addr, gi2c->xfer_len); in geni_i2c_tx_msg_cleanup()
410 struct geni_se *se = &gi2c->se; in geni_i2c_rx_one_msg() local
416 geni_se_select_mode(se, GENI_SE_DMA); in geni_i2c_rx_one_msg()
418 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_rx_one_msg()
420 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN); in geni_i2c_rx_one_msg()
421 geni_se_setup_m_cmd(se, I2C_READ, m_param); in geni_i2c_rx_one_msg()
423 if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) { in geni_i2c_rx_one_msg()
424 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_rx_one_msg()
449 struct geni_se *se = &gi2c->se; in geni_i2c_tx_one_msg() local
455 geni_se_select_mode(se, GENI_SE_DMA); in geni_i2c_tx_one_msg()
457 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_tx_one_msg()
459 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN); in geni_i2c_tx_one_msg()
460 geni_se_setup_m_cmd(se, I2C_WRITE, m_param); in geni_i2c_tx_one_msg()
462 if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) { in geni_i2c_tx_one_msg()
463 geni_se_select_mode(se, GENI_SE_FIFO); in geni_i2c_tx_one_msg()
473 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG); in geni_i2c_tx_one_msg()
490 dev_err(gi2c->se.dev, "DMA txn failed:%d\n", result->result); in i2c_gpi_cb_result()
493 dev_dbg(gi2c->se.dev, "DMA xfer has pending: %d\n", result->residue); in i2c_gpi_cb_result()
504 dma_unmap_single(gi2c->se.dev->parent, tx_addr, msg->len, DMA_TO_DEVICE); in geni_i2c_gpi_unmap()
509 dma_unmap_single(gi2c->se.dev->parent, rx_addr, msg->len, DMA_FROM_DEVICE); in geni_i2c_gpi_unmap()
538 addr = dma_map_single(gi2c->se.dev->parent, dma_buf, msg->len, map_dirn); in geni_i2c_gpi()
539 if (dma_mapping_error(gi2c->se.dev->parent, addr)) { in geni_i2c_gpi()
550 dev_err(gi2c->se.dev, "dma config error: %d for op:%d\n", ret, op); in geni_i2c_gpi()
565 dev_err(gi2c->se.dev, "prep_slave_sg failed\n"); in geni_i2c_gpi()
580 dma_unmap_single(gi2c->se.dev->parent, addr, msg->len, map_dirn); in geni_i2c_gpi()
608 dev_dbg(gi2c->se.dev, "msg[%d].len:%d\n", i, gi2c->cur->len); in geni_i2c_gpi_xfer()
634 dev_err(gi2c->se.dev, "I2C timeout gpi flags:%d addr:0x%x\n", in geni_i2c_gpi_xfer()
650 dev_err(gi2c->se.dev, "GPI transfer failed: %d\n", ret); in geni_i2c_gpi_xfer()
689 ret = pm_runtime_get_sync(gi2c->se.dev); in geni_i2c_xfer()
691 dev_err(gi2c->se.dev, "error turning SE resources:%d\n", ret); in geni_i2c_xfer()
692 pm_runtime_put_noidle(gi2c->se.dev); in geni_i2c_xfer()
694 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_xfer()
705 pm_runtime_mark_last_busy(gi2c->se.dev); in geni_i2c_xfer()
706 pm_runtime_put_autosuspend(gi2c->se.dev); in geni_i2c_xfer()
743 geni_se_select_mode(&gi2c->se, GENI_GPI_DMA); in setup_gpi_dma()
744 gi2c->tx_c = dma_request_chan(gi2c->se.dev, "tx"); in setup_gpi_dma()
746 ret = dev_err_probe(gi2c->se.dev, PTR_ERR(gi2c->tx_c), in setup_gpi_dma()
751 gi2c->rx_c = dma_request_chan(gi2c->se.dev, "rx"); in setup_gpi_dma()
753 ret = dev_err_probe(gi2c->se.dev, PTR_ERR(gi2c->rx_c), in setup_gpi_dma()
758 dev_dbg(gi2c->se.dev, "Grabbed GPI dma channels\n"); in setup_gpi_dma()
779 gi2c->se.dev = dev; in geni_i2c_probe()
780 gi2c->se.wrapper = dev_get_drvdata(dev->parent); in geni_i2c_probe()
781 gi2c->se.base = devm_platform_ioremap_resource(pdev, 0); in geni_i2c_probe()
782 if (IS_ERR(gi2c->se.base)) in geni_i2c_probe()
783 return PTR_ERR(gi2c->se.base); in geni_i2c_probe()
793 gi2c->se.clk = devm_clk_get(dev, "se"); in geni_i2c_probe()
794 if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev)) in geni_i2c_probe()
795 return PTR_ERR(gi2c->se.clk); in geni_i2c_probe()
836 ret = geni_icc_get(&gi2c->se, desc ? desc->icc_ddr : "qup-memory"); in geni_i2c_probe()
844 gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
845 gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW; in geni_i2c_probe()
847 gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out); in geni_i2c_probe()
849 ret = geni_icc_set_bw(&gi2c->se); in geni_i2c_probe()
857 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_probe()
863 proto = geni_se_read_proto(&gi2c->se); in geni_i2c_probe()
866 geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
874 fifo_disable = readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE; in geni_i2c_probe()
881 geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
889 tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se); in geni_i2c_probe()
897 geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
903 geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth); in geni_i2c_probe()
904 geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, in geni_i2c_probe()
911 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_probe()
917 ret = geni_icc_disable(&gi2c->se); in geni_i2c_probe()
922 pm_runtime_set_suspended(gi2c->se.dev); in geni_i2c_probe()
923 pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY); in geni_i2c_probe()
924 pm_runtime_use_autosuspend(gi2c->se.dev); in geni_i2c_probe()
925 pm_runtime_enable(gi2c->se.dev); in geni_i2c_probe()
930 pm_runtime_disable(gi2c->se.dev); in geni_i2c_probe()
949 pm_runtime_disable(gi2c->se.dev); in geni_i2c_remove()
966 ret = geni_se_resources_off(&gi2c->se); in geni_i2c_runtime_suspend()
977 return geni_icc_disable(&gi2c->se); in geni_i2c_runtime_suspend()
985 ret = geni_icc_enable(&gi2c->se); in geni_i2c_runtime_resume()
993 ret = geni_se_resources_on(&gi2c->se); in geni_i2c_runtime_resume()