Lines Matching refs:dp
326 static void zynqmp_dp_write(struct zynqmp_dp *dp, int offset, u32 val) in zynqmp_dp_write() argument
328 writel(val, dp->iomem + offset); in zynqmp_dp_write()
331 static u32 zynqmp_dp_read(struct zynqmp_dp *dp, int offset) in zynqmp_dp_read() argument
333 return readl(dp->iomem + offset); in zynqmp_dp_read()
336 static void zynqmp_dp_clr(struct zynqmp_dp *dp, int offset, u32 clr) in zynqmp_dp_clr() argument
338 zynqmp_dp_write(dp, offset, zynqmp_dp_read(dp, offset) & ~clr); in zynqmp_dp_clr()
341 static void zynqmp_dp_set(struct zynqmp_dp *dp, int offset, u32 set) in zynqmp_dp_set() argument
343 zynqmp_dp_write(dp, offset, zynqmp_dp_read(dp, offset) | set); in zynqmp_dp_set()
352 static int zynqmp_dp_reset(struct zynqmp_dp *dp, bool assert) in zynqmp_dp_reset() argument
357 reset_control_assert(dp->reset); in zynqmp_dp_reset()
359 reset_control_deassert(dp->reset); in zynqmp_dp_reset()
364 bool status = !!reset_control_status(dp->reset); in zynqmp_dp_reset()
372 dev_err(dp->dev, "reset %s timeout\n", assert ? "assert" : "deassert"); in zynqmp_dp_reset()
385 static int zynqmp_dp_phy_init(struct zynqmp_dp *dp) in zynqmp_dp_phy_init() argument
390 for (i = 0; i < dp->num_lanes; i++) { in zynqmp_dp_phy_init()
391 ret = phy_init(dp->phy[i]); in zynqmp_dp_phy_init()
393 dev_err(dp->dev, "failed to init phy lane %d\n", i); in zynqmp_dp_phy_init()
398 zynqmp_dp_clr(dp, ZYNQMP_DP_PHY_RESET, ZYNQMP_DP_PHY_RESET_ALL_RESET); in zynqmp_dp_phy_init()
404 for (i = dp->num_lanes - 1; i >= 0; i--) { in zynqmp_dp_phy_init()
405 ret = phy_power_on(dp->phy[i]); in zynqmp_dp_phy_init()
407 dev_err(dp->dev, "failed to power on phy lane %d\n", i); in zynqmp_dp_phy_init()
421 static void zynqmp_dp_phy_exit(struct zynqmp_dp *dp) in zynqmp_dp_phy_exit() argument
426 for (i = 0; i < dp->num_lanes; i++) { in zynqmp_dp_phy_exit()
427 ret = phy_power_off(dp->phy[i]); in zynqmp_dp_phy_exit()
429 dev_err(dp->dev, "failed to power off phy(%d) %d\n", i, in zynqmp_dp_phy_exit()
433 for (i = 0; i < dp->num_lanes; i++) { in zynqmp_dp_phy_exit()
434 ret = phy_exit(dp->phy[i]); in zynqmp_dp_phy_exit()
436 dev_err(dp->dev, "failed to exit phy(%d) %d\n", i, ret); in zynqmp_dp_phy_exit()
454 static int zynqmp_dp_phy_probe(struct zynqmp_dp *dp) in zynqmp_dp_phy_probe() argument
463 phy = devm_phy_get(dp->dev, phy_name); in zynqmp_dp_phy_probe()
468 if (dp->num_lanes) in zynqmp_dp_phy_probe()
471 dev_err(dp->dev, "no PHY found\n"); in zynqmp_dp_phy_probe()
478 dev_err(dp->dev, "failed to get PHY lane %u\n", in zynqmp_dp_phy_probe()
484 dp->phy[i] = phy; in zynqmp_dp_phy_probe()
485 dp->num_lanes++; in zynqmp_dp_phy_probe()
500 static int zynqmp_dp_phy_ready(struct zynqmp_dp *dp) in zynqmp_dp_phy_ready() argument
504 ready = (1 << dp->num_lanes) - 1; in zynqmp_dp_phy_ready()
508 reg = zynqmp_dp_read(dp, ZYNQMP_DP_PHY_STATUS); in zynqmp_dp_phy_ready()
513 dev_err(dp->dev, "PHY isn't ready\n"); in zynqmp_dp_phy_ready()
553 static int zynqmp_dp_mode_configure(struct zynqmp_dp *dp, int pclock, in zynqmp_dp_mode_configure() argument
556 int max_rate = dp->link_config.max_rate; in zynqmp_dp_mode_configure()
558 u8 max_lanes = dp->link_config.max_lanes; in zynqmp_dp_mode_configure()
560 u8 bpp = dp->config.bpp; in zynqmp_dp_mode_configure()
572 dev_err(dp->dev, "can't downshift. already lowest link rate\n"); in zynqmp_dp_mode_configure()
587 dp->mode.bw_code = bw_code; in zynqmp_dp_mode_configure()
588 dp->mode.lane_cnt = lane_cnt; in zynqmp_dp_mode_configure()
589 dp->mode.pclock = pclock; in zynqmp_dp_mode_configure()
590 return dp->mode.bw_code; in zynqmp_dp_mode_configure()
594 dev_err(dp->dev, "failed to configure link values\n"); in zynqmp_dp_mode_configure()
604 static void zynqmp_dp_adjust_train(struct zynqmp_dp *dp, in zynqmp_dp_adjust_train() argument
607 u8 *train_set = dp->train_set; in zynqmp_dp_adjust_train()
611 for (i = 0; i < dp->mode.lane_cnt; i++) { in zynqmp_dp_adjust_train()
628 for (i = 0; i < dp->mode.lane_cnt; i++) in zynqmp_dp_adjust_train()
642 static int zynqmp_dp_update_vs_emph(struct zynqmp_dp *dp) in zynqmp_dp_update_vs_emph() argument
647 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, dp->train_set, in zynqmp_dp_update_vs_emph()
648 dp->mode.lane_cnt); in zynqmp_dp_update_vs_emph()
652 for (i = 0; i < dp->mode.lane_cnt; i++) { in zynqmp_dp_update_vs_emph()
655 u8 train = dp->train_set[i]; in zynqmp_dp_update_vs_emph()
657 opts.dp.voltage[0] = (train & DP_TRAIN_VOLTAGE_SWING_MASK) in zynqmp_dp_update_vs_emph()
659 opts.dp.pre[0] = (train & DP_TRAIN_PRE_EMPHASIS_MASK) in zynqmp_dp_update_vs_emph()
662 phy_configure(dp->phy[i], &opts); in zynqmp_dp_update_vs_emph()
664 zynqmp_dp_write(dp, reg, 0x2); in zynqmp_dp_update_vs_emph()
677 static int zynqmp_dp_link_train_cr(struct zynqmp_dp *dp) in zynqmp_dp_link_train_cr() argument
680 u8 lane_cnt = dp->mode.lane_cnt; in zynqmp_dp_link_train_cr()
686 zynqmp_dp_write(dp, ZYNQMP_DP_TRAINING_PATTERN_SET, in zynqmp_dp_link_train_cr()
688 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in zynqmp_dp_link_train_cr()
699 ret = zynqmp_dp_update_vs_emph(dp); in zynqmp_dp_link_train_cr()
703 drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd); in zynqmp_dp_link_train_cr()
704 ret = drm_dp_dpcd_read_link_status(&dp->aux, link_status); in zynqmp_dp_link_train_cr()
713 if (!(dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED)) in zynqmp_dp_link_train_cr()
718 if ((dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == vs) in zynqmp_dp_link_train_cr()
726 vs = dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in zynqmp_dp_link_train_cr()
727 zynqmp_dp_adjust_train(dp, link_status); in zynqmp_dp_link_train_cr()
743 static int zynqmp_dp_link_train_ce(struct zynqmp_dp *dp) in zynqmp_dp_link_train_ce() argument
746 u8 lane_cnt = dp->mode.lane_cnt; in zynqmp_dp_link_train_ce()
751 if (dp->dpcd[DP_DPCD_REV] >= DP_V1_2 && in zynqmp_dp_link_train_ce()
752 dp->dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED) in zynqmp_dp_link_train_ce()
757 zynqmp_dp_write(dp, ZYNQMP_DP_TRAINING_PATTERN_SET, pat); in zynqmp_dp_link_train_ce()
758 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in zynqmp_dp_link_train_ce()
764 ret = zynqmp_dp_update_vs_emph(dp); in zynqmp_dp_link_train_ce()
768 drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd); in zynqmp_dp_link_train_ce()
769 ret = drm_dp_dpcd_read_link_status(&dp->aux, link_status); in zynqmp_dp_link_train_ce()
777 zynqmp_dp_adjust_train(dp, link_status); in zynqmp_dp_link_train_ce()
792 static int zynqmp_dp_train(struct zynqmp_dp *dp) in zynqmp_dp_train() argument
795 u8 bw_code = dp->mode.bw_code; in zynqmp_dp_train()
796 u8 lane_cnt = dp->mode.lane_cnt; in zynqmp_dp_train()
801 zynqmp_dp_write(dp, ZYNQMP_DP_LANE_COUNT_SET, lane_cnt); in zynqmp_dp_train()
802 enhanced = drm_dp_enhanced_frame_cap(dp->dpcd); in zynqmp_dp_train()
804 zynqmp_dp_write(dp, ZYNQMP_DP_ENHANCED_FRAME_EN, 1); in zynqmp_dp_train()
808 if (dp->dpcd[3] & 0x1) { in zynqmp_dp_train()
809 zynqmp_dp_write(dp, ZYNQMP_DP_DOWNSPREAD_CTL, 1); in zynqmp_dp_train()
810 drm_dp_dpcd_writeb(&dp->aux, DP_DOWNSPREAD_CTRL, in zynqmp_dp_train()
813 zynqmp_dp_write(dp, ZYNQMP_DP_DOWNSPREAD_CTL, 0); in zynqmp_dp_train()
814 drm_dp_dpcd_writeb(&dp->aux, DP_DOWNSPREAD_CTRL, 0); in zynqmp_dp_train()
817 ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, aux_lane_cnt); in zynqmp_dp_train()
819 dev_err(dp->dev, "failed to set lane count\n"); in zynqmp_dp_train()
823 ret = drm_dp_dpcd_writeb(&dp->aux, DP_MAIN_LINK_CHANNEL_CODING_SET, in zynqmp_dp_train()
826 dev_err(dp->dev, "failed to set ANSI 8B/10B encoding\n"); in zynqmp_dp_train()
830 ret = drm_dp_dpcd_writeb(&dp->aux, DP_LINK_BW_SET, bw_code); in zynqmp_dp_train()
832 dev_err(dp->dev, "failed to set DP bandwidth\n"); in zynqmp_dp_train()
836 zynqmp_dp_write(dp, ZYNQMP_DP_LINK_BW_SET, bw_code); in zynqmp_dp_train()
850 zynqmp_dp_write(dp, ZYNQMP_DP_PHY_CLOCK_SELECT, reg); in zynqmp_dp_train()
851 ret = zynqmp_dp_phy_ready(dp); in zynqmp_dp_train()
855 zynqmp_dp_write(dp, ZYNQMP_DP_SCRAMBLING_DISABLE, 1); in zynqmp_dp_train()
856 memset(dp->train_set, 0, sizeof(dp->train_set)); in zynqmp_dp_train()
857 ret = zynqmp_dp_link_train_cr(dp); in zynqmp_dp_train()
861 ret = zynqmp_dp_link_train_ce(dp); in zynqmp_dp_train()
865 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in zynqmp_dp_train()
868 dev_err(dp->dev, "failed to disable training pattern\n"); in zynqmp_dp_train()
871 zynqmp_dp_write(dp, ZYNQMP_DP_TRAINING_PATTERN_SET, in zynqmp_dp_train()
874 zynqmp_dp_write(dp, ZYNQMP_DP_SCRAMBLING_DISABLE, 0); in zynqmp_dp_train()
885 static void zynqmp_dp_train_loop(struct zynqmp_dp *dp) in zynqmp_dp_train_loop() argument
887 struct zynqmp_dp_mode *mode = &dp->mode; in zynqmp_dp_train_loop()
892 if (dp->status == connector_status_disconnected || in zynqmp_dp_train_loop()
893 !dp->enabled) in zynqmp_dp_train_loop()
896 ret = zynqmp_dp_train(dp); in zynqmp_dp_train_loop()
900 ret = zynqmp_dp_mode_configure(dp, mode->pclock, bw); in zynqmp_dp_train_loop()
908 dev_err(dp->dev, "failed to train the DP link\n"); in zynqmp_dp_train_loop()
939 static int zynqmp_dp_aux_cmd_submit(struct zynqmp_dp *dp, u32 cmd, u16 addr, in zynqmp_dp_aux_cmd_submit() argument
945 reg = zynqmp_dp_read(dp, ZYNQMP_DP_INTERRUPT_SIGNAL_STATE); in zynqmp_dp_aux_cmd_submit()
949 zynqmp_dp_write(dp, ZYNQMP_DP_AUX_ADDRESS, addr); in zynqmp_dp_aux_cmd_submit()
952 zynqmp_dp_write(dp, ZYNQMP_DP_AUX_WRITE_FIFO, in zynqmp_dp_aux_cmd_submit()
960 zynqmp_dp_write(dp, ZYNQMP_DP_AUX_COMMAND, reg); in zynqmp_dp_aux_cmd_submit()
964 reg = zynqmp_dp_read(dp, ZYNQMP_DP_INTERRUPT_SIGNAL_STATE); in zynqmp_dp_aux_cmd_submit()
975 reg = zynqmp_dp_read(dp, ZYNQMP_DP_AUX_REPLY_CODE); in zynqmp_dp_aux_cmd_submit()
982 reg = zynqmp_dp_read(dp, ZYNQMP_DP_REPLY_DATA_COUNT); in zynqmp_dp_aux_cmd_submit()
987 buf[i] = zynqmp_dp_read(dp, ZYNQMP_DP_AUX_REPLY_DATA); in zynqmp_dp_aux_cmd_submit()
996 struct zynqmp_dp *dp = container_of(aux, struct zynqmp_dp, aux); in zynqmp_dp_aux_transfer() local
1005 ret = zynqmp_dp_aux_cmd_submit(dp, msg->request, msg->address, in zynqmp_dp_aux_transfer()
1009 dev_dbg(dp->dev, "aux %d retries\n", i); in zynqmp_dp_aux_transfer()
1013 if (dp->status == connector_status_disconnected) { in zynqmp_dp_aux_transfer()
1014 dev_dbg(dp->dev, "no connected aux device\n"); in zynqmp_dp_aux_transfer()
1021 dev_dbg(dp->dev, "failed to do aux transfer (%d)\n", ret); in zynqmp_dp_aux_transfer()
1034 static int zynqmp_dp_aux_init(struct zynqmp_dp *dp) in zynqmp_dp_aux_init() argument
1046 rate = clk_get_rate(dp->dpsub->apb_clk); in zynqmp_dp_aux_init()
1049 dev_err(dp->dev, "aclk frequency too high\n"); in zynqmp_dp_aux_init()
1053 zynqmp_dp_write(dp, ZYNQMP_DP_AUX_CLK_DIVIDER, in zynqmp_dp_aux_init()
1057 dp->aux.name = "ZynqMP DP AUX"; in zynqmp_dp_aux_init()
1058 dp->aux.dev = dp->dev; in zynqmp_dp_aux_init()
1059 dp->aux.drm_dev = dp->bridge.dev; in zynqmp_dp_aux_init()
1060 dp->aux.transfer = zynqmp_dp_aux_transfer; in zynqmp_dp_aux_init()
1062 return drm_dp_aux_register(&dp->aux); in zynqmp_dp_aux_init()
1071 static void zynqmp_dp_aux_cleanup(struct zynqmp_dp *dp) in zynqmp_dp_aux_cleanup() argument
1073 drm_dp_aux_unregister(&dp->aux); in zynqmp_dp_aux_cleanup()
1087 static void zynqmp_dp_update_misc(struct zynqmp_dp *dp) in zynqmp_dp_update_misc() argument
1089 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_MISC0, dp->config.misc0); in zynqmp_dp_update_misc()
1090 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_MISC1, dp->config.misc1); in zynqmp_dp_update_misc()
1104 static int zynqmp_dp_set_format(struct zynqmp_dp *dp, in zynqmp_dp_set_format() argument
1109 struct zynqmp_dp_config *config = &dp->config; in zynqmp_dp_set_format()
1137 dev_err(dp->dev, "Invalid colormetry in DT\n"); in zynqmp_dp_set_format()
1142 dev_warn(dp->dev, in zynqmp_dp_set_format()
1167 dev_warn(dp->dev, "Not supported bpc (%u). fall back to 8bpc\n", in zynqmp_dp_set_format()
1189 zynqmp_dp_encoder_mode_set_transfer_unit(struct zynqmp_dp *dp, in zynqmp_dp_encoder_mode_set_transfer_unit() argument
1196 zynqmp_dp_write(dp, ZYNQMP_DP_MSA_TRANSFER_UNIT_SIZE, tu); in zynqmp_dp_encoder_mode_set_transfer_unit()
1198 vid_kbytes = mode->clock * (dp->config.bpp / 8); in zynqmp_dp_encoder_mode_set_transfer_unit()
1199 bw = drm_dp_bw_code_to_link_rate(dp->mode.bw_code); in zynqmp_dp_encoder_mode_set_transfer_unit()
1200 avg_bytes_per_tu = vid_kbytes * tu / (dp->mode.lane_cnt * bw / 1000); in zynqmp_dp_encoder_mode_set_transfer_unit()
1201 zynqmp_dp_write(dp, ZYNQMP_DP_MIN_BYTES_PER_TU, in zynqmp_dp_encoder_mode_set_transfer_unit()
1203 zynqmp_dp_write(dp, ZYNQMP_DP_FRAC_BYTES_PER_TU, in zynqmp_dp_encoder_mode_set_transfer_unit()
1214 zynqmp_dp_write(dp, ZYNQMP_DP_INIT_WAIT, init_wait); in zynqmp_dp_encoder_mode_set_transfer_unit()
1225 static void zynqmp_dp_encoder_mode_set_stream(struct zynqmp_dp *dp, in zynqmp_dp_encoder_mode_set_stream() argument
1228 u8 lane_cnt = dp->mode.lane_cnt; in zynqmp_dp_encoder_mode_set_stream()
1232 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_HTOTAL, mode->htotal); in zynqmp_dp_encoder_mode_set_stream()
1233 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_VTOTAL, mode->vtotal); in zynqmp_dp_encoder_mode_set_stream()
1234 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_POLARITY, in zynqmp_dp_encoder_mode_set_stream()
1239 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_HSWIDTH, in zynqmp_dp_encoder_mode_set_stream()
1241 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_VSWIDTH, in zynqmp_dp_encoder_mode_set_stream()
1243 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_HRES, mode->hdisplay); in zynqmp_dp_encoder_mode_set_stream()
1244 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_VRES, mode->vdisplay); in zynqmp_dp_encoder_mode_set_stream()
1245 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_HSTART, in zynqmp_dp_encoder_mode_set_stream()
1247 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_VSTART, in zynqmp_dp_encoder_mode_set_stream()
1251 if (dp->config.misc0 & ZYNQMP_DP_MAIN_STREAM_MISC0_SYNC_LOCK) { in zynqmp_dp_encoder_mode_set_stream()
1252 reg = drm_dp_bw_code_to_link_rate(dp->mode.bw_code); in zynqmp_dp_encoder_mode_set_stream()
1253 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_N_VID, reg); in zynqmp_dp_encoder_mode_set_stream()
1254 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_M_VID, mode->clock); in zynqmp_dp_encoder_mode_set_stream()
1255 rate = zynqmp_dpsub_get_audio_clk_rate(dp->dpsub); in zynqmp_dp_encoder_mode_set_stream()
1257 dev_dbg(dp->dev, "Audio rate: %d\n", rate / 512); in zynqmp_dp_encoder_mode_set_stream()
1258 zynqmp_dp_write(dp, ZYNQMP_DP_TX_N_AUD, reg); in zynqmp_dp_encoder_mode_set_stream()
1259 zynqmp_dp_write(dp, ZYNQMP_DP_TX_M_AUD, rate / 1000); in zynqmp_dp_encoder_mode_set_stream()
1264 if (zynqmp_dpsub_audio_enabled(dp->dpsub)) in zynqmp_dp_encoder_mode_set_stream()
1265 zynqmp_dp_write(dp, ZYNQMP_DP_TX_AUDIO_CHANNELS, 1); in zynqmp_dp_encoder_mode_set_stream()
1267 zynqmp_dp_write(dp, ZYNQMP_DP_USER_PIX_WIDTH, 1); in zynqmp_dp_encoder_mode_set_stream()
1270 wpl = (mode->hdisplay * dp->config.bpp + 15) / 16; in zynqmp_dp_encoder_mode_set_stream()
1272 zynqmp_dp_write(dp, ZYNQMP_DP_USER_DATA_COUNT_PER_LANE, reg); in zynqmp_dp_encoder_mode_set_stream()
1279 static void zynqmp_dp_disp_enable(struct zynqmp_dp *dp, in zynqmp_dp_disp_enable() argument
1286 if (dp->dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) in zynqmp_dp_disp_enable()
1288 else if (dp->dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX)) in zynqmp_dp_disp_enable()
1293 layer = dp->dpsub->layers[layer_id]; in zynqmp_dp_disp_enable()
1301 zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, true, 255); in zynqmp_dp_disp_enable()
1303 zynqmp_disp_blend_set_global_alpha(dp->dpsub->disp, false, 0); in zynqmp_dp_disp_enable()
1305 zynqmp_disp_enable(dp->dpsub->disp); in zynqmp_dp_disp_enable()
1308 static void zynqmp_dp_disp_disable(struct zynqmp_dp *dp, in zynqmp_dp_disp_disable() argument
1313 if (dp->dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) in zynqmp_dp_disp_disable()
1314 layer = dp->dpsub->layers[ZYNQMP_DPSUB_LAYER_VID]; in zynqmp_dp_disp_disable()
1315 else if (dp->dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX)) in zynqmp_dp_disp_disable()
1316 layer = dp->dpsub->layers[ZYNQMP_DPSUB_LAYER_GFX]; in zynqmp_dp_disp_disable()
1320 zynqmp_disp_disable(dp->dpsub->disp); in zynqmp_dp_disp_disable()
1331 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_attach() local
1335 ret = zynqmp_dp_aux_init(dp); in zynqmp_dp_bridge_attach()
1337 dev_err(dp->dev, "failed to initialize DP aux\n"); in zynqmp_dp_bridge_attach()
1341 if (dp->next_bridge) { in zynqmp_dp_bridge_attach()
1342 ret = drm_bridge_attach(bridge->encoder, dp->next_bridge, in zynqmp_dp_bridge_attach()
1349 zynqmp_dp_write(dp, ZYNQMP_DP_INT_EN, ZYNQMP_DP_INT_ALL); in zynqmp_dp_bridge_attach()
1354 zynqmp_dp_aux_cleanup(dp); in zynqmp_dp_bridge_attach()
1360 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_detach() local
1362 zynqmp_dp_aux_cleanup(dp); in zynqmp_dp_bridge_detach()
1370 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_mode_valid() local
1374 dev_dbg(dp->dev, "filtered mode %s for high pixel rate\n", in zynqmp_dp_bridge_mode_valid()
1381 rate = zynqmp_dp_max_rate(dp->link_config.max_rate, in zynqmp_dp_bridge_mode_valid()
1382 dp->link_config.max_lanes, dp->config.bpp); in zynqmp_dp_bridge_mode_valid()
1384 dev_dbg(dp->dev, "filtered mode %s for high pixel rate\n", in zynqmp_dp_bridge_mode_valid()
1396 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_atomic_enable() local
1407 pm_runtime_get_sync(dp->dev); in zynqmp_dp_bridge_atomic_enable()
1409 zynqmp_dp_disp_enable(dp, old_bridge_state); in zynqmp_dp_bridge_atomic_enable()
1423 zynqmp_dp_set_format(dp, &connector->display_info, in zynqmp_dp_bridge_atomic_enable()
1427 rate = zynqmp_dp_max_rate(dp->link_config.max_rate, in zynqmp_dp_bridge_atomic_enable()
1428 dp->link_config.max_lanes, dp->config.bpp); in zynqmp_dp_bridge_atomic_enable()
1430 dev_err(dp->dev, "mode %s has too high pixel rate\n", in zynqmp_dp_bridge_atomic_enable()
1436 ret = zynqmp_dp_mode_configure(dp, adjusted_mode->clock, 0); in zynqmp_dp_bridge_atomic_enable()
1438 pm_runtime_put_sync(dp->dev); in zynqmp_dp_bridge_atomic_enable()
1442 zynqmp_dp_encoder_mode_set_transfer_unit(dp, adjusted_mode); in zynqmp_dp_bridge_atomic_enable()
1443 zynqmp_dp_encoder_mode_set_stream(dp, adjusted_mode); in zynqmp_dp_bridge_atomic_enable()
1446 dp->enabled = true; in zynqmp_dp_bridge_atomic_enable()
1447 zynqmp_dp_update_misc(dp); in zynqmp_dp_bridge_atomic_enable()
1448 if (zynqmp_dpsub_audio_enabled(dp->dpsub)) in zynqmp_dp_bridge_atomic_enable()
1449 zynqmp_dp_write(dp, ZYNQMP_DP_TX_AUDIO_CONTROL, 1); in zynqmp_dp_bridge_atomic_enable()
1450 zynqmp_dp_write(dp, ZYNQMP_DP_TX_PHY_POWER_DOWN, 0); in zynqmp_dp_bridge_atomic_enable()
1451 if (dp->status == connector_status_connected) { in zynqmp_dp_bridge_atomic_enable()
1453 ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, in zynqmp_dp_bridge_atomic_enable()
1463 dev_dbg(dp->dev, "DP aux failed\n"); in zynqmp_dp_bridge_atomic_enable()
1465 zynqmp_dp_train_loop(dp); in zynqmp_dp_bridge_atomic_enable()
1466 zynqmp_dp_write(dp, ZYNQMP_DP_SOFTWARE_RESET, in zynqmp_dp_bridge_atomic_enable()
1468 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 1); in zynqmp_dp_bridge_atomic_enable()
1474 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_atomic_disable() local
1476 dp->enabled = false; in zynqmp_dp_bridge_atomic_disable()
1477 cancel_delayed_work(&dp->hpd_work); in zynqmp_dp_bridge_atomic_disable()
1478 zynqmp_dp_write(dp, ZYNQMP_DP_MAIN_STREAM_ENABLE, 0); in zynqmp_dp_bridge_atomic_disable()
1479 drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D3); in zynqmp_dp_bridge_atomic_disable()
1480 zynqmp_dp_write(dp, ZYNQMP_DP_TX_PHY_POWER_DOWN, in zynqmp_dp_bridge_atomic_disable()
1482 if (zynqmp_dpsub_audio_enabled(dp->dpsub)) in zynqmp_dp_bridge_atomic_disable()
1483 zynqmp_dp_write(dp, ZYNQMP_DP_TX_AUDIO_CONTROL, 0); in zynqmp_dp_bridge_atomic_disable()
1485 zynqmp_dp_disp_disable(dp, old_bridge_state); in zynqmp_dp_bridge_atomic_disable()
1487 pm_runtime_put_sync(dp->dev); in zynqmp_dp_bridge_atomic_disable()
1497 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_atomic_check() local
1510 dev_dbg(dp->dev, "hbackporch adjusted: %d to %d", in zynqmp_dp_bridge_atomic_check()
1523 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_detect() local
1524 struct zynqmp_dp_link_config *link_config = &dp->link_config; in zynqmp_dp_bridge_detect()
1533 state = zynqmp_dp_read(dp, ZYNQMP_DP_INTERRUPT_SIGNAL_STATE); in zynqmp_dp_bridge_detect()
1540 ret = drm_dp_dpcd_read(&dp->aux, 0x0, dp->dpcd, in zynqmp_dp_bridge_detect()
1541 sizeof(dp->dpcd)); in zynqmp_dp_bridge_detect()
1543 dev_dbg(dp->dev, "DPCD read failed"); in zynqmp_dp_bridge_detect()
1548 drm_dp_max_link_rate(dp->dpcd), in zynqmp_dp_bridge_detect()
1551 drm_dp_max_lane_count(dp->dpcd), in zynqmp_dp_bridge_detect()
1552 dp->num_lanes); in zynqmp_dp_bridge_detect()
1554 dp->status = connector_status_connected; in zynqmp_dp_bridge_detect()
1559 dp->status = connector_status_disconnected; in zynqmp_dp_bridge_detect()
1566 struct zynqmp_dp *dp = bridge_to_dp(bridge); in zynqmp_dp_bridge_get_edid() local
1568 return drm_get_edid(connector, &dp->aux.ddc); in zynqmp_dp_bridge_get_edid()
1595 void zynqmp_dp_enable_vblank(struct zynqmp_dp *dp) in zynqmp_dp_enable_vblank() argument
1597 zynqmp_dp_write(dp, ZYNQMP_DP_INT_EN, ZYNQMP_DP_INT_VBLANK_START); in zynqmp_dp_enable_vblank()
1606 void zynqmp_dp_disable_vblank(struct zynqmp_dp *dp) in zynqmp_dp_disable_vblank() argument
1608 zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, ZYNQMP_DP_INT_VBLANK_START); in zynqmp_dp_disable_vblank()
1613 struct zynqmp_dp *dp = container_of(work, struct zynqmp_dp, in zynqmp_dp_hpd_work_func() local
1617 status = zynqmp_dp_bridge_detect(&dp->bridge); in zynqmp_dp_hpd_work_func()
1618 drm_bridge_hpd_notify(&dp->bridge, status); in zynqmp_dp_hpd_work_func()
1623 struct zynqmp_dp *dp = (struct zynqmp_dp *)data; in zynqmp_dp_irq_handler() local
1626 status = zynqmp_dp_read(dp, ZYNQMP_DP_INT_STATUS); in zynqmp_dp_irq_handler()
1627 mask = zynqmp_dp_read(dp, ZYNQMP_DP_INT_MASK); in zynqmp_dp_irq_handler()
1633 dev_dbg_ratelimited(dp->dev, "underflow interrupt\n"); in zynqmp_dp_irq_handler()
1635 dev_dbg_ratelimited(dp->dev, "overflow interrupt\n"); in zynqmp_dp_irq_handler()
1637 zynqmp_dp_write(dp, ZYNQMP_DP_INT_STATUS, status); in zynqmp_dp_irq_handler()
1640 zynqmp_dpsub_drm_handle_vblank(dp->dpsub); in zynqmp_dp_irq_handler()
1643 schedule_delayed_work(&dp->hpd_work, 0); in zynqmp_dp_irq_handler()
1649 ret = drm_dp_dpcd_read(&dp->aux, DP_SINK_COUNT, status, in zynqmp_dp_irq_handler()
1655 !drm_dp_clock_recovery_ok(&status[2], dp->mode.lane_cnt) || in zynqmp_dp_irq_handler()
1656 !drm_dp_channel_eq_ok(&status[2], dp->mode.lane_cnt)) { in zynqmp_dp_irq_handler()
1657 zynqmp_dp_train_loop(dp); in zynqmp_dp_irq_handler()
1673 struct zynqmp_dp *dp; in zynqmp_dp_probe() local
1677 dp = kzalloc(sizeof(*dp), GFP_KERNEL); in zynqmp_dp_probe()
1678 if (!dp) in zynqmp_dp_probe()
1681 dp->dev = &pdev->dev; in zynqmp_dp_probe()
1682 dp->dpsub = dpsub; in zynqmp_dp_probe()
1683 dp->status = connector_status_disconnected; in zynqmp_dp_probe()
1685 INIT_DELAYED_WORK(&dp->hpd_work, zynqmp_dp_hpd_work_func); in zynqmp_dp_probe()
1689 dp->iomem = devm_ioremap_resource(dp->dev, res); in zynqmp_dp_probe()
1690 if (IS_ERR(dp->iomem)) { in zynqmp_dp_probe()
1691 ret = PTR_ERR(dp->iomem); in zynqmp_dp_probe()
1695 dp->irq = platform_get_irq(pdev, 0); in zynqmp_dp_probe()
1696 if (dp->irq < 0) { in zynqmp_dp_probe()
1697 ret = dp->irq; in zynqmp_dp_probe()
1701 dp->reset = devm_reset_control_get(dp->dev, NULL); in zynqmp_dp_probe()
1702 if (IS_ERR(dp->reset)) { in zynqmp_dp_probe()
1703 if (PTR_ERR(dp->reset) != -EPROBE_DEFER) in zynqmp_dp_probe()
1704 dev_err(dp->dev, "failed to get reset: %ld\n", in zynqmp_dp_probe()
1705 PTR_ERR(dp->reset)); in zynqmp_dp_probe()
1706 ret = PTR_ERR(dp->reset); in zynqmp_dp_probe()
1710 ret = zynqmp_dp_reset(dp, false); in zynqmp_dp_probe()
1714 ret = zynqmp_dp_phy_probe(dp); in zynqmp_dp_probe()
1719 bridge = &dp->bridge; in zynqmp_dp_probe()
1730 ret = drm_of_find_panel_or_bridge(dp->dev->of_node, 5, 0, NULL, in zynqmp_dp_probe()
1731 &dp->next_bridge); in zynqmp_dp_probe()
1736 dp->config.misc0 &= ~ZYNQMP_DP_MAIN_STREAM_MISC0_SYNC_LOCK; in zynqmp_dp_probe()
1737 zynqmp_dp_set_format(dp, NULL, ZYNQMP_DPSUB_FORMAT_RGB, 8); in zynqmp_dp_probe()
1739 zynqmp_dp_write(dp, ZYNQMP_DP_TX_PHY_POWER_DOWN, in zynqmp_dp_probe()
1741 zynqmp_dp_set(dp, ZYNQMP_DP_PHY_RESET, ZYNQMP_DP_PHY_RESET_ALL_RESET); in zynqmp_dp_probe()
1742 zynqmp_dp_write(dp, ZYNQMP_DP_FORCE_SCRAMBLER_RESET, 1); in zynqmp_dp_probe()
1743 zynqmp_dp_write(dp, ZYNQMP_DP_TRANSMITTER_ENABLE, 0); in zynqmp_dp_probe()
1744 zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, 0xffffffff); in zynqmp_dp_probe()
1746 ret = zynqmp_dp_phy_init(dp); in zynqmp_dp_probe()
1750 zynqmp_dp_write(dp, ZYNQMP_DP_TRANSMITTER_ENABLE, 1); in zynqmp_dp_probe()
1756 ret = devm_request_threaded_irq(dp->dev, dp->irq, NULL, in zynqmp_dp_probe()
1758 dev_name(dp->dev), dp); in zynqmp_dp_probe()
1762 dpsub->dp = dp; in zynqmp_dp_probe()
1764 dev_dbg(dp->dev, "ZynqMP DisplayPort Tx probed with %u lanes\n", in zynqmp_dp_probe()
1765 dp->num_lanes); in zynqmp_dp_probe()
1770 zynqmp_dp_phy_exit(dp); in zynqmp_dp_probe()
1772 zynqmp_dp_reset(dp, true); in zynqmp_dp_probe()
1774 kfree(dp); in zynqmp_dp_probe()
1780 struct zynqmp_dp *dp = dpsub->dp; in zynqmp_dp_remove() local
1782 zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, ZYNQMP_DP_INT_ALL); in zynqmp_dp_remove()
1783 disable_irq(dp->irq); in zynqmp_dp_remove()
1785 cancel_delayed_work_sync(&dp->hpd_work); in zynqmp_dp_remove()
1787 zynqmp_dp_write(dp, ZYNQMP_DP_TRANSMITTER_ENABLE, 0); in zynqmp_dp_remove()
1788 zynqmp_dp_write(dp, ZYNQMP_DP_INT_DS, 0xffffffff); in zynqmp_dp_remove()
1790 zynqmp_dp_phy_exit(dp); in zynqmp_dp_remove()
1791 zynqmp_dp_reset(dp, true); in zynqmp_dp_remove()