Lines Matching refs:pi
45 struct rv6xx_power_info *pi = rdev->pm.dpm.priv; in rv6xx_get_pi() local
47 return pi; in rv6xx_get_pi()
162 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_output_stepping() local
167 pi->spll_ref_div, in rv6xx_output_stepping()
183 fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >> in rv6xx_output_stepping()
184 pi->fb_div_scale; in rv6xx_output_stepping()
187 pi->spll_ref_div - 1); in rv6xx_output_stepping()
436 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_engine_speed_stepping_parameters() local
438 pi->hw.sclks[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_engine_speed_stepping_parameters()
440 pi->hw.sclks[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_engine_speed_stepping_parameters()
442 pi->hw.sclks[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_engine_speed_stepping_parameters()
445 pi->hw.low_sclk_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_engine_speed_stepping_parameters()
446 pi->hw.medium_sclk_index = R600_POWER_LEVEL_MEDIUM; in rv6xx_calculate_engine_speed_stepping_parameters()
447 pi->hw.high_sclk_index = R600_POWER_LEVEL_HIGH; in rv6xx_calculate_engine_speed_stepping_parameters()
453 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_memory_clock_stepping_parameters() local
455 pi->hw.mclks[R600_POWER_LEVEL_CTXSW] = in rv6xx_calculate_memory_clock_stepping_parameters()
457 pi->hw.mclks[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_memory_clock_stepping_parameters()
459 pi->hw.mclks[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_memory_clock_stepping_parameters()
461 pi->hw.mclks[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_memory_clock_stepping_parameters()
464 pi->hw.high_mclk_index = R600_POWER_LEVEL_HIGH; in rv6xx_calculate_memory_clock_stepping_parameters()
467 pi->hw.medium_mclk_index = in rv6xx_calculate_memory_clock_stepping_parameters()
468 pi->hw.high_mclk_index; in rv6xx_calculate_memory_clock_stepping_parameters()
470 pi->hw.medium_mclk_index = R600_POWER_LEVEL_MEDIUM; in rv6xx_calculate_memory_clock_stepping_parameters()
474 pi->hw.low_mclk_index = in rv6xx_calculate_memory_clock_stepping_parameters()
475 pi->hw.medium_mclk_index; in rv6xx_calculate_memory_clock_stepping_parameters()
477 pi->hw.low_mclk_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_memory_clock_stepping_parameters()
483 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_voltage_stepping_parameters() local
485 pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
486 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
487 pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc; in rv6xx_calculate_voltage_stepping_parameters()
488 pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; in rv6xx_calculate_voltage_stepping_parameters()
490 pi->hw.backbias[R600_POWER_LEVEL_CTXSW] = in rv6xx_calculate_voltage_stepping_parameters()
492 pi->hw.backbias[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_voltage_stepping_parameters()
494 pi->hw.backbias[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_voltage_stepping_parameters()
496 pi->hw.backbias[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_voltage_stepping_parameters()
499 pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH] = in rv6xx_calculate_voltage_stepping_parameters()
501 pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM] = in rv6xx_calculate_voltage_stepping_parameters()
503 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW] = in rv6xx_calculate_voltage_stepping_parameters()
506 pi->hw.high_vddc_index = R600_POWER_LEVEL_HIGH; in rv6xx_calculate_voltage_stepping_parameters()
511 pi->hw.medium_vddc_index = in rv6xx_calculate_voltage_stepping_parameters()
512 pi->hw.high_vddc_index; in rv6xx_calculate_voltage_stepping_parameters()
514 pi->hw.medium_vddc_index = R600_POWER_LEVEL_MEDIUM; in rv6xx_calculate_voltage_stepping_parameters()
519 pi->hw.low_vddc_index = in rv6xx_calculate_voltage_stepping_parameters()
520 pi->hw.medium_vddc_index; in rv6xx_calculate_voltage_stepping_parameters()
522 pi->hw.medium_vddc_index = R600_POWER_LEVEL_LOW; in rv6xx_calculate_voltage_stepping_parameters()
552 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_engine_spread_spectrum() local
559 if (clock && pi->sclk_ss) { in rv6xx_program_engine_spread_spectrum()
562 pi->fb_div_scale); in rv6xx_program_engine_spread_spectrum()
570 pi->fb_div_scale); in rv6xx_program_engine_spread_spectrum()
585 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry() local
588 pi->hw.sclks[R600_POWER_LEVEL_HIGH], in rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry()
592 pi->hw.sclks[R600_POWER_LEVEL_MEDIUM], in rv6xx_program_sclk_spread_spectrum_parameters_except_lowest_entry()
620 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mclk_stepping_parameters_except_lowest_entry() local
624 if (pi->hw.mclks[i]) in rv6xx_program_mclk_stepping_parameters_except_lowest_entry()
626 pi->hw.mclks[i]); in rv6xx_program_mclk_stepping_parameters_except_lowest_entry()
636 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_find_memory_clock_with_highest_vco() local
643 pi->fb_div_scale); in rv6xx_find_memory_clock_with_highest_vco()
654 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mclk_spread_spectrum_parameters() local
662 if (pi->mclk_ss) { in rv6xx_program_mclk_spread_spectrum_parameters()
664 pi->hw.mclks[pi->hw.high_mclk_index], in rv6xx_program_mclk_spread_spectrum_parameters()
670 pi->hw.mclks[pi->hw.medium_mclk_index], in rv6xx_program_mclk_spread_spectrum_parameters()
676 pi->hw.mclks[pi->hw.low_mclk_index], in rv6xx_program_mclk_spread_spectrum_parameters()
688 pi->fb_div_scale); in rv6xx_program_mclk_spread_spectrum_parameters()
720 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_voltage_stepping_parameters_except_lowest_entry() local
725 pi->hw.vddc[i]); in rv6xx_program_voltage_stepping_parameters_except_lowest_entry()
731 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_backbias_stepping_parameters_except_lowest_entry() local
733 if (pi->hw.backbias[1]) in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
738 if (pi->hw.backbias[2]) in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
746 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry() local
749 pi->hw.sclks[R600_POWER_LEVEL_LOW], in rv6xx_program_sclk_spread_spectrum_parameters_lowest_entry()
755 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mclk_stepping_parameters_lowest_entry() local
757 if (pi->hw.mclks[0]) in rv6xx_program_mclk_stepping_parameters_lowest_entry()
759 pi->hw.mclks[0]); in rv6xx_program_mclk_stepping_parameters_lowest_entry()
764 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_voltage_stepping_parameters_lowest_entry() local
767 pi->hw.vddc[0]); in rv6xx_program_voltage_stepping_parameters_lowest_entry()
773 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_backbias_stepping_parameters_lowest_entry() local
775 if (pi->hw.backbias[0]) in rv6xx_program_backbias_stepping_parameters_lowest_entry()
796 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_memory_timing_parameters() local
801 if (pi->hw.sclks[R600_POWER_LEVEL_HIGH] < in rv6xx_program_memory_timing_parameters()
802 (pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40)) in rv6xx_program_memory_timing_parameters()
803 high_clock = pi->hw.sclks[R600_POWER_LEVEL_HIGH]; in rv6xx_program_memory_timing_parameters()
806 pi->hw.sclks[R600_POWER_LEVEL_LOW] * 0xFF / 0x40; in rv6xx_program_memory_timing_parameters()
810 sqm_ratio = (STATE0(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_LOW]) | in rv6xx_program_memory_timing_parameters()
811 STATE1(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_MEDIUM]) | in rv6xx_program_memory_timing_parameters()
812 STATE2(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH]) | in rv6xx_program_memory_timing_parameters()
813 STATE3(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_HIGH])); in rv6xx_program_memory_timing_parameters()
818 pi->hw.sclks[R600_POWER_LEVEL_LOW])) | in rv6xx_program_memory_timing_parameters()
820 pi->hw.sclks[R600_POWER_LEVEL_MEDIUM])) | in rv6xx_program_memory_timing_parameters()
822 pi->hw.sclks[R600_POWER_LEVEL_HIGH])) | in rv6xx_program_memory_timing_parameters()
824 pi->hw.sclks[R600_POWER_LEVEL_HIGH]))); in rv6xx_program_memory_timing_parameters()
830 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_mpll_timing_parameters() local
833 pi->mpll_ref_div); in rv6xx_program_mpll_timing_parameters()
839 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_bsp() local
844 &pi->bsp, in rv6xx_program_bsp()
845 &pi->bsu); in rv6xx_program_bsp()
847 r600_set_bsp(rdev, pi->bsu, pi->bsp); in rv6xx_program_bsp()
852 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_at() local
855 (pi->hw.rp[0] * pi->bsp) / 200, in rv6xx_program_at()
856 (pi->hw.rp[1] * pi->bsp) / 200, in rv6xx_program_at()
857 (pi->hw.lp[2] * pi->bsp) / 200, in rv6xx_program_at()
858 (pi->hw.lp[1] * pi->bsp) / 200); in rv6xx_program_at()
939 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_get_master_voltage_mask() local
948 pi->hw.vddc[i], in rv6xx_get_master_voltage_mask()
1021 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_calculate_ap() local
1023 pi->hw.lp[0] = 0; in rv6xx_calculate_ap()
1024 pi->hw.rp[R600_PM_NUMBER_OF_ACTIVITY_LEVELS - 1] in rv6xx_calculate_ap()
1032 &pi->hw.lp[1], in rv6xx_calculate_ap()
1033 &pi->hw.rp[0]); in rv6xx_calculate_ap()
1040 &pi->hw.lp[2], in rv6xx_calculate_ap()
1041 &pi->hw.rp[1]); in rv6xx_calculate_ap()
1058 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_stepping_parameters_except_lowest_entry() local
1061 if (pi->voltage_control) in rv6xx_program_stepping_parameters_except_lowest_entry()
1071 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_stepping_parameters_lowest_entry() local
1074 if (pi->voltage_control) in rv6xx_program_stepping_parameters_lowest_entry()
1082 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_low() local
1085 pi->hw.low_vddc_index); in rv6xx_program_power_level_low()
1087 pi->hw.low_mclk_index); in rv6xx_program_power_level_low()
1089 pi->hw.low_sclk_index); in rv6xx_program_power_level_low()
1093 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_low()
1098 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_low_to_lowest_state() local
1108 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_low_to_lowest_state()
1114 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_medium() local
1117 pi->hw.medium_vddc_index); in rv6xx_program_power_level_medium()
1119 pi->hw.medium_mclk_index); in rv6xx_program_power_level_medium()
1121 pi->hw.medium_sclk_index); in rv6xx_program_power_level_medium()
1125 pi->hw.pcie_gen2[R600_POWER_LEVEL_MEDIUM]); in rv6xx_program_power_level_medium()
1130 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_medium_for_transition() local
1134 pi->hw.mclks[pi->hw.low_mclk_index]); in rv6xx_program_power_level_medium_for_transition()
1141 pi->hw.medium_sclk_index); in rv6xx_program_power_level_medium_for_transition()
1149 pi->hw.pcie_gen2[R600_POWER_LEVEL_LOW]); in rv6xx_program_power_level_medium_for_transition()
1154 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_program_power_level_high() local
1157 pi->hw.high_vddc_index); in rv6xx_program_power_level_high()
1159 pi->hw.high_mclk_index); in rv6xx_program_power_level_high()
1161 pi->hw.high_sclk_index); in rv6xx_program_power_level_high()
1167 pi->hw.pcie_gen2[R600_POWER_LEVEL_HIGH]); in rv6xx_program_power_level_high()
1336 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_high() local
1338 if ((pi->restricted_levels < 1) || in rv6xx_enable_high()
1339 (pi->restricted_levels == 3)) in rv6xx_enable_high()
1345 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_medium() local
1347 if (pi->restricted_levels < 2) in rv6xx_enable_medium()
1353 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_set_dpm_event_sources() local
1381 if (pi->thermal_protection) in rv6xx_set_dpm_event_sources()
1392 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_auto_throttle_source() local
1395 if (!(pi->active_auto_throttle_sources & (1 << source))) { in rv6xx_enable_auto_throttle_source()
1396 pi->active_auto_throttle_sources |= 1 << source; in rv6xx_enable_auto_throttle_source()
1397 rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv6xx_enable_auto_throttle_source()
1400 if (pi->active_auto_throttle_sources & (1 << source)) { in rv6xx_enable_auto_throttle_source()
1401 pi->active_auto_throttle_sources &= ~(1 << source); in rv6xx_enable_auto_throttle_source()
1402 rv6xx_set_dpm_event_sources(rdev, pi->active_auto_throttle_sources); in rv6xx_enable_auto_throttle_source()
1411 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_enable_thermal_protection() local
1413 if (pi->active_auto_throttle_sources) in rv6xx_enable_thermal_protection()
1423 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_generate_transition_stepping() local
1428 0, &pi->hw.medium_sclk_index); in rv6xx_generate_transition_stepping()
1435 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_generate_low_step() local
1437 pi->hw.low_sclk_index = 0; in rv6xx_generate_low_step()
1445 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_invalidate_intermediate_steps() local
1448 pi->hw.medium_sclk_index); in rv6xx_invalidate_intermediate_steps()
1455 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_generate_stepping_table() local
1457 pi->hw.low_sclk_index = 0; in rv6xx_generate_stepping_table()
1463 &pi->hw.medium_sclk_index); in rv6xx_generate_stepping_table()
1467 pi->hw.medium_sclk_index, in rv6xx_generate_stepping_table()
1468 &pi->hw.high_sclk_index); in rv6xx_generate_stepping_table()
1547 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_enable() local
1556 if (pi->dynamic_ss) in rv6xx_dpm_enable()
1571 if (pi->display_gap == false) in rv6xx_dpm_enable()
1578 if (pi->voltage_control) in rv6xx_dpm_enable()
1600 if (pi->voltage_control) in rv6xx_dpm_enable()
1603 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_enable()
1606 if (pi->gfx_clock_gating) in rv6xx_dpm_enable()
1614 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_disable() local
1626 if (pi->thermal_protection) in rv6xx_dpm_disable()
1638 if (pi->voltage_control) in rv6xx_dpm_disable()
1641 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_disable()
1650 if (pi->gfx_clock_gating) in rv6xx_dpm_disable()
1658 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_set_power_state() local
1663 pi->restricted_levels = 0; in rv6xx_dpm_set_power_state()
1671 if (pi->thermal_protection) in rv6xx_dpm_set_power_state()
1681 if (pi->voltage_control) { in rv6xx_dpm_set_power_state()
1690 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_set_power_state()
1693 if (pi->voltage_control) in rv6xx_dpm_set_power_state()
1699 if (pi->voltage_control) { in rv6xx_dpm_set_power_state()
1719 if (pi->voltage_control) { in rv6xx_dpm_set_power_state()
1731 if (pi->dynamic_pcie_gen2) in rv6xx_dpm_set_power_state()
1744 if (pi->thermal_protection) in rv6xx_dpm_set_power_state()
1936 struct rv6xx_power_info *pi; in rv6xx_dpm_init() local
1939 pi = kzalloc(sizeof(struct rv6xx_power_info), GFP_KERNEL); in rv6xx_dpm_init()
1940 if (pi == NULL) in rv6xx_dpm_init()
1942 rdev->pm.dpm.priv = pi; in rv6xx_dpm_init()
1960 pi->spll_ref_div = dividers.ref_div + 1; in rv6xx_dpm_init()
1962 pi->spll_ref_div = R600_REFERENCEDIVIDER_DFLT; in rv6xx_dpm_init()
1967 pi->mpll_ref_div = dividers.ref_div + 1; in rv6xx_dpm_init()
1969 pi->mpll_ref_div = R600_REFERENCEDIVIDER_DFLT; in rv6xx_dpm_init()
1972 pi->fb_div_scale = 1; in rv6xx_dpm_init()
1974 pi->fb_div_scale = 0; in rv6xx_dpm_init()
1976 pi->voltage_control = in rv6xx_dpm_init()
1979 pi->gfx_clock_gating = true; in rv6xx_dpm_init()
1981 pi->sclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv6xx_dpm_init()
1983 pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, in rv6xx_dpm_init()
1987 pi->sclk_ss = false; in rv6xx_dpm_init()
1989 if (pi->sclk_ss || pi->mclk_ss) in rv6xx_dpm_init()
1990 pi->dynamic_ss = true; in rv6xx_dpm_init()
1992 pi->dynamic_ss = false; in rv6xx_dpm_init()
1994 pi->dynamic_pcie_gen2 = true; in rv6xx_dpm_init()
1996 if (pi->gfx_clock_gating && in rv6xx_dpm_init()
1998 pi->thermal_protection = true; in rv6xx_dpm_init()
2000 pi->thermal_protection = false; in rv6xx_dpm_init()
2002 pi->display_gap = true; in rv6xx_dpm_init()
2133 struct rv6xx_power_info *pi = rv6xx_get_pi(rdev); in rv6xx_dpm_force_performance_level() local
2136 pi->restricted_levels = 3; in rv6xx_dpm_force_performance_level()
2138 pi->restricted_levels = 2; in rv6xx_dpm_force_performance_level()
2140 pi->restricted_levels = 0; in rv6xx_dpm_force_performance_level()
2151 if (pi->restricted_levels == 3) in rv6xx_dpm_force_performance_level()