Lines Matching refs:clk
42 read_div(struct mcp77_clk *clk) in read_div() argument
44 struct nvkm_device *device = clk->base.subdev.device; in read_div()
49 read_pll(struct mcp77_clk *clk, u32 base) in read_pll() argument
51 struct nvkm_device *device = clk->base.subdev.device; in read_pll()
54 u32 ref = nvkm_clk_read(&clk->base, nv_clk_src_href); in read_pll()
83 struct mcp77_clk *clk = mcp77_clk(base); in mcp77_clk_read() local
84 struct nvkm_subdev *subdev = &clk->base.subdev; in mcp77_clk_read()
95 return nvkm_clk_read(&clk->base, nv_clk_src_href) * 4; in mcp77_clk_read()
97 return nvkm_clk_read(&clk->base, nv_clk_src_href) * 2 / 3; in mcp77_clk_read()
100 case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm2d3); in mcp77_clk_read()
102 case 0x00080000: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4); in mcp77_clk_read()
103 case 0x000c0000: return nvkm_clk_read(&clk->base, nv_clk_src_cclk); in mcp77_clk_read()
110 case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P; in mcp77_clk_read()
112 case 0x00000002: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4) >> P; in mcp77_clk_read()
113 case 0x00000003: return read_pll(clk, 0x004028) >> P; in mcp77_clk_read()
118 return nvkm_clk_read(&clk->base, nv_clk_src_core); in mcp77_clk_read()
121 return nvkm_clk_read(&clk->base, nv_clk_src_core); in mcp77_clk_read()
124 case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_href); in mcp77_clk_read()
125 case 0x00000400: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4); in mcp77_clk_read()
126 case 0x00000800: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm2d3); in mcp77_clk_read()
134 return nvkm_clk_read(&clk->base, nv_clk_src_href) >> P; in mcp77_clk_read()
135 return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P; in mcp77_clk_read()
137 case 0x00000020: return read_pll(clk, 0x004028) >> P; in mcp77_clk_read()
138 case 0x00000030: return read_pll(clk, 0x004020) >> P; in mcp77_clk_read()
144 P = (read_div(clk) & 0x00000700) >> 8; in mcp77_clk_read()
148 return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P; in mcp77_clk_read()
162 calc_pll(struct mcp77_clk *clk, u32 reg, in calc_pll() argument
165 struct nvkm_subdev *subdev = &clk->base.subdev; in calc_pll()
174 pll.refclk = nvkm_clk_read(&clk->base, nv_clk_src_href); in calc_pll()
202 struct mcp77_clk *clk = mcp77_clk(base); in mcp77_clk_calc() local
206 struct nvkm_subdev *subdev = &clk->base.subdev; in mcp77_clk_calc()
212 if (core < nvkm_clk_read(&clk->base, nv_clk_src_hclkm4)) in mcp77_clk_calc()
213 out = calc_P(nvkm_clk_read(&clk->base, nv_clk_src_hclkm4), core, &divs); in mcp77_clk_calc()
216 clock = calc_pll(clk, 0x4028, (core << 1), &N, &M, &P1); in mcp77_clk_calc()
219 clk->csrc = nv_clk_src_hclkm4; in mcp77_clk_calc()
220 clk->cctrl = divs << 16; in mcp77_clk_calc()
230 clk->csrc = nv_clk_src_core; in mcp77_clk_calc()
231 clk->ccoef = (N << 8) | M; in mcp77_clk_calc()
233 clk->cctrl = (P2 + 1) << 16; in mcp77_clk_calc()
234 clk->cpost = (1 << P1) << 16; in mcp77_clk_calc()
239 if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) { in mcp77_clk_calc()
240 clk->ssrc = nv_clk_src_href; in mcp77_clk_calc()
242 clock = calc_pll(clk, 0x4020, shader, &N, &M, &P1); in mcp77_clk_calc()
243 if (clk->csrc == nv_clk_src_core) in mcp77_clk_calc()
249 clk->ssrc = nv_clk_src_core; in mcp77_clk_calc()
250 clk->sctrl = (divs + P2) << 16; in mcp77_clk_calc()
252 clk->ssrc = nv_clk_src_shader; in mcp77_clk_calc()
253 clk->scoef = (N << 8) | M; in mcp77_clk_calc()
254 clk->sctrl = P1 << 16; in mcp77_clk_calc()
262 clk->vsrc = nv_clk_src_cclk; in mcp77_clk_calc()
263 clk->vdiv = divs << 16; in mcp77_clk_calc()
265 clk->vsrc = nv_clk_src_vdec; in mcp77_clk_calc()
266 clk->vdiv = P1 << 16; in mcp77_clk_calc()
271 clk->ccoef, clk->cpost, clk->cctrl); in mcp77_clk_calc()
273 clk->scoef, clk->spost, clk->sctrl); in mcp77_clk_calc()
274 nvkm_debug(subdev, " vdiv: %08x\n", clk->vdiv); in mcp77_clk_calc()
275 if (clk->csrc == nv_clk_src_hclkm4) in mcp77_clk_calc()
280 if (clk->ssrc == nv_clk_src_hclkm4) in mcp77_clk_calc()
282 else if (clk->ssrc == nv_clk_src_core) in mcp77_clk_calc()
287 if (clk->vsrc == nv_clk_src_hclkm4) in mcp77_clk_calc()
298 struct mcp77_clk *clk = mcp77_clk(base); in mcp77_clk_prog() local
299 struct nvkm_subdev *subdev = &clk->base.subdev; in mcp77_clk_prog()
306 ret = gt215_clk_pre(&clk->base, f); in mcp77_clk_prog()
315 switch (clk->csrc) { in mcp77_clk_prog()
317 nvkm_mask(device, 0x4028, 0x00070000, clk->cctrl); in mcp77_clk_prog()
321 nvkm_wr32(device, 0x402c, clk->ccoef); in mcp77_clk_prog()
322 nvkm_wr32(device, 0x4028, 0x80000000 | clk->cctrl); in mcp77_clk_prog()
323 nvkm_wr32(device, 0x4040, clk->cpost); in mcp77_clk_prog()
332 switch (clk->ssrc) { in mcp77_clk_prog()
338 nvkm_mask(device, 0x4020, 0x00070000, clk->sctrl); in mcp77_clk_prog()
342 nvkm_wr32(device, 0x4024, clk->scoef); in mcp77_clk_prog()
343 nvkm_wr32(device, 0x4020, 0x80000000 | clk->sctrl); in mcp77_clk_prog()
344 nvkm_wr32(device, 0x4070, clk->spost); in mcp77_clk_prog()
360 switch (clk->vsrc) { in mcp77_clk_prog()
365 nvkm_wr32(device, 0x4600, clk->vdiv); in mcp77_clk_prog()
372 if (clk->csrc != nv_clk_src_core) { in mcp77_clk_prog()
377 if (clk->ssrc != nv_clk_src_shader) { in mcp77_clk_prog()
386 gt215_clk_post(&clk->base, f); in mcp77_clk_prog()
415 struct mcp77_clk *clk; in mcp77_clk_new() local
417 if (!(clk = kzalloc(sizeof(*clk), GFP_KERNEL))) in mcp77_clk_new()
419 *pclk = &clk->base; in mcp77_clk_new()
421 return nvkm_clk_ctor(&mcp77_clk, device, type, inst, true, &clk->base); in mcp77_clk_new()