Lines Matching refs:offset
43 init->offset, init_exec(init) ? \
365 return bit_I.offset; in init_table()
377 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
382 if (len >= offset + 2) { in init_table_()
383 data = nvbios_rd16(bios, data + offset); in init_table_()
461 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
468 return nvbios_rd08(bios, data + offset); in init_xlat_()
586 u8 opcode = nvbios_rd08(bios, init->offset); in init_reserved()
600 cont(" 0x%02x", nvbios_rd08(bios, init->offset + i)); in init_reserved()
602 init->offset += length; in init_reserved()
613 init->offset = 0x0000; in init_done()
624 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_prog()
625 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_prog()
626 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_prog()
627 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_prog()
628 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_prog()
629 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_prog()
635 init->offset += 11; in init_io_restrict_prog()
639 u32 data = nvbios_rd32(bios, init->offset); in init_io_restrict_prog()
648 init->offset += 4; in init_io_restrict_prog()
661 u8 count = nvbios_rd08(bios, init->offset + 1); in init_repeat()
665 init->offset += 2; in init_repeat()
667 init->repeat = init->offset; in init_repeat()
668 init->repend = init->offset; in init_repeat()
670 init->offset = init->repeat; in init_repeat()
675 init->offset = init->repend; in init_repeat()
687 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll()
688 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll()
689 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll()
690 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll()
691 s8 iofc = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll()
692 u8 count = nvbios_rd08(bios, init->offset + 7); in init_io_restrict_pll()
693 u32 reg = nvbios_rd32(bios, init->offset + 8); in init_io_restrict_pll()
699 init->offset += 12; in init_io_restrict_pll()
703 u32 freq = nvbios_rd16(bios, init->offset) * 10; in init_io_restrict_pll()
714 init->offset += 2; in init_io_restrict_pll()
727 init->offset += 1; in init_end_repeat()
730 init->repend = init->offset; in init_end_repeat()
731 init->offset = 0; in init_end_repeat()
743 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_copy()
744 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy()
745 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_copy()
746 u16 port = nvbios_rd16(bios, init->offset + 7); in init_copy()
747 u8 index = nvbios_rd08(bios, init->offset + 9); in init_copy()
748 u8 mask = nvbios_rd08(bios, init->offset + 10); in init_copy()
755 init->offset += 11; in init_copy()
770 init->offset += 1; in init_not()
782 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_flag_condition()
785 init->offset += 2; in init_io_flag_condition()
800 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_generic_condition()
801 u8 size = nvbios_rd08(bios, init->offset + 2); in init_generic_condition()
806 init->offset += 3; in init_generic_condition()
838 init->offset += size; in init_generic_condition()
851 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_mask_or()
856 init->offset += 2; in init_io_mask_or()
870 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_or()
875 init->offset += 2; in init_io_or()
889 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_andn_reg()
890 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_andn_reg()
893 init->offset += 9; in init_andn_reg()
906 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_or_reg()
907 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_or_reg()
910 init->offset += 9; in init_or_reg()
923 u32 creg = nvbios_rd32(bios, init->offset + 1); in init_idx_addr_latched()
924 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_idx_addr_latched()
925 u32 mask = nvbios_rd32(bios, init->offset + 9); in init_idx_addr_latched()
926 u32 data = nvbios_rd32(bios, init->offset + 13); in init_idx_addr_latched()
927 u8 count = nvbios_rd08(bios, init->offset + 17); in init_idx_addr_latched()
931 init->offset += 18; in init_idx_addr_latched()
934 u8 iaddr = nvbios_rd08(bios, init->offset + 0); in init_idx_addr_latched()
935 u8 idata = nvbios_rd08(bios, init->offset + 1); in init_idx_addr_latched()
938 init->offset += 2; in init_idx_addr_latched()
953 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll2()
954 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll2()
955 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll2()
956 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll2()
957 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll2()
958 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_pll2()
964 init->offset += 11; in init_io_restrict_pll2()
968 u32 freq = nvbios_rd32(bios, init->offset); in init_io_restrict_pll2()
975 init->offset += 4; in init_io_restrict_pll2()
988 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll2()
989 u32 freq = nvbios_rd32(bios, init->offset + 5); in init_pll2()
992 init->offset += 9; in init_pll2()
1005 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1006 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_byte()
1007 u8 count = nvbios_rd08(bios, init->offset + 3); in init_i2c_byte()
1010 init->offset += 4; in init_i2c_byte()
1013 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_i2c_byte()
1014 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1015 u8 data = nvbios_rd08(bios, init->offset + 2); in init_i2c_byte()
1019 init->offset += 3; in init_i2c_byte()
1036 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1037 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c_byte()
1038 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c_byte()
1041 init->offset += 4; in init_zm_i2c_byte()
1044 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_zm_i2c_byte()
1045 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1048 init->offset += 2; in init_zm_i2c_byte()
1062 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c()
1063 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c()
1064 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c()
1068 init->offset += 4; in init_zm_i2c()
1071 data[i] = nvbios_rd08(bios, init->offset); in init_zm_i2c()
1073 init->offset++; in init_zm_i2c()
1096 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_tmds()
1097 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_tmds()
1098 u8 mask = nvbios_rd08(bios, init->offset + 3); in init_tmds()
1099 u8 data = nvbios_rd08(bios, init->offset + 4); in init_tmds()
1104 init->offset += 5; in init_tmds()
1122 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1123 u8 count = nvbios_rd08(bios, init->offset + 2); in init_zm_tmds_group()
1127 init->offset += 3; in init_zm_tmds_group()
1130 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_tmds_group()
1131 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1134 init->offset += 2; in init_zm_tmds_group()
1149 u8 addr0 = nvbios_rd08(bios, init->offset + 1); in init_cr_idx_adr_latch()
1150 u8 addr1 = nvbios_rd08(bios, init->offset + 2); in init_cr_idx_adr_latch()
1151 u8 base = nvbios_rd08(bios, init->offset + 3); in init_cr_idx_adr_latch()
1152 u8 count = nvbios_rd08(bios, init->offset + 4); in init_cr_idx_adr_latch()
1156 init->offset += 5; in init_cr_idx_adr_latch()
1160 u8 data = nvbios_rd08(bios, init->offset); in init_cr_idx_adr_latch()
1163 init->offset += 1; in init_cr_idx_adr_latch()
1179 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_cr()
1180 u8 mask = nvbios_rd08(bios, init->offset + 2); in init_cr()
1181 u8 data = nvbios_rd08(bios, init->offset + 3); in init_cr()
1185 init->offset += 4; in init_cr()
1199 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_zm_cr()
1200 u8 data = nvbios_rd08(bios, init->offset + 2); in init_zm_cr()
1203 init->offset += 3; in init_zm_cr()
1216 u8 count = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1219 init->offset += 2; in init_zm_cr_group()
1222 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_cr_group()
1223 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1226 init->offset += 2; in init_zm_cr_group()
1240 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition_time()
1241 u8 retry = nvbios_rd08(bios, init->offset + 2); in init_condition_time()
1245 init->offset += 3; in init_condition_time()
1267 u16 msec = nvbios_rd16(bios, init->offset + 1); in init_ltime()
1270 init->offset += 3; in init_ltime()
1284 u32 base = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_sequence()
1285 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_sequence()
1288 init->offset += 6; in init_zm_reg_sequence()
1291 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_sequence()
1294 init->offset += 4; in init_zm_reg_sequence()
1309 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll_indirect()
1310 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_pll_indirect()
1315 init->offset += 7; in init_pll_indirect()
1328 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_indirect()
1329 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_zm_reg_indirect()
1334 init->offset += 7; in init_zm_reg_indirect()
1347 u16 addr = nvbios_rd16(bios, init->offset + 1); in init_sub_direct()
1353 save = init->offset; in init_sub_direct()
1354 init->offset = addr; in init_sub_direct()
1359 init->offset = save; in init_sub_direct()
1362 init->offset += 3; in init_sub_direct()
1373 u16 offset = nvbios_rd16(bios, init->offset + 1); in init_jump() local
1375 trace("JUMP\t0x%04x\n", offset); in init_jump()
1378 init->offset = offset; in init_jump()
1380 init->offset += 3; in init_jump()
1391 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_if()
1392 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_i2c_if()
1393 u8 reg = nvbios_rd08(bios, init->offset + 3); in init_i2c_if()
1394 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_i2c_if()
1395 u8 data = nvbios_rd08(bios, init->offset + 5); in init_i2c_if()
1400 init->offset += 6; in init_i2c_if()
1418 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_nv_reg()
1419 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy_nv_reg()
1420 u32 smask = nvbios_rd32(bios, init->offset + 6); in init_copy_nv_reg()
1421 u32 sxor = nvbios_rd32(bios, init->offset + 10); in init_copy_nv_reg()
1422 u32 dreg = nvbios_rd32(bios, init->offset + 14); in init_copy_nv_reg()
1423 u32 dmask = nvbios_rd32(bios, init->offset + 18); in init_copy_nv_reg()
1430 init->offset += 22; in init_copy_nv_reg()
1444 u16 port = nvbios_rd16(bios, init->offset + 1); in init_zm_index_io()
1445 u8 index = nvbios_rd08(bios, init->offset + 3); in init_zm_index_io()
1446 u8 data = nvbios_rd08(bios, init->offset + 4); in init_zm_index_io()
1449 init->offset += 5; in init_zm_index_io()
1464 init->offset += 1; in init_compute_mem()
1480 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_reset()
1481 u32 data1 = nvbios_rd32(bios, init->offset + 5); in init_reset()
1482 u32 data2 = nvbios_rd32(bios, init->offset + 9); in init_reset()
1486 init->offset += 13; in init_reset()
1520 init->offset += 1; in init_configure_mem()
1569 init->offset += 1; in init_configure_clk()
1603 init->offset += 1; in init_configure_preinit()
1626 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io()
1627 u8 mask = nvbios_rd16(bios, init->offset + 3); in init_io()
1628 u8 data = nvbios_rd16(bios, init->offset + 4); in init_io()
1632 init->offset += 5; in init_io()
1666 u8 index = nvbios_rd08(bios, init->offset + 1); in init_sub()
1673 save = init->offset; in init_sub()
1674 init->offset = addr; in init_sub()
1679 init->offset = save; in init_sub()
1682 init->offset += 2; in init_sub()
1693 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_ram_condition()
1694 u8 value = nvbios_rd08(bios, init->offset + 2); in init_ram_condition()
1698 init->offset += 3; in init_ram_condition()
1712 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_nv_reg()
1713 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_nv_reg()
1714 u32 data = nvbios_rd32(bios, init->offset + 9); in init_nv_reg()
1717 init->offset += 13; in init_nv_reg()
1730 u8 macro = nvbios_rd08(bios, init->offset + 1); in init_macro()
1743 init->offset += 2; in init_macro()
1754 init->offset += 1; in init_resume()
1766 u32 mask = nvbios_rd32(bios, init->offset + 1); in init_strap_condition()
1767 u32 value = nvbios_rd32(bios, init->offset + 5); in init_strap_condition()
1770 init->offset += 9; in init_strap_condition()
1784 u16 usec = nvbios_rd16(bios, init->offset + 1); in init_time()
1787 init->offset += 3; in init_time()
1805 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition()
1808 init->offset += 2; in init_condition()
1822 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_condition()
1825 init->offset += 2; in init_io_condition()
1839 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg16()
1840 u16 data = nvbios_rd16(bios, init->offset + 5); in init_zm_reg16()
1843 init->offset += 7; in init_zm_reg16()
1856 u16 port = nvbios_rd16(bios, init->offset + 1); in init_index_io()
1857 u8 index = nvbios_rd16(bios, init->offset + 3); in init_index_io()
1858 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_index_io()
1859 u8 data = nvbios_rd08(bios, init->offset + 5); in init_index_io()
1864 init->offset += 6; in init_index_io()
1878 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll()
1879 u32 freq = nvbios_rd16(bios, init->offset + 5) * 10; in init_pll()
1882 init->offset += 7; in init_pll()
1895 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg()
1896 u32 data = nvbios_rd32(bios, init->offset + 5); in init_zm_reg()
1899 init->offset += 9; in init_zm_reg()
1915 u8 type = nvbios_rd08(bios, init->offset + 1); in init_ram_restrict_pll()
1921 init->offset += 2; in init_ram_restrict_pll()
1924 u32 freq = nvbios_rd32(bios, init->offset); in init_ram_restrict_pll()
1933 init->offset += 4; in init_ram_restrict_pll()
1945 init->offset += 1; in init_reset_begun()
1956 init->offset += 1; in init_reset_end()
1969 init->offset += 1; in init_gpio()
1983 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_ram_restrict_zm_reg_group()
1984 u8 incr = nvbios_rd08(bios, init->offset + 5); in init_ram_restrict_zm_reg_group()
1985 u8 num = nvbios_rd08(bios, init->offset + 6); in init_ram_restrict_zm_reg_group()
1992 init->offset += 7; in init_ram_restrict_zm_reg_group()
1997 u32 data = nvbios_rd32(bios, init->offset); in init_ram_restrict_zm_reg_group()
2006 init->offset += 4; in init_ram_restrict_zm_reg_group()
2021 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_zm_reg()
2022 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_copy_zm_reg()
2025 init->offset += 9; in init_copy_zm_reg()
2038 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_group()
2039 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_group()
2042 init->offset += 6; in init_zm_reg_group()
2045 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_group()
2048 init->offset += 4; in init_zm_reg_group()
2060 u32 saddr = nvbios_rd32(bios, init->offset + 1); in init_xlat()
2061 u8 sshift = nvbios_rd08(bios, init->offset + 5); in init_xlat()
2062 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_xlat()
2063 u8 index = nvbios_rd08(bios, init->offset + 7); in init_xlat()
2064 u32 daddr = nvbios_rd32(bios, init->offset + 8); in init_xlat()
2065 u32 dmask = nvbios_rd32(bios, init->offset + 12); in init_xlat()
2066 u8 shift = nvbios_rd08(bios, init->offset + 16); in init_xlat()
2073 init->offset += 17; in init_xlat()
2088 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_mask_add()
2089 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_zm_mask_add()
2090 u32 add = nvbios_rd32(bios, init->offset + 9); in init_zm_mask_add()
2094 init->offset += 13; in init_zm_mask_add()
2109 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_auxch()
2110 u8 count = nvbios_rd08(bios, init->offset + 5); in init_auxch()
2113 init->offset += 6; in init_auxch()
2116 u8 mask = nvbios_rd08(bios, init->offset + 0); in init_auxch()
2117 u8 data = nvbios_rd08(bios, init->offset + 1); in init_auxch()
2121 init->offset += 2; in init_auxch()
2133 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_auxch()
2134 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_auxch()
2137 init->offset += 6; in init_zm_auxch()
2140 u8 data = nvbios_rd08(bios, init->offset + 0); in init_zm_auxch()
2143 init->offset += 1; in init_zm_auxch()
2155 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_long_if()
2156 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_long_if()
2157 u8 reglo = nvbios_rd08(bios, init->offset + 3); in init_i2c_long_if()
2158 u8 reghi = nvbios_rd08(bios, init->offset + 4); in init_i2c_long_if()
2159 u8 mask = nvbios_rd08(bios, init->offset + 5); in init_i2c_long_if()
2160 u8 data = nvbios_rd08(bios, init->offset + 6); in init_i2c_long_if()
2166 init->offset += 7; in init_i2c_long_if()
2196 u8 count = nvbios_rd08(bios, init->offset + 1); in init_gpio_ne()
2201 init->offset += 2; in init_gpio_ne()
2203 for (i = init->offset; i < init->offset + count; i++) in init_gpio_ne()
2209 for (i = init->offset; i < init->offset + count; i++) { in init_gpio_ne()
2215 if (i == (init->offset + count)) { in init_gpio_ne()
2224 init->offset += count; in init_gpio_ne()
2307 while (init->offset) { in nvbios_exec()
2308 u8 opcode = nvbios_rd08(bios, init->offset); in nvbios_exec()