Lines Matching refs:lsfw
31 struct nvkm_acr_lsfw *lsfw; in ga102_acr_wpr_patch() local
42 list_for_each_entry(lsfw, &acr->lsfw, head) { in ga102_acr_wpr_patch()
43 if (lsfw->id != hdr.wpr.falcon_id) in ga102_acr_wpr_patch()
49 lsfw->func->bld_patch(acr, lsb->bl_data_off, adjust); in ga102_acr_wpr_patch()
61 ga102_acr_wpr_build_lsb(struct nvkm_acr *acr, struct nvkm_acr_lsfw *lsfw) in ga102_acr_wpr_build_lsb() argument
66 if (WARN_ON(lsfw->sig->size != sizeof(hdr->signature))) in ga102_acr_wpr_build_lsb()
77 memcpy(&hdr->signature, lsfw->sig->data, lsfw->sig->size); in ga102_acr_wpr_build_lsb()
78 hdr->ucode_off = lsfw->offset.img; in ga102_acr_wpr_build_lsb()
79 hdr->ucode_size = lsfw->ucode_size; in ga102_acr_wpr_build_lsb()
80 hdr->data_size = lsfw->data_size; in ga102_acr_wpr_build_lsb()
81 hdr->bl_code_size = lsfw->bootloader_size; in ga102_acr_wpr_build_lsb()
82 hdr->bl_imem_off = lsfw->bootloader_imem_offset; in ga102_acr_wpr_build_lsb()
83 hdr->bl_data_off = lsfw->offset.bld; in ga102_acr_wpr_build_lsb()
84 hdr->bl_data_size = lsfw->bl_data_size; in ga102_acr_wpr_build_lsb()
85 hdr->app_code_off = lsfw->app_start_offset + lsfw->app_resident_code_offset; in ga102_acr_wpr_build_lsb()
86 hdr->app_code_size = ALIGN(lsfw->app_resident_code_size, 0x100); in ga102_acr_wpr_build_lsb()
87 hdr->app_data_off = lsfw->app_start_offset + lsfw->app_resident_data_offset; in ga102_acr_wpr_build_lsb()
88 hdr->app_data_size = ALIGN(lsfw->app_resident_data_size, 0x100); in ga102_acr_wpr_build_lsb()
89 hdr->app_imem_offset = lsfw->app_imem_offset; in ga102_acr_wpr_build_lsb()
90 hdr->app_dmem_offset = lsfw->app_dmem_offset; in ga102_acr_wpr_build_lsb()
91 hdr->flags = lsfw->func->flags; in ga102_acr_wpr_build_lsb()
96 if (lsfw->secure_bootloader) { in ga102_acr_wpr_build_lsb()
103 .sig_size = lsfw->sig_size, in ga102_acr_wpr_build_lsb()
104 .sig_nr = lsfw->sig_nr, in ga102_acr_wpr_build_lsb()
105 .sigs = lsfw->sigs, in ga102_acr_wpr_build_lsb()
106 .fuse_ver = lsfw->fuse_ver, in ga102_acr_wpr_build_lsb()
107 .engine_id = lsfw->engine_id, in ga102_acr_wpr_build_lsb()
108 .ucode_id = lsfw->ucode_id, in ga102_acr_wpr_build_lsb()
109 .falcon = lsfw->falcon, in ga102_acr_wpr_build_lsb()
118 hdr->hs_fmc_params.engid_mask = lsfw->engine_id; in ga102_acr_wpr_build_lsb()
119 hdr->hs_fmc_params.ucode_id = lsfw->ucode_id; in ga102_acr_wpr_build_lsb()
120 hdr->hs_fmc_params.fuse_ver = lsfw->fuse_ver; in ga102_acr_wpr_build_lsb()
126 nvkm_wobj(acr->wpr, lsfw->offset.lsb, hdr, sizeof(*hdr)); in ga102_acr_wpr_build_lsb()
134 struct nvkm_acr_lsfw *lsfw; in ga102_acr_wpr_build() local
147 list_for_each_entry(lsfw, &acr->lsfw, head) { in ga102_acr_wpr_build()
148 struct lsf_signature_v2 *sig = (void *)lsfw->sig->data; in ga102_acr_wpr_build()
153 hdr.wpr.falcon_id = lsfw->id; in ga102_acr_wpr_build()
154 hdr.wpr.lsb_offset = lsfw->offset.lsb; in ga102_acr_wpr_build()
165 ret = ga102_acr_wpr_build_lsb(acr, lsfw); in ga102_acr_wpr_build()
170 nvkm_wobj(acr->wpr, lsfw->offset.img, in ga102_acr_wpr_build()
171 lsfw->img.data, in ga102_acr_wpr_build()
172 lsfw->img.size); in ga102_acr_wpr_build()
175 lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw); in ga102_acr_wpr_build()
190 struct nvkm_acr_lsfw *lsfw; in ga102_acr_wpr_layout() local
198 list_for_each_entry(lsfw, &acr->lsfw, head) { in ga102_acr_wpr_layout()
200 lsfw->offset.lsb = wpr; in ga102_acr_wpr_layout()
204 lsfw->offset.img = wpr; in ga102_acr_wpr_layout()
205 wpr += lsfw->img.size; in ga102_acr_wpr_layout()
208 lsfw->offset.bld = wpr; in ga102_acr_wpr_layout()
209 lsfw->bl_data_size = ALIGN(lsfw->func->bld_size, 256); in ga102_acr_wpr_layout()
210 wpr += lsfw->bl_data_size; in ga102_acr_wpr_layout()