44 	struct gf100_dmaobj *dmaobj = gf100_dmaobj(base);  in gf100_dmaobj_bind()  local
45 	struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device;  in gf100_dmaobj_bind()
51 		nvkm_wo32(*pgpuobj, 0x00, dmaobj->flags0);  in gf100_dmaobj_bind()
52 		nvkm_wo32(*pgpuobj, 0x04, lower_32_bits(dmaobj->base.limit));  in gf100_dmaobj_bind()
53 		nvkm_wo32(*pgpuobj, 0x08, lower_32_bits(dmaobj->base.start));  in gf100_dmaobj_bind()
54 		nvkm_wo32(*pgpuobj, 0x0c, upper_32_bits(dmaobj->base.limit) << 24 |  in gf100_dmaobj_bind()
55 					  upper_32_bits(dmaobj->base.start));  in gf100_dmaobj_bind()
57 		nvkm_wo32(*pgpuobj, 0x14, dmaobj->flags5);  in gf100_dmaobj_bind()
77 	struct gf100_dmaobj *dmaobj;  in gf100_dmaobj_new()  local
81 	if (!(dmaobj = kzalloc(sizeof(*dmaobj), GFP_KERNEL)))  in gf100_dmaobj_new()
83 	*pdmaobj = &dmaobj->base;  in gf100_dmaobj_new()
86 			       &data, &size, &dmaobj->base);  in gf100_dmaobj_new()
103 		if (dmaobj->base.target != NV_MEM_TARGET_VM) {  in gf100_dmaobj_new()
117 	dmaobj->flags0 |= (kind << 22) | (user << 20) | oclass->base.oclass;  in gf100_dmaobj_new()
118 	dmaobj->flags5 |= (unkn << 16);  in gf100_dmaobj_new()
120 	switch (dmaobj->base.target) {  in gf100_dmaobj_new()
122 		dmaobj->flags0 |= 0x00000000;  in gf100_dmaobj_new()
125 		dmaobj->flags0 |= 0x00010000;  in gf100_dmaobj_new()
128 		dmaobj->flags0 |= 0x00020000;  in gf100_dmaobj_new()
131 		dmaobj->flags0 |= 0x00030000;  in gf100_dmaobj_new()
137 	switch (dmaobj->base.access) {  in gf100_dmaobj_new()
141 		dmaobj->flags0 |= 0x00040000;  in gf100_dmaobj_new()
145 		dmaobj->flags0 |= 0x00080000;  in gf100_dmaobj_new()