38 	const u32 soff = ior->id * 0x800;  in gt215_sor_hda_eld()  local
42 		nvkm_wr32(device, 0x61c440 + soff, (i << 8) | data[i]);  in gt215_sor_hda_eld()
44 		nvkm_wr32(device, 0x61c440 + soff, (i << 8));  in gt215_sor_hda_eld()
45 	nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002);  in gt215_sor_hda_eld()
71 	const u32 soff = nv50_ior_base(sor);  in gt215_sor_dp_audio()  local
75 	nvkm_mask(device, 0x61c1e0 + soff, mask, data);  in gt215_sor_dp_audio()
77 		if (!(nvkm_rd32(device, 0x61c1e0 + soff) & 0x80000000))  in gt215_sor_dp_audio()
100 	const u32 soff = nv50_ior_base(ior);  in gt215_sor_hdmi_infoframe_vsi()  local
104 	nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);  in gt215_sor_hdmi_infoframe_vsi()
108 	nvkm_wr32(device, 0x61c544 + soff, vsi.header);  in gt215_sor_hdmi_infoframe_vsi()
109 	nvkm_wr32(device, 0x61c548 + soff, vsi.subpack0_low);  in gt215_sor_hdmi_infoframe_vsi()
110 	nvkm_wr32(device, 0x61c54c + soff, vsi.subpack0_high);  in gt215_sor_hdmi_infoframe_vsi()
115 	nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010001);  in gt215_sor_hdmi_infoframe_vsi()
123 	const u32 soff = nv50_ior_base(ior);  in gt215_sor_hdmi_infoframe_avi()  local
127 	nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);  in gt215_sor_hdmi_infoframe_avi()
131 	nvkm_wr32(device, 0x61c528 + soff, avi.header);  in gt215_sor_hdmi_infoframe_avi()
132 	nvkm_wr32(device, 0x61c52c + soff, avi.subpack0_low);  in gt215_sor_hdmi_infoframe_avi()
133 	nvkm_wr32(device, 0x61c530 + soff, avi.subpack0_high);  in gt215_sor_hdmi_infoframe_avi()
134 	nvkm_wr32(device, 0x61c534 + soff, avi.subpack1_low);  in gt215_sor_hdmi_infoframe_avi()
135 	nvkm_wr32(device, 0x61c538 + soff, avi.subpack1_high);  in gt215_sor_hdmi_infoframe_avi()
137 	nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000001);  in gt215_sor_hdmi_infoframe_avi()
148 	const u32 soff = nv50_ior_base(ior);  in gt215_sor_hdmi_ctrl()  local
151 		nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000);  in gt215_sor_hdmi_ctrl()
152 		nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000);  in gt215_sor_hdmi_ctrl()
153 		nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000);  in gt215_sor_hdmi_ctrl()
154 		nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);  in gt215_sor_hdmi_ctrl()
159 	nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000);  in gt215_sor_hdmi_ctrl()
160 	nvkm_wr32(device, 0x61c508 + soff, 0x000a0184);  in gt215_sor_hdmi_ctrl()
161 	nvkm_wr32(device, 0x61c50c + soff, 0x00000071);  in gt215_sor_hdmi_ctrl()
162 	nvkm_wr32(device, 0x61c510 + soff, 0x00000000);  in gt215_sor_hdmi_ctrl()
163 	nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000001);  in gt215_sor_hdmi_ctrl()
165 	nvkm_mask(device, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */  in gt215_sor_hdmi_ctrl()
166 	nvkm_mask(device, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */  in gt215_sor_hdmi_ctrl()
167 	nvkm_mask(device, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */  in gt215_sor_hdmi_ctrl()
175 	nvkm_mask(device, 0x61c5a4 + soff, 0x5f1f007f, ctrl);  in gt215_sor_hdmi_ctrl()