Lines Matching refs:b32
32 ctx_object: .b32 0
35 ctx_dma_query: .b32 0
36 ctx_dma_src: .b32 0
37 ctx_dma_dst: .b32 0
40 ctx_query_address_high: .b32 0
41 ctx_query_address_low: .b32 0
42 ctx_query_counter: .b32 0
43 ctx_src_address_high: .b32 0
44 ctx_src_address_low: .b32 0
45 ctx_src_pitch: .b32 0
46 ctx_src_tile_mode: .b32 0
47 ctx_src_xsize: .b32 0
48 ctx_src_ysize: .b32 0
49 ctx_src_zsize: .b32 0
50 ctx_src_zoff: .b32 0
51 ctx_src_xoff: .b32 0
52 ctx_src_yoff: .b32 0
53 ctx_src_cpp: .b32 0
54 ctx_dst_address_high: .b32 0
55 ctx_dst_address_low: .b32 0
56 ctx_dst_pitch: .b32 0
57 ctx_dst_tile_mode: .b32 0
58 ctx_dst_xsize: .b32 0
59 ctx_dst_ysize: .b32 0
60 ctx_dst_zsize: .b32 0
61 ctx_dst_zoff: .b32 0
62 ctx_dst_xoff: .b32 0
63 ctx_dst_yoff: .b32 0
64 ctx_dst_cpp: .b32 0
65 ctx_format: .b32 0
66 ctx_swz_const0: .b32 0
67 ctx_swz_const1: .b32 0
68 ctx_xcnt: .b32 0
69 ctx_ycnt: .b32 0
75 .b32 #ctx_object ~0xffffffff
78 .b32 0x00010000 + #cmd_nop ~0xffffffff
81 .b32 0x00010000 + #cmd_pm_trigger ~0xffffffff
86 .b32 0x00010000 + #cmd_dma ~0xffffffff
87 .b32 0x00010000 + #cmd_dma ~0xffffffff
88 .b32 0x00010000 + #cmd_dma ~0xffffffff
92 .b32 #ctx_src_tile_mode ~0x00000fff
93 .b32 #ctx_src_xsize ~0x0007ffff
94 .b32 #ctx_src_ysize ~0x00001fff
95 .b32 #ctx_src_zsize ~0x000007ff
96 .b32 #ctx_src_zoff ~0x00000fff
97 .b32 #ctx_src_xoff ~0x0007ffff
98 .b32 #ctx_src_yoff ~0x00001fff
101 .b32 #ctx_dst_tile_mode ~0x00000fff
102 .b32 #ctx_dst_xsize ~0x0007ffff
103 .b32 #ctx_dst_ysize ~0x00001fff
104 .b32 #ctx_dst_zsize ~0x000007ff
105 .b32 #ctx_dst_zoff ~0x00000fff
106 .b32 #ctx_dst_xoff ~0x0007ffff
107 .b32 #ctx_dst_yoff ~0x00001fff
110 .b32 0x00010000 + #cmd_exec ~0xffffffff
111 .b32 0x00010000 + #cmd_wrcache_flush ~0xffffffff
114 .b32 #ctx_src_address_high ~0x000000ff
115 .b32 #ctx_src_address_low ~0xffffffff
116 .b32 #ctx_dst_address_high ~0x000000ff
117 .b32 #ctx_dst_address_low ~0xffffffff
118 .b32 #ctx_src_pitch ~0x0007ffff
119 .b32 #ctx_dst_pitch ~0x0007ffff
120 .b32 #ctx_xcnt ~0x0000ffff
121 .b32 #ctx_ycnt ~0x00001fff
122 .b32 #ctx_format ~0x0333ffff
123 .b32 #ctx_swz_const0 ~0xffffffff
124 .b32 #ctx_swz_const1 ~0xffffffff
125 .b32 #ctx_query_address_high ~0x000000ff
126 .b32 #ctx_query_address_low ~0xffffffff
127 .b32 #ctx_query_counter ~0xffffffff
137 clear b32 $r0
194 shl b32 $r4 4
195 add b32 $r4 0x30
199 shl b32 $r15 6
204 shl b32 $r5 $r3 4
205 add b32 $r5 2
209 sub b32 $r5 0x100
211 not b32 $r6
221 ld b32 $r4 D[$r5 + 0]
222 shr b32 $r4 8
223 ld b32 $r6 D[$r5 + 4]
224 shl b32 $r6 24
229 mov b32 $r4 $r0
272 ld b32 $r7 D[$r5 + $r6 * 4]
273 add b32 $r8 $r6 0x180
274 shl b32 $r8 8
276 sub b32 $r6 1
291 shl b32 $r2 0x10
295 clear b32 $r6
296 clear b32 $r7
300 add b32 $r5 4
301 cmpu b32 $r4 $r6
303 add b32 $r7 $r6
304 cmpu b32 $r4 $r7
306 sub b32 $r7 $r6
307 shl b32 $r7 3
308 add b32 $r5 $r7
313 sub b32 $r4 $r6
314 shl b32 $r4 3
315 add b32 $r4 $r5
316 ld b32 $r5 D[$r4 + 4]
318 cmpu b32 $r5 0
324 cmpu b32 $r6 0
326 st b32 D[$r5] $r3
349 cmpu b32 $r2 0
387 clear b32 $r3
406 sub b32 $r4 #dispatch_dma
407 shr b32 $r4 1
409 st b32 D[$r4 + #ctx_dma] $r3
410 add b32 $r4 0x600
411 shl b32 $r4 6
421 st b32 D[$sp + 0x00] $r0
422 st b32 D[$sp + 0x04] $r0
423 st b32 D[$sp + 0x08] $r0
424 st b32 D[$sp + 0x0c] $r0
427 ld b32 $r4 D[$r0 + #ctx_format]
429 add b32 $r5 1
431 add b32 $r6 1
433 add b32 $r7 1
437 clear b32 $r8
438 clear b32 $r9
441 shr b32 $r4 4
442 clear b32 $r11
447 add b32 $r12 $r11
453 add b32 $r12 $r11
459 add b32 $r12 $r11
465 add b32 $r8 1
466 add b32 $r11 1
467 cmpu b32 $r11 $r5
469 add b32 $r9 1
470 cmpu b32 $r9 $r7
475 st b32 D[$r0 + #ctx_src_cpp] $r6
476 ld b32 $r8 D[$r0 + #ctx_xcnt]
479 clear b32 $r6
483 st b32 D[$r0 + #ctx_dst_cpp] $r7
487 shl b32 $r5 6
490 add b32 $r5 0x800
491 ld b32 $r6 D[$r0 + #ctx_dst_cpp]
492 sub b32 $r6 1
493 shl b32 $r6 8
494 ld b32 $r7 D[$r0 + #ctx_src_cpp]
495 sub b32 $r7 1
498 add b32 $r5 0x100
499 ld b32 $r6 D[$sp + 0x00]
501 ld b32 $r6 D[$sp + 0x04]
503 ld b32 $r6 D[$sp + 0x08]
505 ld b32 $r6 D[$sp + 0x0c]
507 add b32 $r5 0x400
508 ld b32 $r6 D[$r0 + #ctx_swz_const0]
510 ld b32 $r6 D[$r0 + #ctx_swz_const1]
540 ld b32 $r7 D[$r5 + #ctx_src_tile_mode]
544 add b32 $r8 2
546 add b32 $r8 3
549 cmp b32 $r7 0xe
555 add b32 $r7 17
562 ld b32 $r10 D[$r5 + #ctx_src_xoff]
563 ld b32 $r11 D[$r5 + #ctx_src_cpp]
566 shl b32 $r11 $r7
567 sub b32 $r11 1
569 shr b32 $r10 $r7
573 ld b32 $r13 D[$r5 + #ctx_src_yoff]
575 shl b32 $r14 $r8
576 sub b32 $r14 1
578 shr b32 $r13 $r8
581 add b32 $r14 1
582 shl b32 $r15 $r14 12
583 sub b32 $r14 $r11
586 add b32 $r6 0x208
587 shl b32 $r6 8
591 shl b32 $r11 $r7
592 add b32 $r12 $r11
595 ld b32 $r15 D[$r5 + #ctx_src_xsize]
596 ld b32 $r11 D[$r5 + #ctx_src_cpp]
599 shl b32 $r11 $r7
600 sub b32 $r11 1
601 add b32 $r15 $r11
602 shr b32 $r15 $r7
606 ld b32 $r15 D[$r5 + #ctx_src_ysize]
608 shl b32 $r11 $r8
609 sub b32 $r11 1
610 add b32 $r15 $r11
611 shr b32 $r15 $r8
616 add b32 $r7 $r8
617 sub b32 $r8 2
619 shl b32 $r11 $r8
620 shl b32 $r11 $r9
626 ld b32 $r8 D[$r5 + #ctx_src_zoff]
628 shl b32 $r14 $r9
629 sub b32 $r14 1
631 shl b32 $r15 $r7
632 add b32 $r12 $r15
633 add b32 $r7 $r9
634 shr b32 $r8 $r9
640 add b32 $r10 $r13
643 add b32 $r10 $r8
644 shl b32 $r10 $r7
647 sub b32 $r9 1
648 shl b32 $r9 $r7
653 ld b32 $r7 D[$r5 + #ctx_src_address_low]
654 ld b32 $r8 D[$r5 + #ctx_src_address_high]
655 add b32 $r10 $r12
656 add b32 $r7 $r10
657 adc b32 $r8 0
658 shl b32 $r8 16
660 sub b32 $r6 0x600
662 add b32 $r6 0x400
672 add b32 $r6 0x202
673 shl b32 $r6 8
674 ld b32 $r7 D[$r5 + #ctx_src_address_low]
676 add b32 $r6 0x400
677 ld b32 $r7 D[$r5 + #ctx_src_address_high]
678 shl b32 $r7 16
680 add b32 $r6 0x400
681 ld b32 $r7 D[$r5 + #ctx_src_pitch]
690 shl b32 $r0 6
705 shl b32 $r4 6
706 ld b32 $r5 D[$r0 + #ctx_query_address_low]
707 add b32 $r5 4
712 add b32 $r4 0x400
713 ld b32 $r5 D[$r0 + #ctx_query_address_high]
714 shl b32 $r5 16
716 add b32 $r4 0x500
721 shl b32 $r5 1
733 shl b32 $r4 6
740 shl b32 $r4 6
741 ld b32 $r5 D[$r0 + #ctx_query_address_low]
746 add b32 $r4 0x400
747 ld b32 $r5 D[$r0 + #ctx_query_address_high]
748 shl b32 $r5 16
750 add b32 $r4 0x500
756 ld b32 $r5 D[$r0 + #ctx_query_counter]
757 add b32 $r4 0x500
762 shl b32 $r4 6
795 shl b32 $r6 6
797 st b32 D[$r0 + #ctx_src_cpp] $r7
798 st b32 D[$r0 + #ctx_dst_cpp] $r7
799 ld b32 $r7 D[$r0 + #ctx_xcnt]
802 clear b32 $r4
806 clear b32 $r5
828 shl b32 $r5 6
829 ld b32 $r6 D[$r0 + #ctx_ycnt]
859 clear b32 $r3