31 struct msm_mdss {  struct
48 					    struct msm_mdss *msm_mdss)  in msm_mdss_parse_data_bus_icc_path()  argument
57 	msm_mdss->path[0] = path0;  in msm_mdss_parse_data_bus_icc_path()
58 	msm_mdss->num_paths = 1;  in msm_mdss_parse_data_bus_icc_path()
62 		msm_mdss->path[1] = path1;  in msm_mdss_parse_data_bus_icc_path()
63 		msm_mdss->num_paths++;  in msm_mdss_parse_data_bus_icc_path()
71 	struct msm_mdss *msm_mdss = data;  in msm_mdss_put_icc_path()  local
74 	for (i = 0; i < msm_mdss->num_paths; i++)  in msm_mdss_put_icc_path()
75 		icc_put(msm_mdss->path[i]);  in msm_mdss_put_icc_path()
78 static void msm_mdss_icc_request_bw(struct msm_mdss *msm_mdss, unsigned long bw)  in msm_mdss_icc_request_bw()  argument
82 	for (i = 0; i < msm_mdss->num_paths; i++)  in msm_mdss_icc_request_bw()
83 		icc_set_bw(msm_mdss->path[i], 0, Bps_to_icc(bw));  in msm_mdss_icc_request_bw()
88 	struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc);  in msm_mdss_irq()  local
94 	interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);  in msm_mdss_irq()
100 		rc = generic_handle_domain_irq(msm_mdss->irq_controller.domain,  in msm_mdss_irq()
103 			dev_err(msm_mdss->dev, "handle irq fail: irq=%lu rc=%d\n",  in msm_mdss_irq()
116 	struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);  in msm_mdss_irq_mask()  local
120 	clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);  in msm_mdss_irq_mask()
127 	struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);  in msm_mdss_irq_unmask()  local
131 	set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);  in msm_mdss_irq_unmask()
147 	struct msm_mdss *msm_mdss = domain->host_data;  in msm_mdss_irqdomain_map()  local
152 	return irq_set_chip_data(irq, msm_mdss);  in msm_mdss_irqdomain_map()
160 static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)  in _msm_mdss_irq_domain_add()  argument
165 	dev = msm_mdss->dev;  in _msm_mdss_irq_domain_add()
168 			&msm_mdss_irqdomain_ops, msm_mdss);  in _msm_mdss_irq_domain_add()
174 	msm_mdss->irq_controller.enabled_mask = 0;  in _msm_mdss_irq_domain_add()
175 	msm_mdss->irq_controller.domain = domain;  in _msm_mdss_irq_domain_add()
180 static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_20()  argument
182 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_20()
184 	writel_relaxed(data->ubwc_static, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_20()
187 static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_30()  argument
189 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_30()
200 	writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_30()
203 static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss)  in msm_mdss_setup_ubwc_dec_40()  argument
205 	const struct msm_mdss_data *data = msm_mdss->mdss_data;  in msm_mdss_setup_ubwc_dec_40()
211 	writel_relaxed(value, msm_mdss->mmio + UBWC_STATIC);  in msm_mdss_setup_ubwc_dec_40()
214 		writel_relaxed(1, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
215 		writel_relaxed(0, msm_mdss->mmio + UBWC_PREDICTION_MODE);  in msm_mdss_setup_ubwc_dec_40()
218 			writel_relaxed(3, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
220 			writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);  in msm_mdss_setup_ubwc_dec_40()
221 		writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);  in msm_mdss_setup_ubwc_dec_40()
227 	struct msm_mdss *mdss;  in msm_mdss_get_mdss_data()
237 static int msm_mdss_enable(struct msm_mdss *msm_mdss)  in msm_mdss_enable()  argument
246 	msm_mdss_icc_request_bw(msm_mdss, MIN_IB_BW);  in msm_mdss_enable()
248 	ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);  in msm_mdss_enable()
250 		dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret);  in msm_mdss_enable()
258 	if (msm_mdss->is_mdp5 || !msm_mdss->mdss_data)  in msm_mdss_enable()
268 	switch (msm_mdss->mdss_data->ubwc_dec_version) {  in msm_mdss_enable()
274 		msm_mdss_setup_ubwc_dec_20(msm_mdss);  in msm_mdss_enable()
277 		msm_mdss_setup_ubwc_dec_30(msm_mdss);  in msm_mdss_enable()
281 		msm_mdss_setup_ubwc_dec_40(msm_mdss);  in msm_mdss_enable()
284 		dev_err(msm_mdss->dev, "Unsupported UBWC decoder version %x\n",  in msm_mdss_enable()
285 			msm_mdss->mdss_data->ubwc_dec_version);  in msm_mdss_enable()
286 		dev_err(msm_mdss->dev, "HW_REV: 0x%x\n",  in msm_mdss_enable()
287 			readl_relaxed(msm_mdss->mmio + HW_REV));  in msm_mdss_enable()
288 		dev_err(msm_mdss->dev, "UBWC_DEC_HW_VERSION: 0x%x\n",  in msm_mdss_enable()
289 			readl_relaxed(msm_mdss->mmio + UBWC_DEC_HW_VERSION));  in msm_mdss_enable()
296 static int msm_mdss_disable(struct msm_mdss *msm_mdss)  in msm_mdss_disable()  argument
298 	clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);  in msm_mdss_disable()
299 	msm_mdss_icc_request_bw(msm_mdss, 0);  in msm_mdss_disable()
304 static void msm_mdss_destroy(struct msm_mdss *msm_mdss)  in msm_mdss_destroy()  argument
306 	struct platform_device *pdev = to_platform_device(msm_mdss->dev);  in msm_mdss_destroy()
309 	pm_runtime_suspend(msm_mdss->dev);  in msm_mdss_destroy()
310 	pm_runtime_disable(msm_mdss->dev);  in msm_mdss_destroy()
311 	irq_domain_remove(msm_mdss->irq_controller.domain);  in msm_mdss_destroy()
312 	msm_mdss->irq_controller.domain = NULL;  in msm_mdss_destroy()
373 static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)  in msm_mdss_init()
375 	struct msm_mdss *msm_mdss;  in msm_mdss_init()  local
383 	msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);  in msm_mdss_init()
384 	if (!msm_mdss)  in msm_mdss_init()
387 	msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss");  in msm_mdss_init()
388 	if (IS_ERR(msm_mdss->mmio))  in msm_mdss_init()
389 		return ERR_CAST(msm_mdss->mmio);  in msm_mdss_init()
391 	dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio);  in msm_mdss_init()
393 	ret = msm_mdss_parse_data_bus_icc_path(&pdev->dev, msm_mdss);  in msm_mdss_init()
396 	ret = devm_add_action_or_reset(&pdev->dev, msm_mdss_put_icc_path, msm_mdss);  in msm_mdss_init()
401 		ret = mdp5_mdss_parse_clock(pdev, &msm_mdss->clocks);  in msm_mdss_init()
403 		ret = devm_clk_bulk_get_all(&pdev->dev, &msm_mdss->clocks);  in msm_mdss_init()
408 	msm_mdss->num_clocks = ret;  in msm_mdss_init()
409 	msm_mdss->is_mdp5 = is_mdp5;  in msm_mdss_init()
411 	msm_mdss->dev = &pdev->dev;  in msm_mdss_init()
417 	ret = _msm_mdss_irq_domain_add(msm_mdss);  in msm_mdss_init()
422 					 msm_mdss);  in msm_mdss_init()
426 	return msm_mdss;  in msm_mdss_init()
431 	struct msm_mdss *mdss = dev_get_drvdata(dev);  in mdss_runtime_suspend()
440 	struct msm_mdss *mdss = dev_get_drvdata(dev);  in mdss_runtime_resume()
471 	struct msm_mdss *mdss;  in mdss_probe()
502 	struct msm_mdss *mdss = platform_get_drvdata(pdev);  in mdss_remove()