Lines Matching refs:val
230 static inline uint32_t AXXX_CP_RB_CNTL_BUFSZ(uint32_t val) in AXXX_CP_RB_CNTL_BUFSZ() argument
232 return ((val) << AXXX_CP_RB_CNTL_BUFSZ__SHIFT) & AXXX_CP_RB_CNTL_BUFSZ__MASK; in AXXX_CP_RB_CNTL_BUFSZ()
236 static inline uint32_t AXXX_CP_RB_CNTL_BLKSZ(uint32_t val) in AXXX_CP_RB_CNTL_BLKSZ() argument
238 return ((val) << AXXX_CP_RB_CNTL_BLKSZ__SHIFT) & AXXX_CP_RB_CNTL_BLKSZ__MASK; in AXXX_CP_RB_CNTL_BLKSZ()
242 static inline uint32_t AXXX_CP_RB_CNTL_BUF_SWAP(uint32_t val) in AXXX_CP_RB_CNTL_BUF_SWAP() argument
244 return ((val) << AXXX_CP_RB_CNTL_BUF_SWAP__SHIFT) & AXXX_CP_RB_CNTL_BUF_SWAP__MASK; in AXXX_CP_RB_CNTL_BUF_SWAP()
253 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_SWAP(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_SWAP() argument
255 return ((val) << AXXX_CP_RB_RPTR_ADDR_SWAP__SHIFT) & AXXX_CP_RB_RPTR_ADDR_SWAP__MASK; in AXXX_CP_RB_RPTR_ADDR_SWAP()
259 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_ADDR(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_ADDR() argument
261 return ((val >> 2) << AXXX_CP_RB_RPTR_ADDR_ADDR__SHIFT) & AXXX_CP_RB_RPTR_ADDR_ADDR__MASK; in AXXX_CP_RB_RPTR_ADDR_ADDR()
277 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START() argument
279 …return ((val) << AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START__SHIFT) & AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1… in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START()
283 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START() argument
285 …return ((val) << AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START__SHIFT) & AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2… in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START()
289 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START() argument
291 …return ((val) << AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START__SHIFT) & AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_S… in AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START()
297 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_MEQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_MEQ_END() argument
299 return ((val) << AXXX_CP_MEQ_THRESHOLDS_MEQ_END__SHIFT) & AXXX_CP_MEQ_THRESHOLDS_MEQ_END__MASK; in AXXX_CP_MEQ_THRESHOLDS_MEQ_END()
303 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_ROQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_ROQ_END() argument
305 return ((val) << AXXX_CP_MEQ_THRESHOLDS_ROQ_END__SHIFT) & AXXX_CP_MEQ_THRESHOLDS_ROQ_END__MASK; in AXXX_CP_MEQ_THRESHOLDS_ROQ_END()
311 static inline uint32_t AXXX_CP_CSQ_AVAIL_RING(uint32_t val) in AXXX_CP_CSQ_AVAIL_RING() argument
313 return ((val) << AXXX_CP_CSQ_AVAIL_RING__SHIFT) & AXXX_CP_CSQ_AVAIL_RING__MASK; in AXXX_CP_CSQ_AVAIL_RING()
317 static inline uint32_t AXXX_CP_CSQ_AVAIL_IB1(uint32_t val) in AXXX_CP_CSQ_AVAIL_IB1() argument
319 return ((val) << AXXX_CP_CSQ_AVAIL_IB1__SHIFT) & AXXX_CP_CSQ_AVAIL_IB1__MASK; in AXXX_CP_CSQ_AVAIL_IB1()
323 static inline uint32_t AXXX_CP_CSQ_AVAIL_IB2(uint32_t val) in AXXX_CP_CSQ_AVAIL_IB2() argument
325 return ((val) << AXXX_CP_CSQ_AVAIL_IB2__SHIFT) & AXXX_CP_CSQ_AVAIL_IB2__MASK; in AXXX_CP_CSQ_AVAIL_IB2()
331 static inline uint32_t AXXX_CP_STQ_AVAIL_ST(uint32_t val) in AXXX_CP_STQ_AVAIL_ST() argument
333 return ((val) << AXXX_CP_STQ_AVAIL_ST__SHIFT) & AXXX_CP_STQ_AVAIL_ST__MASK; in AXXX_CP_STQ_AVAIL_ST()
339 static inline uint32_t AXXX_CP_MEQ_AVAIL_MEQ(uint32_t val) in AXXX_CP_MEQ_AVAIL_MEQ() argument
341 return ((val) << AXXX_CP_MEQ_AVAIL_MEQ__SHIFT) & AXXX_CP_MEQ_AVAIL_MEQ__MASK; in AXXX_CP_MEQ_AVAIL_MEQ()
347 static inline uint32_t AXXX_SCRATCH_UMSK_UMSK(uint32_t val) in AXXX_SCRATCH_UMSK_UMSK() argument
349 return ((val) << AXXX_SCRATCH_UMSK_UMSK__SHIFT) & AXXX_SCRATCH_UMSK_UMSK__MASK; in AXXX_SCRATCH_UMSK_UMSK()
353 static inline uint32_t AXXX_SCRATCH_UMSK_SWAP(uint32_t val) in AXXX_SCRATCH_UMSK_SWAP() argument
355 return ((val) << AXXX_SCRATCH_UMSK_SWAP__SHIFT) & AXXX_SCRATCH_UMSK_SWAP__MASK; in AXXX_SCRATCH_UMSK_SWAP()
406 static inline uint32_t AXXX_CP_CSQ_RB_STAT_RPTR(uint32_t val) in AXXX_CP_CSQ_RB_STAT_RPTR() argument
408 return ((val) << AXXX_CP_CSQ_RB_STAT_RPTR__SHIFT) & AXXX_CP_CSQ_RB_STAT_RPTR__MASK; in AXXX_CP_CSQ_RB_STAT_RPTR()
412 static inline uint32_t AXXX_CP_CSQ_RB_STAT_WPTR(uint32_t val) in AXXX_CP_CSQ_RB_STAT_WPTR() argument
414 return ((val) << AXXX_CP_CSQ_RB_STAT_WPTR__SHIFT) & AXXX_CP_CSQ_RB_STAT_WPTR__MASK; in AXXX_CP_CSQ_RB_STAT_WPTR()
420 static inline uint32_t AXXX_CP_CSQ_IB1_STAT_RPTR(uint32_t val) in AXXX_CP_CSQ_IB1_STAT_RPTR() argument
422 return ((val) << AXXX_CP_CSQ_IB1_STAT_RPTR__SHIFT) & AXXX_CP_CSQ_IB1_STAT_RPTR__MASK; in AXXX_CP_CSQ_IB1_STAT_RPTR()
426 static inline uint32_t AXXX_CP_CSQ_IB1_STAT_WPTR(uint32_t val) in AXXX_CP_CSQ_IB1_STAT_WPTR() argument
428 return ((val) << AXXX_CP_CSQ_IB1_STAT_WPTR__SHIFT) & AXXX_CP_CSQ_IB1_STAT_WPTR__MASK; in AXXX_CP_CSQ_IB1_STAT_WPTR()
434 static inline uint32_t AXXX_CP_CSQ_IB2_STAT_RPTR(uint32_t val) in AXXX_CP_CSQ_IB2_STAT_RPTR() argument
436 return ((val) << AXXX_CP_CSQ_IB2_STAT_RPTR__SHIFT) & AXXX_CP_CSQ_IB2_STAT_RPTR__MASK; in AXXX_CP_CSQ_IB2_STAT_RPTR()
440 static inline uint32_t AXXX_CP_CSQ_IB2_STAT_WPTR(uint32_t val) in AXXX_CP_CSQ_IB2_STAT_WPTR() argument
442 return ((val) << AXXX_CP_CSQ_IB2_STAT_WPTR__SHIFT) & AXXX_CP_CSQ_IB2_STAT_WPTR__MASK; in AXXX_CP_CSQ_IB2_STAT_WPTR()
476 static inline uint32_t AXXX_CP_STAT_CP_BUSY(uint32_t val) in AXXX_CP_STAT_CP_BUSY() argument
478 return ((val) << AXXX_CP_STAT_CP_BUSY__SHIFT) & AXXX_CP_STAT_CP_BUSY__MASK; in AXXX_CP_STAT_CP_BUSY()
482 static inline uint32_t AXXX_CP_STAT_VS_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_VS_EVENT_FIFO_BUSY() argument
484 return ((val) << AXXX_CP_STAT_VS_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_VS_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_VS_EVENT_FIFO_BUSY()
488 static inline uint32_t AXXX_CP_STAT_PS_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_PS_EVENT_FIFO_BUSY() argument
490 return ((val) << AXXX_CP_STAT_PS_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_PS_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_PS_EVENT_FIFO_BUSY()
494 static inline uint32_t AXXX_CP_STAT_CF_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_CF_EVENT_FIFO_BUSY() argument
496 return ((val) << AXXX_CP_STAT_CF_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_CF_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_CF_EVENT_FIFO_BUSY()
500 static inline uint32_t AXXX_CP_STAT_RB_EVENT_FIFO_BUSY(uint32_t val) in AXXX_CP_STAT_RB_EVENT_FIFO_BUSY() argument
502 return ((val) << AXXX_CP_STAT_RB_EVENT_FIFO_BUSY__SHIFT) & AXXX_CP_STAT_RB_EVENT_FIFO_BUSY__MASK; in AXXX_CP_STAT_RB_EVENT_FIFO_BUSY()
506 static inline uint32_t AXXX_CP_STAT_ME_BUSY(uint32_t val) in AXXX_CP_STAT_ME_BUSY() argument
508 return ((val) << AXXX_CP_STAT_ME_BUSY__SHIFT) & AXXX_CP_STAT_ME_BUSY__MASK; in AXXX_CP_STAT_ME_BUSY()
512 static inline uint32_t AXXX_CP_STAT_MIU_WR_C_BUSY(uint32_t val) in AXXX_CP_STAT_MIU_WR_C_BUSY() argument
514 return ((val) << AXXX_CP_STAT_MIU_WR_C_BUSY__SHIFT) & AXXX_CP_STAT_MIU_WR_C_BUSY__MASK; in AXXX_CP_STAT_MIU_WR_C_BUSY()
518 static inline uint32_t AXXX_CP_STAT_CP_3D_BUSY(uint32_t val) in AXXX_CP_STAT_CP_3D_BUSY() argument
520 return ((val) << AXXX_CP_STAT_CP_3D_BUSY__SHIFT) & AXXX_CP_STAT_CP_3D_BUSY__MASK; in AXXX_CP_STAT_CP_3D_BUSY()
524 static inline uint32_t AXXX_CP_STAT_CP_NRT_BUSY(uint32_t val) in AXXX_CP_STAT_CP_NRT_BUSY() argument
526 return ((val) << AXXX_CP_STAT_CP_NRT_BUSY__SHIFT) & AXXX_CP_STAT_CP_NRT_BUSY__MASK; in AXXX_CP_STAT_CP_NRT_BUSY()
530 static inline uint32_t AXXX_CP_STAT_RBIU_SCRATCH_BUSY(uint32_t val) in AXXX_CP_STAT_RBIU_SCRATCH_BUSY() argument
532 return ((val) << AXXX_CP_STAT_RBIU_SCRATCH_BUSY__SHIFT) & AXXX_CP_STAT_RBIU_SCRATCH_BUSY__MASK; in AXXX_CP_STAT_RBIU_SCRATCH_BUSY()
536 static inline uint32_t AXXX_CP_STAT_RCIU_ME_BUSY(uint32_t val) in AXXX_CP_STAT_RCIU_ME_BUSY() argument
538 return ((val) << AXXX_CP_STAT_RCIU_ME_BUSY__SHIFT) & AXXX_CP_STAT_RCIU_ME_BUSY__MASK; in AXXX_CP_STAT_RCIU_ME_BUSY()
542 static inline uint32_t AXXX_CP_STAT_RCIU_PFP_BUSY(uint32_t val) in AXXX_CP_STAT_RCIU_PFP_BUSY() argument
544 return ((val) << AXXX_CP_STAT_RCIU_PFP_BUSY__SHIFT) & AXXX_CP_STAT_RCIU_PFP_BUSY__MASK; in AXXX_CP_STAT_RCIU_PFP_BUSY()
548 static inline uint32_t AXXX_CP_STAT_MEQ_RING_BUSY(uint32_t val) in AXXX_CP_STAT_MEQ_RING_BUSY() argument
550 return ((val) << AXXX_CP_STAT_MEQ_RING_BUSY__SHIFT) & AXXX_CP_STAT_MEQ_RING_BUSY__MASK; in AXXX_CP_STAT_MEQ_RING_BUSY()
554 static inline uint32_t AXXX_CP_STAT_PFP_BUSY(uint32_t val) in AXXX_CP_STAT_PFP_BUSY() argument
556 return ((val) << AXXX_CP_STAT_PFP_BUSY__SHIFT) & AXXX_CP_STAT_PFP_BUSY__MASK; in AXXX_CP_STAT_PFP_BUSY()
560 static inline uint32_t AXXX_CP_STAT_ST_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_ST_QUEUE_BUSY() argument
562 return ((val) << AXXX_CP_STAT_ST_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_ST_QUEUE_BUSY__MASK; in AXXX_CP_STAT_ST_QUEUE_BUSY()
566 static inline uint32_t AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY() argument
568 …return ((val) << AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY__MA… in AXXX_CP_STAT_INDIRECT2_QUEUE_BUSY()
572 static inline uint32_t AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY() argument
574 …return ((val) << AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY__MA… in AXXX_CP_STAT_INDIRECTS_QUEUE_BUSY()
578 static inline uint32_t AXXX_CP_STAT_RING_QUEUE_BUSY(uint32_t val) in AXXX_CP_STAT_RING_QUEUE_BUSY() argument
580 return ((val) << AXXX_CP_STAT_RING_QUEUE_BUSY__SHIFT) & AXXX_CP_STAT_RING_QUEUE_BUSY__MASK; in AXXX_CP_STAT_RING_QUEUE_BUSY()
584 static inline uint32_t AXXX_CP_STAT_CSF_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_BUSY() argument
586 return ((val) << AXXX_CP_STAT_CSF_BUSY__SHIFT) & AXXX_CP_STAT_CSF_BUSY__MASK; in AXXX_CP_STAT_CSF_BUSY()
590 static inline uint32_t AXXX_CP_STAT_CSF_ST_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_ST_BUSY() argument
592 return ((val) << AXXX_CP_STAT_CSF_ST_BUSY__SHIFT) & AXXX_CP_STAT_CSF_ST_BUSY__MASK; in AXXX_CP_STAT_CSF_ST_BUSY()
596 static inline uint32_t AXXX_CP_STAT_EVENT_BUSY(uint32_t val) in AXXX_CP_STAT_EVENT_BUSY() argument
598 return ((val) << AXXX_CP_STAT_EVENT_BUSY__SHIFT) & AXXX_CP_STAT_EVENT_BUSY__MASK; in AXXX_CP_STAT_EVENT_BUSY()
602 static inline uint32_t AXXX_CP_STAT_CSF_INDIRECT2_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_INDIRECT2_BUSY() argument
604 return ((val) << AXXX_CP_STAT_CSF_INDIRECT2_BUSY__SHIFT) & AXXX_CP_STAT_CSF_INDIRECT2_BUSY__MASK; in AXXX_CP_STAT_CSF_INDIRECT2_BUSY()
608 static inline uint32_t AXXX_CP_STAT_CSF_INDIRECTS_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_INDIRECTS_BUSY() argument
610 return ((val) << AXXX_CP_STAT_CSF_INDIRECTS_BUSY__SHIFT) & AXXX_CP_STAT_CSF_INDIRECTS_BUSY__MASK; in AXXX_CP_STAT_CSF_INDIRECTS_BUSY()
614 static inline uint32_t AXXX_CP_STAT_CSF_RING_BUSY(uint32_t val) in AXXX_CP_STAT_CSF_RING_BUSY() argument
616 return ((val) << AXXX_CP_STAT_CSF_RING_BUSY__SHIFT) & AXXX_CP_STAT_CSF_RING_BUSY__MASK; in AXXX_CP_STAT_CSF_RING_BUSY()
620 static inline uint32_t AXXX_CP_STAT_RCIU_BUSY(uint32_t val) in AXXX_CP_STAT_RCIU_BUSY() argument
622 return ((val) << AXXX_CP_STAT_RCIU_BUSY__SHIFT) & AXXX_CP_STAT_RCIU_BUSY__MASK; in AXXX_CP_STAT_RCIU_BUSY()
626 static inline uint32_t AXXX_CP_STAT_RBIU_BUSY(uint32_t val) in AXXX_CP_STAT_RBIU_BUSY() argument
628 return ((val) << AXXX_CP_STAT_RBIU_BUSY__SHIFT) & AXXX_CP_STAT_RBIU_BUSY__MASK; in AXXX_CP_STAT_RBIU_BUSY()
632 static inline uint32_t AXXX_CP_STAT_MIU_RD_RETURN_BUSY(uint32_t val) in AXXX_CP_STAT_MIU_RD_RETURN_BUSY() argument
634 return ((val) << AXXX_CP_STAT_MIU_RD_RETURN_BUSY__SHIFT) & AXXX_CP_STAT_MIU_RD_RETURN_BUSY__MASK; in AXXX_CP_STAT_MIU_RD_RETURN_BUSY()
638 static inline uint32_t AXXX_CP_STAT_MIU_RD_REQ_BUSY(uint32_t val) in AXXX_CP_STAT_MIU_RD_REQ_BUSY() argument
640 return ((val) << AXXX_CP_STAT_MIU_RD_REQ_BUSY__SHIFT) & AXXX_CP_STAT_MIU_RD_REQ_BUSY__MASK; in AXXX_CP_STAT_MIU_RD_REQ_BUSY()