Lines Matching refs:_MMIO
31 #define MBUS_UBOX_CTL _MMIO(0x4503C)
32 #define MBUS_BBOX_CTL_S1 _MMIO(0x45040)
33 #define MBUS_BBOX_CTL_S2 _MMIO(0x45044)
35 #define MBUS_CTL _MMIO(0x4438C)
75 #define CUR_WM(pipe, level) _MMIO(_CUR_WM_0(pipe) + ((4) * (level)))
84 _MMIO(_PLANE_WM_BASE(pipe, plane) + ((4) * (level)))
90 _MMIO(_PLANE(plane, _PLANE_WM_SAGV_1(pipe), _PLANE_WM_SAGV_2(pipe)))
96 _MMIO(_PLANE(plane, _PLANE_WM_SAGV_TRANS_1(pipe), _PLANE_WM_SAGV_TRANS_2(pipe)))
102 _MMIO(_PLANE(plane, _PLANE_WM_TRANS_1(pipe), _PLANE_WM_TRANS_2(pipe)))
139 #define DBUF_CTL_S(slice) _MMIO(_PICK(slice, \
151 #define MTL_LATENCY_LP0_LP1 _MMIO(0x45780)
152 #define MTL_LATENCY_LP2_LP3 _MMIO(0x45784)
153 #define MTL_LATENCY_LP4_LP5 _MMIO(0x45788)
157 #define MTL_LATENCY_SAGV _MMIO(0x4578c)